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3 Commits

Author SHA1 Message Date
Matt Arsenault c8e2ce4046 AMDGPU: Reduce number of copies emitted 
Instead of always inserting a copy in case
the super register is itself a subregister,
only extract to the super reg class if this is
actually the case.

This shouldn't really change codegen, but
makes looking at the output of SIFixSGPRCopies
easier to read.

llvm-svn: 248467
 2015-09-24 07:16:37 +00:00
Matt Arsenault 5e7f95e567 AMDGPU: Don't reprocess instructions when splitting i64 bcnt 
llvm-svn: 246079
 2015-08-26 20:48:04 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00