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7463 Commits

Author SHA1 Message Date
Evan Cheng 1f58eed638 Add VFP3 D registers to the DPR register class. 
llvm-svn: 77521
 2009-07-29 23:03:41 +00:00
Devang Patel 27c87fff7f Read and write NamedMDNode. 
llvm-svn: 77517
 2009-07-29 22:34:41 +00:00
Daniel Dunbar 98ddd164d8 Fix PR4645 which was fallout from the fix for PR4641. 
- Call RAUW to delete all instructions (this is a patch from Nick Lewycky).

llvm-svn: 77512
 2009-07-29 22:00:43 +00:00
Evan Cheng 56c89e70fe xfail for now. 
llvm-svn: 77478
 2009-07-29 17:40:28 +00:00
Bob Wilson cf19885a32 Change Neon VLDn intrinsics to return multiple values instead of really 
wide vectors.  Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct.  Adjust tests accordingly.

llvm-svn: 77468
 2009-07-29 16:39:22 +00:00
Nick Lewycky 013c8e5474 Just discard the output, no need to turn it back into text. 
llvm-svn: 77439
 2009-07-29 06:14:52 +00:00
Chris Lattner 1d3defa392 don't dump .bc file to stdout, and simplify this to a trivial testcase. 
llvm-svn: 77436
 2009-07-29 05:32:07 +00:00
Chris Lattner c5397abb52 fix PR4584 with a trivial patch now that the pieces are in place. 
llvm-svn: 77434
 2009-07-29 05:20:33 +00:00
Nick Lewycky f82326b984 Bulk erasing instructions without RAUWing them is unsafe. Instead, break them 
into a new BB that has no predecessors.

llvm-svn: 77433
 2009-07-29 05:17:50 +00:00
Evan Cheng c6d70ae063 Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte / halfword. 
llvm-svn: 77422
 2009-07-29 02:18:14 +00:00
Eric Christopher dce1e4949e Add a couple more tests for the ptest intrinsics to make sure we're 
grabbing them all correctly.

llvm-svn: 77413
 2009-07-29 00:51:15 +00:00
Eric Christopher f7802a33ce Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. Lower 
to ptest instruction plus setcc. Revamp ptest instruction. Add test.

llvm-svn: 77407
 2009-07-29 00:28:05 +00:00
Andreas Bolka 2f84b5ab46 Slightly reformat LDA tests to ease grepping. 
llvm-svn: 77398
 2009-07-28 23:40:40 +00:00
Evan Cheng c8bed03349 In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is until more optimization goes in). 
llvm-svn: 77364
 2009-07-28 20:53:24 +00:00
David Goodwin 68bb69d6e3 Remove support for ORN to workaround <rdar://problem/7096522>. 
llvm-svn: 77363
 2009-07-28 20:51:25 +00:00
David Goodwin 865c6298d7 Add workaround for <rdar://problem/7098328>. 
llvm-svn: 77340
 2009-07-28 18:15:38 +00:00
Chris Lattner ebbbf451c9 fix testcase for previous patch. 
llvm-svn: 77338
 2009-07-28 18:04:18 +00:00
Chris Lattner 513a36b63d Fix PR4639, a ELF-TLS regression from some of my refactoring. 
llvm-svn: 77336
 2009-07-28 17:57:51 +00:00
David Goodwin e82862e24e Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag. 
llvm-svn: 77329
 2009-07-28 17:06:49 +00:00
Evan Cheng 12da273f90 tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. 
llvm-svn: 77305
 2009-07-28 07:38:35 +00:00
Evan Cheng 780748d565 - More refactoring. This gets rid of all of the getOpcode calls. 
- This change also makes it possible to switch between ARM / Thumb on a
  per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
  using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.

llvm-svn: 77300
 2009-07-28 05:48:47 +00:00
Dan Gohman 31a9b9880b Teach instcombine to respect and preserve inbounds. Add inbounds 
to a few tests where it is required for the expected transformation.

llvm-svn: 77290
 2009-07-28 01:40:03 +00:00
David Goodwin 57b51d9f82 ORN does not require (and can not have) the ".w" suffix. "Orthogonality" is a dirty word at ARM. 
llvm-svn: 77275
 2009-07-27 23:34:12 +00:00
Daniel Dunbar eb6bb32bef llvm-mc: Implement .abort fully in the front end 
llvm-svn: 77272
 2009-07-27 23:20:52 +00:00
Dan Gohman 1639c3905e Add a new keyword 'inbounds' for use with getelementptr. See the 
LangRef.html changes for details.

llvm-svn: 77259
 2009-07-27 21:53:46 +00:00
David Goodwin 782f242fd7 Add ".w" suffix for wide thumb-2 instructions. 
llvm-svn: 77199
 2009-07-27 16:31:55 +00:00
Sanjiv Gupta a77a182b04 Test case to check that separate section is created for a global variable specified with section attribute. 
llvm-svn: 77195
 2009-07-27 16:20:41 +00:00
Dan Gohman 9c7f808201 Change the assembly syntax for nsw, nuw, and exact, putting them 
after their associated opcodes rather than before. This makes them
a little easier to read.

llvm-svn: 77194
 2009-07-27 16:11:46 +00:00
Chris Lattner 57af4ece60 update testcase. 
llvm-svn: 77192
 2009-07-27 15:52:58 +00:00
Chris Lattner 8e58bc9ed4 put normal data into .data instead of .data.rel on elf systems. 
llvm-svn: 77116
 2009-07-26 03:06:11 +00:00
Chris Lattner 397792d981 finish simplifying DarwinTargetAsmInfo::SelectSectionForGlobal 
for now.  Make the section switching directives more consistent
by not including \n and including \t for them all.

llvm-svn: 77107
 2009-07-26 01:24:18 +00:00
Chris Lattner 5b42b45fb9 simplify DarwinTargetAsmInfo::SelectSectionForGlobal a bit 
and make it more aggressive, we now put:

const int G2 __attribute__((weak)) = 42;

into the text (readonly) segment like gcc, previously we put
it into the data (readwrite) segment.

llvm-svn: 77104
 2009-07-26 00:51:36 +00:00
Bob Wilson 8a37bbebfd Add support for ARM Neon VREV instructions. 
Patch by Anton Korzh, with some modifications from me.

llvm-svn: 77101
 2009-07-26 00:39:34 +00:00
Chris Lattner 2de9510572 add the most expedient hack to fix PR4619, along with a testcase. 
Thanks to Rafael for the great example.

llvm-svn: 77083
 2009-07-25 17:57:37 +00:00
Dan Gohman 534d66a426 When attempting to sign-extend an addrec by interpreting 
the step value as unsigned, the start value and the addrec
itself still need to be treated as signed.

llvm-svn: 77078
 2009-07-25 16:03:30 +00:00
Chris Lattner fcfbc7bb2c remove this test. It is currently failing because we now emit the string 
on darwin with ".cstring" instead of ".section  __TEXT,__cstring".  They
are the same and the former is better.  Remove this because this is no longer
magic pixie dust in the frontend.

llvm-svn: 77055
 2009-07-25 07:31:51 +00:00
Dan Gohman 62ef6a7f1c Teach ScalarEvolution to make use of no-overflow flags when 
analyzing add recurrences.

llvm-svn: 77034
 2009-07-25 01:22:26 +00:00
Evan Cheng 3b5791f982 I've lost my mind. PR4572 has not been fixed. 
llvm-svn: 77031
 2009-07-25 01:11:46 +00:00
Evan Cheng f3a1fce8ae Change Thumb2 jumptable codegen to one that uses two level jumps: 
Before:
      adr r12, #LJTI3_0_0
      ldr pc, [r12, +r0, lsl #2]
LJTI3_0_0:
      .long    LBB3_24
      .long    LBB3_30
      .long    LBB3_31
      .long    LBB3_32

After:
      adr r12, #LJTI3_0_0
      add pc, r12, +r0, lsl #2
LJTI3_0_0:
      b.w    LBB3_24
      b.w    LBB3_30
      b.w    LBB3_31
      b.w    LBB3_32

This has several advantages.
1. This will make it easier to optimize this to a TBB / TBH instruction +
   (smaller) table.
2. This eliminate the need for ugly asm printer hack to force the address
   into thumb addresses (bit 0 is one).
3. Same codegen for pic and non-pic.
4. This eliminate the need to align the table so constantpool island pass
   won't have to over-estimate the size.

Based on my calculation, the later is probably slightly faster as well since
ldr pc with shifter address is very slow. That is, it should be a win as long
as the HW implementation can do a reasonable job of branch predict the second
branch.

llvm-svn: 77024
 2009-07-25 00:33:29 +00:00
Evan Cheng 8c8e88bd39 Remove a duplicated test. 
llvm-svn: 77020
 2009-07-25 00:24:40 +00:00
Evan Cheng 01740ab57b Forgot this test earlier. 
llvm-svn: 77007
 2009-07-24 22:42:45 +00:00
Evan Cheng aee0e1f48c Fix these tests. 
llvm-svn: 77006
 2009-07-24 22:42:22 +00:00
Eli Friedman 5c9cdb3e3a Fix assert assembling zero-argument constant GEP. 
There's still a strict-aliasing violation here, but I don't feel like 
dealing with that right now...

llvm-svn: 77005
 2009-07-24 21:56:17 +00:00
Eric Christopher fae639c9ad Move insertps tests to sse41 combo test file, convert to filecheck 
format and add an extract/insert test.

llvm-svn: 76994
 2009-07-24 19:24:26 +00:00
Evan Cheng 3990850a7d Convert a test to FileCheck. 
llvm-svn: 76954
 2009-07-24 06:01:46 +00:00
Chris Lattner 26aff56462 Remove SectionKind::Small*. This was only used on mips, and is apparently 
a sad mistake that is regretted. :)

llvm-svn: 76935
 2009-07-24 03:11:51 +00:00
Richard Osborne fc39e417a8 Add tests for handling of globals and tls on the XCore. These currently fail 
but pass when run against r76652.

llvm-svn: 76923
 2009-07-24 00:38:20 +00:00
Dan Gohman 17151155ed Remove the IA-64 backend. 
llvm-svn: 76920
 2009-07-24 00:30:09 +00:00
Evan Cheng dc99f07113 Thumb2 does not allow the use of "pc" register as part of the load / store address. 
llvm-svn: 76909
 2009-07-23 23:09:51 +00:00
Evan Cheng d2919a1773 Fix up ARM constant island pass for Thumb2. 
Also fixed up code to fully use the SoImm field for ADR on ARM mode.

llvm-svn: 76890
 2009-07-23 18:27:47 +00:00