Commit Graph

169283 Commits

Author SHA1 Message Date
Alexandros Lamprineas 8a1c374b2e [GVNHoist] Re-enable GVNHoist by default
Rebase rL341954 since https://bugs.llvm.org/show_bug.cgi?id=38912
has been fixed by rL342055.

Precommit testing performed:
* Overnight runs of csmith comparing the output between programs
  compiled with gvn-hoist enabled/disabled.
* Bootstrap builds of clang with UbSan/ASan configurations.

llvm-svn: 342387
2018-09-17 12:24:55 +00:00
Alexander Kornienko a195de8659 Use createTemporaryFile in SampleProfTest
Create a temporary file in the system temporary directory instead of creating a
file in the current directory, which may be not writable. (Fix for an issue
introduced in r342283.)

llvm-svn: 342386
2018-09-17 12:11:01 +00:00
Guillaume Chatelet cd488efe7e [llvm-exegesis] Add predefined floating point values so we can test impact of special values on latency.
Summary: This will be useful to generate many configurations and test instruction regimes (NaN, Inf, subnormal, normal).

Reviewers: courbet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51858

llvm-svn: 342369
2018-09-17 11:09:32 +00:00
Strahinja Petrovic 488fd4e625 [PowerPC] Fix label address calculation for ppc64
This patch fixes calculating address of label for non-pic ppc64.

Differential Revision: https://reviews.llvm.org/D50965

llvm-svn: 342368
2018-09-17 11:03:40 +00:00
James Henderson e29e40854b Reland r342233: [ThinLTO] Allow setting of maximum cache size with 64-bit number
The original was reverted due to an apparent build-bot test failure,
but it looks like this is just a flaky test.

Also added a C-interface function for large values, and updated
llvm-lto's --thinlto-cache-max-size-bytes switch to take a type larger
than int.

The maximum cache size in terms of bytes is a 64-bit number. However,
the methods to set it only took unsigned previously, which meant that
the maximum cache size could not be specified above 4GB. That's quite
small compared to the output of some projects, so it makes sense to
provide the ability to set larger values in that field.

We also needed a C-interface function that provides a greater range
than the existing thinlto_codegen_set_cache_size_bytes, which also only
takes an unsigned, so this change also adds
hinlto_codegen_set_cache_size_megabytes.

Reviewed by: mehdi_amini, tejohnson, steven_wu

Differential Revision: https://reviews.llvm.org/D52023

llvm-svn: 342366
2018-09-17 10:21:26 +00:00
Alexander Shaposhnikov 1de445c71c [llvm-objcopy] Add missing alias for --strip-all-gnu
This diff adds -S as an alias for --strip-all-gnu 
(for compatibility with binutils' objcopy).

Patch by Dmitry Golovin!

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D52163

llvm-svn: 342364
2018-09-17 09:45:12 +00:00
Max Kazantsev 5fe3620261 [NFC] Turn unsigned counters into boolean flags
llvm-svn: 342360
2018-09-17 06:33:29 +00:00
Kristina Brooks 46c6d3fe75 [DebugInfo] Fix build when std::vector::iterator is a pointer
std::vector::iterator type may be a pointer, then
iterator::value_type fails to compile since iterator is not a class,
namespace, or enumeration.

Patch by orivej (Orivej Desh)

Differential Revision: https://reviews.llvm.org/D52142

llvm-svn: 342354
2018-09-16 22:21:59 +00:00
Simon Pilgrim cffa206423 [X86][SSE] Always enable ISD::SRL -> ISD::MULHU for v8i16
For constant non-uniform cases we'll never introduce more and/andn/or selects than already occur in generic pre-SSE41 ISD::SRL lowering.

llvm-svn: 342352
2018-09-16 20:28:38 +00:00
Simon Pilgrim ea069ffd44 [X86][AVX] Enable ISD::SRL -> ISD::MULHU for v16i16
Now that rL340913 has landed with improved v16i16 selects as shuffles.

llvm-svn: 342349
2018-09-16 19:20:47 +00:00
Sanjay Patel 3eaf500a6d [DAGCombiner] try to convert pow(x, 1/3) to cbrt(x)
This is a follow-up suggested in D51630 and originally proposed as an IR transform in D49040.

Copying the motivational statement by @evandro from that patch:
"This transformation helps some benchmarks in SPEC CPU2000 and CPU2006, such as 188.ammp, 
447.dealII, 453.povray, and especially 300.twolf, as well as some proprietary benchmarks. 
Otherwise, no regressions on x86-64 or A64."

I'm proposing to add only the minimum support for a DAG node here. Since we don't have an 
LLVM IR intrinsic for cbrt, and there are no other DAG ways to create a FCBRT node yet, I 
don't think we need to worry about DAG builder, legalization, a strict variant, etc. We 
should be able to expand as needed when adding more functionality/transforms. For reference, 
these are transform suggestions currently listed in SimplifyLibCalls.cpp:

//   * cbrt(expN(X))  -> expN(x/3)
//   * cbrt(sqrt(x))  -> pow(x,1/6)
//   * cbrt(cbrt(x))  -> pow(x,1/9)

Also, given that we bail out on long double for now, there should not be any logical 
differences between platforms (unless there's some platform out there that has pow()
but not cbrt()).

Differential Revision: https://reviews.llvm.org/D51753

llvm-svn: 342348
2018-09-16 16:50:26 +00:00
Sanjay Patel bfee5a9b42 [x86] fix uses check in broadcast transform (PR38949)
https://bugs.llvm.org/show_bug.cgi?id=38949

It's not clear to me that we even need a one-use check in this fold.
Ie, 2 independent loads might be better than a load+dependent shuffle.

Note that the existing re-use tests are not affected. We actually do form a
broadcast node in those tests now because there's no extra use of the 
insert_subvector node in those cases. But something later in isel pattern 
matching decides that it is not worth using a broadcast for the full load in 
those tests:

Legalized selection DAG: %bb.0 'test_broadcast_2f64_4f64_reuse:'
  t7: v2f64,ch = load<(load 16 from %ir.p0)> t0, t2, undef:i64
      t4: i64,ch = CopyFromReg t0, Register:i64 %1
    t10: ch = store<(store 16 into %ir.p1)> t7:1, t7, t4, undef:i64
      t18: v4f64 = insert_subvector undef:v4f64, t7, Constant:i64<0>
    t20: v4f64 = insert_subvector t18, t7, Constant:i64<2>

Becomes:
  t7: v2f64,ch = load<(load 16 from %ir.p0)> t0, t2, undef:i64
      t4: i64,ch = CopyFromReg t0, Register:i64 %1
    t10: ch = store<(store 16 into %ir.p1)> t7:1, t7, t4, undef:i64
    t21: v4f64 = X86ISD::SUBV_BROADCAST t7

ISEL: Starting selection on root node: t21: v4f64 = X86ISD::SUBV_BROADCAST t7
...
  Created node: t27: v4f64 = INSERT_SUBREG IMPLICIT_DEF:v4f64, t7, TargetConstant:i32<7>
  Morphed node: t21: v4f64 = VINSERTF128rr t27, t7, TargetConstant:i8<1>

llvm-svn: 342347
2018-09-16 15:41:56 +00:00
Sanjay Patel 3e095174b0 [x86] add failure to splat test (PR38949); NFC
llvm-svn: 342346
2018-09-16 14:59:04 +00:00
Roman Lebedev 6356864e6d [NFC][InstCombine] One more test pattern for comparisons with low-bit-mask.
https://rise4fun.com/Alive/UGzE <- non-canonical, but has extra uses.

https://bugs.llvm.org/show_bug.cgi?id=38123

llvm-svn: 342345
2018-09-16 12:51:09 +00:00
Simon Pilgrim 5ea1b32631 Fix -Wdangling-else gcc warning. NFCI.
llvm-svn: 342344
2018-09-16 12:30:41 +00:00
Roman Lebedev 3fb9414d02 [NFC][InstCombine] Some more tests for comparisons with low-bit-mask.
https://bugs.llvm.org/show_bug.cgi?id=38123
https://bugs.llvm.org/show_bug.cgi?id=38708

llvm-svn: 342343
2018-09-16 08:05:06 +00:00
Fangrui Song 37a72098ae [llvm-readobj] Make some commonly used short options visibile in -help
For people who use llvm-readelf as a replacement of GNU readelf, they would like to see -d -r ... listed in llvm-readelf -help. It also helps understanding the confusing -s (which is unfortunately different in semantics).

Reviewers: phosek, ruiu, echristo

Reviewed By: ruiu, echristo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52129

llvm-svn: 342339
2018-09-15 21:27:46 +00:00
Nico Weber b09a8c9bd9 Revert r342148 (and follow-on fix attempts r342154, r342180, r342182, r342193)
Many bots buildling with make have been broken for several days, e.g.
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13

llvm-svn: 342336
2018-09-15 19:04:27 +00:00
Craig Topper 2da7381678 [InstCombine] Support (sub (sext x), (sext y)) --> (sext (sub x, y)) and (sub (zext x), (zext y)) --> (zext (sub x, y))
Summary:
If the sub doesn't overflow in the original type we can move it above the sext/zext.

This is similar to what we do for add. The overflow checking for sub is currently weaker than add, so the test cases are constructed for what is supported.

Reviewers: spatel

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52075

llvm-svn: 342335
2018-09-15 18:54:10 +00:00
Nico Weber 205ca68b8d Give InfoStreamBuilder an opt-in method to write a hash of the PDB as GUID.
Naively computing the hash after the PDB data has been generated is in practice
as fast as other approaches I tried. I also tried online-computing the hash as
parts of the PDB were written out (https://reviews.llvm.org/D51887; that's also
where all the measuring data is) and computing the hash in parallel
(https://reviews.llvm.org/D51957). This approach here is simplest, without
being slower.

Differential Revision: https://reviews.llvm.org/D51956

llvm-svn: 342333
2018-09-15 18:35:51 +00:00
Nico Weber 1359d654e3 Update microsoftDemangle() to work more like itaniumDemangle().
* Use same method of initializing the output stream and its buffer
* Allow a nullptr Status pointer
* Don't print the mangled name on demangling error
* Write to N (if it is non-nullptr)

Differential Revision: https://reviews.llvm.org/D52104

llvm-svn: 342330
2018-09-15 18:24:20 +00:00
Simon Pilgrim fc4c26485c [X86][SSE] Fix insertps load combine test name
The existing test was called extract_lane_insertps_5123 but it was in fact doing a <6,1,2,3> shuffle. I've fixed the name and added the <5,1,2,3> test case as well.

llvm-svn: 342328
2018-09-15 16:57:04 +00:00
Craig Topper fe0b973fbf [X86] Remove an fp->int->fp domain crossing in LowerUINT_TO_FP_i64.
Summary: This unfortunately adds a move, but isn't that better than going to the int domain and back?

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52134

llvm-svn: 342327
2018-09-15 16:23:35 +00:00
Craig Topper 273f755da3 [X86] Fold (movmsk (setne (and X, (1 << C)), 0)) -> (movmsk (X << C))
Summary:
MOVMSK only care about the sign bit so we don't need the setcc to fill the whole element with 0s/1s. We can just shift the bit we're looking for into the sign bit. This saves a constant pool load.

Inspired by PR38840.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: lebedev.ri, llvm-commits

Differential Revision: https://reviews.llvm.org/D52121

llvm-svn: 342326
2018-09-15 16:23:33 +00:00
Fedor Sergeev 751341905d [NFC] minor cleanup in PassManagerInternal.h
A few changes found necessary for upcoming PassInstrumentation patch:
  - name() methods made const
  - properly forward arguments in AnalysisPassModel::run

Separated out of the main D47858 patch.

llvm-svn: 342325
2018-09-15 14:56:12 +00:00
Sanjay Patel 296d35a5e9 [InstCombine][x86] try harder to convert blendv intrinsic to generic IR (PR38814)
Missing optimizations with blendv are shown in:
https://bugs.llvm.org/show_bug.cgi?id=38814

If this works, it's an easier and more powerful solution than adding pattern matching 
for a few special cases in the backend. The potential danger with this transform in IR
is that the condition value can get separated from the select, and the backend might 
not be able to make a blendv out of it again. I don't think that's too likely, but 
I've kept this patch minimal with a 'TODO', so we can test that theory in the wild 
before expanding the transform.

Differential Revision: https://reviews.llvm.org/D52059

llvm-svn: 342324
2018-09-15 14:25:44 +00:00
Simon Pilgrim 7bfe87181d Fix line endings. NFCI.
llvm-svn: 342323
2018-09-15 14:20:53 +00:00
Roman Lebedev 1b7fc87020 [InstCombine] Inefficient pattern for high-bits checking 3 (PR38708)
Summary:
It is sometimes important to check that some newly-computed value
is non-negative and only n bits wide (where n is a variable.)
There are many ways to check that:
https://godbolt.org/z/o4RB8D
The last variant seems best?
(I'm sure there are some other variations i haven't thought of..)

The last (as far i know?) pattern, non-canonical due to the extra use.
https://godbolt.org/z/aCMsPk
https://rise4fun.com/Alive/I6f

https://bugs.llvm.org/show_bug.cgi?id=38708

Reviewers: spatel, craig.topper, RKSimon

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52062

llvm-svn: 342321
2018-09-15 12:04:13 +00:00
Vedant Kumar 1b02dad9f2 [CodeGenPrepare] Preserve debug locs in OptimizeExtractBits
CodeGenPrepare has a transform that sinks {lshr, trunc} pairs to make it
easier for the backend to emit fancy extract-bits instructions (e.g UBFX).

Teach it to preserve debug locations and salvage debug values.

llvm-svn: 342319
2018-09-15 04:08:52 +00:00
Thomas Lively 66f3dc031d [WebAssembly][NFC] Generalize operand numbers in SIMD tests
Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52130

llvm-svn: 342303
2018-09-15 01:12:48 +00:00
Thomas Lively f2550e0c44 [WebAssembly] SIMD shifts
Summary:
Implement shifts of vectors by i32. Since LLVM defines shifts as
binary operations between two vectors, this involves pattern matching
on splatted shift operands. For v2i64 shifts any i32 shift operands
have to be zero extended in the input and any i64 shift operands have
to be wrapped in the output. Depends on D52007.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51906

llvm-svn: 342302
2018-09-15 00:45:31 +00:00
Wei Mi 67f57c6795 Fix filesystem race issue in SampleProfTest introduced in rL342283.
Before this fix, multiple invocations of testRoundTrip will create multiple
writers which share the same file as output destination. That could introduce
filesystem race issue when multiple subtests are executed concurrently. This
patch assign writers with different files as their output destinations.

llvm-svn: 342301
2018-09-15 00:04:15 +00:00
Thomas Lively 88b7443f94 [WebAssembly] SIMD neg
Summary: Depends on D52007.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52009

llvm-svn: 342296
2018-09-14 22:35:12 +00:00
Zachary Turner a98ee586bf [PDB] Make the pretty dumper output modified types.
Currently if we got something like `const Foo` we'd ignore it and
just rely on printing the unmodified `Foo` later on.  However,
for testing the native reading code we really would like to be able
to see these so that we can verify that the native reader can
actually handle them.  Instead of printing out the full type though,
just print out the header.

llvm-svn: 342295
2018-09-14 22:29:19 +00:00
Craig Topper 5692ac6ce7 [BreakFalseDeps] Fix bad formatting. NFC
llvm-svn: 342293
2018-09-14 22:26:09 +00:00
Sanjay Patel 90a36346bc [InstCombine] refactor mul narrowing folds; NFCI
Similar to rL342278:
The test diffs are all cosmetic due to the change in
value naming, but I'm including that to show that the
new code does perform these folds rather than something
else in instcombine.

D52075 should be able to use this code too rather than
duplicating all of the logic.

llvm-svn: 342292
2018-09-14 22:23:35 +00:00
Adrian Prantl 8ccc7bc27c Attempt to unbreak the build after r342286.
llvm-svn: 342291
2018-09-14 21:43:45 +00:00
Sanjay Patel 46945b9e9d [InstCombine] add/use overflowing math helper functions; NFC
The mul case can already be refactored to use this similar to
rL342278.
The sub case is proposed in D52075.

llvm-svn: 342289
2018-09-14 21:30:07 +00:00
Lion Yang c68f78d5d8 [PowerPC] Fix the calling convention for i1 arguments on PPC32
Summary:
Integer types smaller than i32 must be extended to i32 by default.
The feature "crbits" introduced at r202451 handles i1 as a special case,
but it did not extend properly.
The caller was, therefore, passing i1 stack arguments by writing 0/1 to
the first byte of the 4-byte stack object and callee was
reading the first byte for the value.

"crbits" is enabled if the optimization level is greater than 1,
which is very common in "release builds".
Such discrepancies with ABI specification also introduces
potential incompatibility with programs or libraries
built with other compilers e.g. GCC.

Fixes PR38661

Reviewers: hfinkel, cuviper

Subscribers: sylvestre.ledru, glaubitz, nagisa, nemanjai, kbarton, llvm-commits

Differential Revision: https://reviews.llvm.org/D51108

llvm-svn: 342288
2018-09-14 21:26:05 +00:00
Thomas Lively a3937b231d [WebAssembly][NFC] Move SIMD encoding tests to dedicated file
Summary:
This change makes the tests more focused and avoids problematic
interactions between the testing modes and instruction encoding. This
change also allows the other tests to use less verbose output and
stricter checks.

Reviewers: aheejin, dschuff, aardappel

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52007

llvm-svn: 342287
2018-09-14 21:21:42 +00:00
Zachary Turner 08e522a0f5 Add missing include.
llvm-svn: 342286
2018-09-14 21:19:52 +00:00
Reid Kleckner b3d456a79e [codeview] Remove dead code
llvm-svn: 342285
2018-09-14 21:14:08 +00:00
Zachary Turner 4d68951e6d [PDB] Refactor a little of the Symbol creation code.
Eventually we need to be able to support nested types, which don't
have an associated CVType record.  To handle this, remove the
CVType from all of the record classes, and instead store the
deserialized record.  Then move the deserialization up to the thing
that creates the type.  This actually makes error handling better
anyway as we can return an invalid symbol instead of asserting false.

llvm-svn: 342284
2018-09-14 21:03:57 +00:00
Wei Mi 6a14325dff [SampleFDO] Add FunctionOffsetTable in compact binary format profile.
The patch saves a function offset table which maps function name index to the
offset of its function profile to the start of the binary profile. By using
the function offset table, for those function profiles which will not be used
when compiling a module, the profile reader does't have to read them. For
profile size around 10~20M, it saves ~10% compile time.

Differential Revision: https://reviews.llvm.org/D51863

llvm-svn: 342283
2018-09-14 20:52:59 +00:00
Fangrui Song d39d374e15 test/Other/can-execute.txt: delete %t after the test
This test constructs a non-readable file of mode 0111, which lingers in the test output directory and will cause EACCES to various tools (rg, rsync, ...)

llvm-svn: 342279
2018-09-14 20:41:42 +00:00
Sanjay Patel 2426eb46dd [InstCombine] refactor add narrowing folds; NFCI
The test diffs are all cosmetic due to the change in
value naming, but I'm including that to show that the
new code does perform these folds rather than something
else in instcombine.

llvm-svn: 342278
2018-09-14 20:40:46 +00:00
Sebastian Pop 0f30f08b02 HotColdSplit: fix invalid SSA due to outlining
The test used to fail with an invalid phi node: the two predecessors were outlined
and the SSA representation was left invalid. The patch adds the exit block to the
cold region.

llvm-svn: 342277
2018-09-14 20:36:19 +00:00
Sebastian Pop 3abcf69074 HotColdSplit: fix isSingleEntrySingleExit
remove duplicate entries from isSingleEntrySingleExit: the Entry block is
already added by the loop over the dominance frontier.

Remove the heuristic from isOutlineCandidate that a region is too small when it
only contains a basic block. With this change we now grow regions starting from
a block and we continue adding to the ValidColdRegion. Check the heuristic just
before code generation.

llvm-svn: 342276
2018-09-14 20:36:14 +00:00
Sebastian Pop 1217160bb3 HotColdSplit: add back propagation to extend cold regions
Also fix a problem in forward propagation:
  const TerminatorInst *TI = It->getTerminator();
was set outside the while loop that iterates over It.

llvm-svn: 342275
2018-09-14 20:36:10 +00:00
Sanjay Patel fcf8c7c908 [InstCombine] add more tests for add narrowing folds; NFC
llvm-svn: 342274
2018-09-14 20:33:40 +00:00
Thomas Lively e1f67a8bf7 [WebAssembly][NFC] Fix unconventional test names
Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52110

llvm-svn: 342273
2018-09-14 20:22:45 +00:00
Reid Kleckner ba732f213d Remove unused DIASession field
llvm-svn: 342272
2018-09-14 20:16:31 +00:00
Konstantin Zhuravlyov e721b11c12 AMDGPU: Clear the bits before they are being set in program resource registers
Change by Tony Tye

llvm-svn: 342270
2018-09-14 20:00:36 +00:00
Alex Langford a250f90efe Fix lit/example/many-tests pickling issue
Summary:
The multiprocess module uses pickling to transfer
information between processes and does not know how to pickle
the class created in the lit.cfg file and thus the example
fails.

Implement ManyTests in a separate file and import for the
example test passes

Patch by Nathan Lanza <nathan@lanza.io>

Differential Revision: https://reviews.llvm.org/D51328

llvm-svn: 342269
2018-09-14 19:44:09 +00:00
Lion Yang 7bff00e841 Test commit access
Remove trailing spaces

llvm-svn: 342268
2018-09-14 19:43:11 +00:00
Reid Kleckner 4d1b75c6b7 Revert r342183 "[DAGCombine] Fix crash when store merging created an extract_subvector with invalid index."
Causes 'isVector() && "Invalid vector type!"' assertion when building
Skia in Chrome.

llvm-svn: 342265
2018-09-14 19:39:40 +00:00
Adrian Prantl 16f58d1850 Fix debug info for SelectionDAG legalization of DAG nodes with two results.
This patch fixes the debug info handling for SelectionDAG legalization
of DAG nodes with two results. When an replaced SDNode has more than
one result, transferDbgValues was always copying the SDDbgValue from
the first result and attaching them to all members. In reality
SelectionDAG::ReplaceAllUsesWith() is given an array of SDNodes
(though the type signature doesn't make this obvious (cf. the call
site code in ReplaceNode()).

rdar://problem/44162227

Differential Revision: https://reviews.llvm.org/D52112

llvm-svn: 342264
2018-09-14 19:38:45 +00:00
Steven Wu ec53c89fde [ThinLTOCodeGenerator] Avoid Rehash StringMap in ThreadPool
Summary:
During threaded thinLTO, it is possible that the entry for current
module doesn't exist in StringMaps (like ExportLists, ResolvedODR,
etc.). Using operator[] might trigger a rehash for the StringMap, which
might happen on multiple threads at the same time.

rdar://problem/43846199

Reviewers: tejohnson, mehdi_amini, kromanova, pcc

Reviewed By: tejohnson

Subscribers: dang, inglorion, eraman, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D52049

llvm-svn: 342263
2018-09-14 19:38:21 +00:00
Reid Kleckner 00f0ee718f Revert r342210 "[ARM] bottom-top mul support in ARMParallelDSP"
It causes assertion failures while building Skia for Android in
Chromium:
https://ci.chromium.org/buildbot/chromium.clang/ToTAndroid/4550

Reduction forthcoming.

llvm-svn: 342260
2018-09-14 18:44:37 +00:00
Simon Pilgrim 4c30f3d4e6 Revert a line-endings change that somehow got included with rL342257
llvm-svn: 342258
2018-09-14 18:35:21 +00:00
Simon Pilgrim 32857c54d2 [X86][SSE] Lower shuffles to permute(unpack(x,y)) (PR31151)
Attempt to lower a shuffle as an unpack of elements from two inputs followed by a single-input (wider) permutation.

As long as the permutation is wider this is a win - there may be some circumstances where same size permutations would also be useful but I've left that for future work.

Differential Revision: https://reviews.llvm.org/D52043

llvm-svn: 342257
2018-09-14 18:33:31 +00:00
Craig Topper ac356cac0c [X86] Re-generate test checks using current version of the script. NFC
The regular expression used for stack accesses is different today.

llvm-svn: 342256
2018-09-14 18:27:09 +00:00
Sanjay Patel 003f452522 [InstCombine] rename test file to better describe the fold; NFC
The folds are not limited to zext, and the real goal is width
reduction of a math op. D52075 is proposing to extend this to
subtracts.

llvm-svn: 342254
2018-09-14 18:12:30 +00:00
Sanjay Patel 5a9462e42a [InstCombine] remove unnecessary target constraints for tests; NFC
These are universal folds.

llvm-svn: 342253
2018-09-14 18:06:36 +00:00
Sanjay Patel 7b9e1afd1f [InstCombine] move test next to related tests; NFC
llvm-svn: 342251
2018-09-14 18:05:14 +00:00
Sanjay Patel 1f4f26a2bb [InstCombine] remove stall comment from test file; NFC
llvm-svn: 342250
2018-09-14 18:02:17 +00:00
Sanjay Patel f7ba0ac0b5 [InstCombine] regenerate test checks; NFC
There was a bug in a check line regex that could cause the test to fail
with a naming difference. The auto-gen script seems to work as expected now.

llvm-svn: 342249
2018-09-14 17:53:44 +00:00
Nico Weber 1739dbf6a6 Introduce explicit add_unittest_with_input_files target for tests that use llvm::getInputFileDirectory()
Using llvm::getInputFileDirectory() in unit tests is discouraged, so require an explicit opt-in.
This way, cmake also writes ~60 fewer unused files to disk.

Differential Revision: https://reviews.llvm.org/D52095

llvm-svn: 342248
2018-09-14 17:34:46 +00:00
Adrian Prantl 66945cf6e3 fix noasserts build
llvm-svn: 342247
2018-09-14 17:32:52 +00:00
Adrian Prantl 55b8756b8a SelectionDAG: Add compact SDDbgValue representation to -dag-dump-verbose output
llvm-svn: 342245
2018-09-14 17:08:02 +00:00
James Henderson 13f426304f Revert r342233.
This caused LLD test failures, which I've been unable to reproduce.

Reverting to allow for further investigation next week.

llvm-svn: 342244
2018-09-14 16:48:47 +00:00
Adrian Prantl 86497ad2af fix typos
llvm-svn: 342241
2018-09-14 16:12:14 +00:00
Sanjay Patel b437238e95 [InstCombine] add more tests for x86 blendv (PR38814); NFC
llvm-svn: 342237
2018-09-14 13:47:33 +00:00
Simon Pilgrim 1c1335a10d [X86][BMI1] Fix BLSI/BLSMSK/BLSR BMI1 scheduling on btver2
These have the same behaviour as tzcnt on btver2 - confirmed with AMD 16h SOG, Agner and instlatx64.

llvm-svn: 342235
2018-09-14 13:31:14 +00:00
Simon Pilgrim 6a47cdbdec [X86][BMI1] Add scheduler class for BLSI/BLSMSK/BLSR BMI1 instructions
llvm-svn: 342234
2018-09-14 13:09:56 +00:00
James Henderson 48c0688a36 [ThinLTO]Allow setting of maximum cache size with 64-bit number
Also added a C-interface function for large values, and updated
llvm-lto's --thinlto-cache-max-size-bytes switch to take a type larger
than int.

The maximum cache size in terms of bytes is a 64-bit number. However,
the methods to set it only took unsigned previously, which meant that
the maximum cache size could not be specified above 4GB. That's quite
small compared to the output of some projects, so it makes sense to
provide the ability to set larger values in that field.

We also needed a C-interface function that provides a greater range
than the existing thinlto_codegen_set_cache_size_bytes, which also only
takes an unsigned, so this change also adds
hinlto_codegen_set_cache_size_megabytes.

Reviewed by: mehdi_amini, tejohnson, steven_wu

Differential Revision: https://reviews.llvm.org/D52023

llvm-svn: 342233
2018-09-14 12:51:19 +00:00
David Stuttard 20de3e99b5 [AMDGPU] Ensure trig range reduction only used for subtargets that require it
Summary:
GFX9 and above support sin/cos instructions with a greater range and thus don't
require a fract instruction prior to invocation.

Added a subtarget feature to reflect this and added code to take advantage of
expanded range on GFX9+

Also updated the tests to check correct behaviour

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D51933

Change-Id: I1c1f1d3726a5ae32116646ca5cfa1ab4ef69e5b0
llvm-svn: 342222
2018-09-14 10:27:19 +00:00
Wolfgang Pieb 55dbac9f07 [DWARF] reposting r342048, which was reverted in r342056 due to buildbot
errors.
Adjusted 2 test cases for ARM and darwin and fixed a bug with the original
change in dsymutil.

llvm-svn: 342218
2018-09-14 09:14:10 +00:00
Sam Parker 7b84fd7847 [ARM] bottom-top mul support in ARMParallelDSP
On failing to find sequences that can be converted into dual macs,
try to find sequential 16-bit loads that are used by muls which we
can then use smultb, smulbt, smultt with a wide load.

Differential Revision: https://reviews.llvm.org/D51983

llvm-svn: 342210
2018-09-14 08:09:09 +00:00
Florian Hahn 3afb974aa5 [LoopInterchange] Preserve ScalarEvolution, by forgetting about interchanged loops.
As preparation for LoopInterchange becoming a loop pass, it needs to
preserve ScalarEvolution. Even though interchanging should not change
the trip count of the loop, it modifies loop entry, latch and exit
blocks.

I added -verify-scev to some loop interchange tests, but the verification does
not catch problems caused by missing invalidation of SE in loop interchange, as
the trip counts themselves do not change. So there might be potential to
make the SE verification covering more stuff in the future.

Reviewers: mkazantsev, efriedma, karthikthecool

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D52026

llvm-svn: 342209
2018-09-14 07:50:20 +00:00
Jonas Paulsson 77df2f2f38 [SystemZ] Adjust cost functions for subtargets that use LI + LOC instead of IPM
After recent improvements which makes better use of LOC instead of IPM, the
TTI cost functions also needs to be updated to reflect this.

This involves sext, zext and xor of i1.

The tests were updated so that for z13 the new costs are expected, while the
old costs are still checked for on zEC12.

Review: Ulrich Weigand
https://reviews.llvm.org/D51339

llvm-svn: 342207
2018-09-14 06:46:55 +00:00
Martin Storsjo f08a9c700b [Support] Treat null bytes as separator in windows command line strings
When reading directives from a .drectve section, the directives are
tokenized as a normal windows command line. However in these cases,
link.exe allows the directives to be separated by null bytes, not only by
spaces.

A test case for this change will be added in the lld repo.

Differential Revision: https://reviews.llvm.org/D52014

llvm-svn: 342204
2018-09-14 06:08:01 +00:00
Craig Topper e385365c40 [InstCombine] Add some test cases for (add (sext x), (sext y)) --> (sext (add int x, y)) and (mul (sext x), (sext y)) --> (sext (mul x, y)). NFC
llvm-svn: 342203
2018-09-14 05:16:58 +00:00
Max Kazantsev e9765ac275 [NFC] Remove meaningless code from GVN
llvm-svn: 342202
2018-09-14 04:50:38 +00:00
Hideki Saito d19851ac7e Fix for the buildbot failure http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/23635
from the commit (r342197) of https://reviews.llvm.org/D50820.

llvm-svn: 342201
2018-09-14 02:02:57 +00:00
Hideki Saito ea7f3035a0 [VPlan] Implement initial vector code generation support for simple outer loops.
Summary:
[VPlan] Implement vector code generation support for simple outer loops.

Context: Patch Series #1 for outer loop vectorization support in LV  using VPlan. (RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html).
                                                          
This patch introduces vector code generation support for simple outer loops that are currently supported in the VPlanNativePath. Changes here essentially do the following:

  - force vector code generation using explicit vectorize_width

  - add conservative early returns in cost model and other places for VPlanNativePath

  - add code for setting up outer loop inductions 

  - support for widening non-induction PHIs that can result from inner loops and uniform conditional branches

  - support for generating uniform inner branches

We plan to add a handful C outer loop executable tests once the initial code generation support is committed. This patch is expected to be NFC for the inner loop vectorizer path. Since we are moving in the direction of supporting outer loop vectorization in LV, it may also be time to rename classes such as InnerLoopVectorizer. 

Reviewers: fhahn, rengolin, hsaito, dcaballe, mkuper, hfinkel, Ayal

Reviewed By: fhahn, hsaito

Subscribers: dmgreen, bollu, tschuett, rkruppe, rogfer01, llvm-commits

Differential Revision: https://reviews.llvm.org/D50820

llvm-svn: 342197
2018-09-14 00:36:00 +00:00
Richard Diamond 975ff5a6d3 [NFC] Link LLVMCore into LLVMExegesisARMTests.
Fixes missing `llvm::LLVMContext::~LLVMContext()` symbols w/
`BUILD_SHARED_LIBS`.

llvm-svn: 342193
2018-09-13 23:18:33 +00:00
Tim Renouf c8af6a46fa [AMDGPU] Removed unused method
Summary:
I accidentally left this behind in D50306, and it causes a build warning
when I build with gcc7.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D52022

Change-Id: I30f7a47047e9d9d841f652da66d2fea19e74842c
llvm-svn: 342189
2018-09-13 21:56:25 +00:00
Matt Morehouse 3bea25e554 [SanitizerCoverage] Create comdat for global arrays.
Summary:
Place global arrays in comdat sections with their associated functions.
This makes sure they are stripped along with the functions they
reference, even on the BFD linker.

Reviewers: eugenis

Reviewed By: eugenis

Subscribers: eraman, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D51902

llvm-svn: 342186
2018-09-13 21:45:55 +00:00
Roman Lebedev d2316d756e [NFC][InstCombine] PR38708 - inefficient pattern for high-bits checking 3.
The last, non-canonical variant:
https://godbolt.org/z/aCMsPk
https://rise4fun.com/Alive/I6f

It can only happen due to the extra use on the inner shift.
But here it is ok.

https://bugs.llvm.org/show_bug.cgi?id=38708

llvm-svn: 342184
2018-09-13 21:34:47 +00:00
Amara Emerson ef600cbd86 [DAGCombine] Fix crash when store merging created an extract_subvector with invalid index.
Differential Revision: https://reviews.llvm.org/D51831

llvm-svn: 342183
2018-09-13 21:28:58 +00:00
Roman Lebedev b6d188da08 LLVMExegesisX86Tests: link to LLVMCore, too.
Fixes build for me.
Refs. D52054

[215/217] Linking CXX executable unittests/tools/llvm-exegesis/X86/LLVMExegesisX86Tests
FAILED: unittests/tools/llvm-exegesis/X86/LLVMExegesisX86Tests
: && /usr/bin/g++  -pipe -O2 -g0 -UNDEBUG -fPIC -fvisibility-inlines-hidden -Werror=date-time -std=c++11 -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment -fdiagnostics-color -ffunction-sections -fdata-sections -pipe -O2 -g0 -UNDEBUG  -fuse-ld=lld -Wl,--color-diagnostics -Wl,-allow-shlib-undefined     -Wl,-O3 -Wl,--gc-sections unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AnalysisTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/SnippetGeneratorTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/RegisterAliasingTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/TargetTest.cpp.o  -o unittests/tools/llvm-exegesis/X86/LLVMExegesisX86Tests  -Wl,-rpath,/build/llvm-build-GCC-release/lib lib/libLLVMMC.so.8svn lib/libLLVMMCParser.so.8svn lib/libLLVMObject.so.8svn lib/libLLVMSymbolize.so.8svn lib/libLLVMX86CodeGen.so.8svn lib/libLLVMX86AsmParser.so.8svn lib/libLLVMX86AsmPrinter.so.8svn lib/libLLVMX86Desc.so.8svn lib/libLLVMX86Disassembler.so.8svn lib/libLLVMX86Info.so.8svn lib/libLLVMX86Utils.so.8svn lib/libLLVMSupport.so.8svn -lpthread lib/libgtest_main.so.8svn lib/libgtest.so.8svn -lpthread lib/libLLVMExegesis.so.8svn lib/libLLVMExegesisX86.so.8svn && :
ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>>               unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(exegesis::(anonymous namespace)::X86MachineFunctionGeneratorTest_DISABLED_JitFunction_Test::TestBody())

ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>>               unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(exegesis::(anonymous namespace)::X86MachineFunctionGeneratorTest_DISABLED_JitFunctionXOR32rr_Default_Test::TestBody())

ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>>               unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(void exegesis::MachineFunctionGeneratorBaseTest::Check<int, int, int, int, int, int, int, int>(exegesis::ExegesisTarget const&, llvm::ArrayRef<unsigned int>, llvm::MCInst, int, int, int, int, int, int, int, int))

ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>>               unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(exegesis::(anonymous namespace)::X86MachineFunctionGeneratorTest_DISABLED_JitFunctionMOV32ri_Test::TestBody())
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.

llvm-svn: 342182
2018-09-13 21:26:09 +00:00
Sam Clegg 9b3e7c365c [llvm-exegesis] Add missing MC dependency to CMakeLists.txt
See rL342148

This probably only shows up in BUILD_SHARED_LIBS=ON builds
which might explain how it crept in.

Differential Revision: https://reviews.llvm.org/D52054

llvm-svn: 342180
2018-09-13 21:17:16 +00:00
Peter Collingbourne 33d37b2e86 [bindings/go] Add DebugLoc parameter to InsertXXXAtEnd()
These functions previously passed nil for the location, which always resulted in a crash.

This is a signature breaking change, but I cannot see how they could have been used before.

Patch by Ben Clayton!

Differential Revision: https://reviews.llvm.org/D51970

llvm-svn: 342179
2018-09-13 21:16:39 +00:00
Richard Smith 3e32c815e9 Add dependency on new llvm-cxxmap tool to check-llvm.
llvm-svn: 342178
2018-09-13 21:15:34 +00:00
Craig Topper 2f88006ced [MachineInstr] In addRegisterKilled and addRegisterDead, don't remove operands from inline assembly instructions if they have an associated flag operand.
INLINEASM instructions use extra operands to carry flags. If a register operand is removed without removing the flag operand, then the flags will no longer make sense.

This patch fixes this by preventing the removal when a flag operand is present.

The included test case was generated by MS inline assembly. Longer term maybe we should fix the inline assembly parsing to not generate redundant operands.

Differential Revision: https://reviews.llvm.org/D51829

llvm-svn: 342176
2018-09-13 20:51:27 +00:00
Nirav Dave 59ad1c8457 [X86] Fix register resizings for inline assembly register operands.
When replacing a named register input to the appropriately sized
sub/super-register. In the case of a 64-bit value being assigned to a
register in 32-bit mode, match GCC's assignment.

Reviewers: eli.friedman, craig.topper

Subscribers: nickdesaulniers, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D51502

llvm-svn: 342175
2018-09-13 20:33:56 +00:00
Nirav Dave 2060a16dfd [X86] Cleanup pair returns. NFCI.
llvm-svn: 342174
2018-09-13 20:33:27 +00:00
Roman Lebedev 6dc87004fa [InstCombine] Inefficient pattern for high-bits checking 2 (PR38708)
Summary:
It is sometimes important to check that some newly-computed value
is non-negative and only n bits wide (where n is a variable.)
There are many ways to check that:
https://godbolt.org/z/o4RB8D
The last variant seems best?
(I'm sure there are some other variations i haven't thought of..)

More complicated, canonical pattern:
https://rise4fun.com/Alive/uhA

We do need to have two `switch()`'es like this,
to not mismatch the swappable predicates.

https://bugs.llvm.org/show_bug.cgi?id=38708

Reviewers: spatel, craig.topper, RKSimon

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52001

llvm-svn: 342173
2018-09-13 20:33:12 +00:00
George Burgess IV d565b0f017 [PartiallyInlineLibCalls] Add DebugCounter support
This adds DebugCounter support to the PartiallyInlineLibCalls pass,
which should make debugging/automated bisection easier in the future.

Patch by Zhizhou Yang!

Differential Revision: https://reviews.llvm.org/D50093

llvm-svn: 342172
2018-09-13 20:33:04 +00:00