Commit Graph

369 Commits

Author SHA1 Message Date
Yi Kong 02d85149a0 [builtins] Do not set hidden attribute on Android
Bionic libc relies on an old libgcc behaviour which does not set hidden
visibility attribute. Keep exporting these symbols on Android for 
compatibility.

Differential Revision: https://reviews.llvm.org/D56977

llvm-svn: 351915
2019-01-23 01:59:35 +00:00
Chandler Carruth 57b08b0944 Update more file headers across all of the LLVM projects in the monorepo
to reflect the new license. These used slightly different spellings that
defeated my regular expressions.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351648
2019-01-19 10:56:40 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Amy Kwan 0b7c9e535b [compiler-rt][builtins][PowerPC] Implemented __floattitf builtin on PowerPC
This patch implements the long double __floattitf (int128_t) method for
PowerPC -- specifically to convert a 128 bit integer into a long double
(IBM double-double).

To invoke this method, one can do so by linking against compiler-rt, via the
--rtlib=compiler-rt command line option supplied to clang.

Differential Revision: https://reviews.llvm.org/D54313/

llvm-svn: 350818
2019-01-10 13:23:33 +00:00
Amy Kwan 941dacc360 [compiler-rt][builtins][PowerPC] Implemented __fixunstfti builtin on PowerPC
This patch implements the __uint128_t __fixunstfti (long double) method for
PowerPC -- specifically to convert a long double (IBM double-double) to an
unsigned 128 bit integer.

The general approach of this algorithm is to convert the high and low doubles
of the long double and add them together if the doubles fit within 64 bits.
However, additional adjustments and scaling is performed when the high or low
double does not fit within a 64 bit integer.

To invoke this method, one can do so by linking against compiler-rt, via the
--rtlib=compiler-rt command line option supplied to clang.

Differential Revision: https://reviews.llvm.org/D54911

llvm-svn: 350815
2019-01-10 12:30:12 +00:00
Yi Kong a140d5269e [builtins] Remove trailing whitespaces, NFC
Remove trailing whitespaces so that it is easier to diff the code between
div{s,d,t}f3.c

llvm-svn: 348807
2018-12-10 22:52:59 +00:00
Benjamin Kramer a2ada4d1ce [X86][compiler-rt] Add missing semicolon
llvm-svn: 347519
2018-11-24 20:57:03 +00:00
Craig Topper 428caa398c [X86] Make conversion of feature bits into a mask explicitly unsigned by using 1U instead of 1.
llvm-svn: 347517
2018-11-24 20:25:45 +00:00
Craig Topper 62e5924dd6 [X86][compiler-rt] Attempt to fix a warning about a shift amount being negative in a macro expansion.
llvm-svn: 347516
2018-11-24 20:14:03 +00:00
Kamil Rytarowski 003b720873 Revert "Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr"
_Unwind_Ptr is unknown on some targets.

Detected on green-dragon-21 (MacPro Late 2013 | OS X 10.14(18A391) | Xcode 10.1(10B61)).

llvm-svn: 347106
2018-11-16 23:00:28 +00:00
Kamil Rytarowski 54eaafafbf Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr
This modification is require for NetBSD with GCC, as there is a
custom unwind.h header implementation with different types.

No functional change intended for others.

Cherry-picked chunk from D33878.

llvm-svn: 347102
2018-11-16 22:17:36 +00:00
Kamil Rytarowski 7461cc12fc Cast _Unwind_GetIP() and _Unwind_GetRegionStart() to uintptr_t
This modification is require for NetBSD with GCC, as there is a
custom unwind.h header implementation with different types.

No functional change intended for others.

Cherry-picked chunk from D33878.

llvm-svn: 347101
2018-11-16 22:15:09 +00:00
Reid Kleckner dffe5a3807 Compile and test i128 math builtins for Win64
Summary:
Windows has always been LLP64, not LP64, so the macros were incorrect.
Check for _WIN64, since AArch64 sets that too.

The tests have to be fixed up in two main ways:
1. Use 'ULL' suffixes to avoid sign extension when passing hex literals
   with the sign bit set to signed 128 arguments. Clang
   -fms-compatibility makes such hex literals signed, not unsigned.
2. Disable various tests for 80-bit long double interoperation with i128
   values.

Reviewers: joerg, mstorsjo

Subscribers: javed.absar, kristof.beyls, hiraditya, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D53918

llvm-svn: 345796
2018-11-01 00:00:03 +00:00
Reid Kleckner 96b823418d [builtins] Re-enable x86-only long double tests
Summary:
In r81552, the HAS_80_BIT_LONG_DOUBLE macro was added to the unit test
only version of int_lib.h. One month later in r85260 the duplicate
int_lib.h was removed, but the tests still passed because we don't build
with -Werror.

This is the minimal change to bring it back, and I decided to put the
configuration macro next to our 128-bit integer support macro.

Reviewers: joerg, compnerd, mstorsjo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D53838

llvm-svn: 345645
2018-10-30 20:51:27 +00:00
Erik Pilkington 81b89fd7bd [compiler-rt][builtins] Don't #include CoreFoundation in os_version_check.c
This breaks some configurations, so just forward declare everything that we need.

rdar://35943793

Differential revision: https://reviews.llvm.org/D50269

llvm-svn: 345551
2018-10-29 23:01:26 +00:00
Reid Kleckner 143f1a9e72 [builtins] Fix -Wunused-local-typedef warning in compile time asserts
Use the __attribute__ spellings when compiling with clang-cl so that
__attribute__((unused)) expands to something.

llvm-svn: 345550
2018-10-29 22:48:14 +00:00
Craig Topper 3fe6470951 [X86][compiler-rt] Add additional CPUs and features to the cpu detection to match libgcc
Summary: This patch adds additional features and cpus from libgcc. Unfortunately we've overflowed the existing 32-bits of features so we had to add a new __cpu_features2 variable to hold the additional bits. This matches libgcc as far as I can tell.

Reviewers: echristo

Reviewed By: echristo

Subscribers: dberris, llvm-commits

Differential Revision: https://reviews.llvm.org/D53461

llvm-svn: 344830
2018-10-20 03:49:04 +00:00
Kristina Brooks 59500f7a0b [Arm builtins] Remove non-necessary IS check
This patch removes the instruction set check to make the msr APSR_nzcvq,
ip instruction only execute if Thumb2 is used.
The APSR is a subset of the bits of the CPSR
(B.1.3.3 of the Arm v7 A and R ARM [1]) and is only available for A and
R profiles.
However in section B.9.3.11 of the same document we see that:

"In the A and R profiles, APSR_nzcvq is the same as CPSR_f"
"ARM recommends the APSR forms when only the N, Z, C, V, Q, and GE[3:0]
bits are being written."

This patch also make those files assemble for Armv8-M Mainline
architecture profile.

The builtins were cross-compiled for Arm, Aarch64 and Armv6-M, Armv7-M
and Armv7E-M targets.
Cross-compiled tests were executed for Arm target.

[1]: https://developer.arm.com/docs/ddi0406/latest/arm-architecture-reference-manual-armv7-a-and-armv7-r-edition

Patch by hug-dev (Hugues de Valon).

Differential Revision: https://reviews.llvm.org/D51854

llvm-svn: 343601
2018-10-02 16:32:32 +00:00
Jordan Rupprecht dc48c4fff4 [compiler-rt] [builtins] Add logb/logbf/logbl methods to compiler-rt to avoid libm dependencies when possible.
Summary:
The complex division builtins (div?c3) use logb methods from libm to scale numbers during division and avoid rounding issues. However, these come from libm, meaning anyone that uses --rtlib=compiler-rt also has to include -lm. Implement logb* methods for standard ieee 754 floats so we can avoid -lm on those platforms, falling back to the old behavior (using either logb() or `__builtin_logb()`) when not supported.

These new methods are defined internally as `__compiler_rt_logb` so as not to conflict with the libm definitions in any way.

This fixes just the libm methods mentioned in PR32279 and PR28652. libc is still required, although that seems to not be an issue.

Note: this is proposed as an alternative to just adding -lm: D49330.

Reviewers: efriedma, compnerd, scanon, echristo

Reviewed By: echristo

Subscribers: jsji, echristo, nemanjai, dberris, mgorny, kbarton, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D49514

llvm-svn: 342917
2018-09-24 20:39:19 +00:00
Yi Kong 0c4cf6436a [builtins] Add __emutls_unregister_key function
This is called by Bionic on dlclose to delete the emutls pthread key.

The return value of pthread_key_delete is unchecked and behaviour of
multiple calls to the method is dependent on the implementation of
pthread_key_delete.

Differential Revision: https://reviews.llvm.org/D52251

llvm-svn: 342608
2018-09-20 01:02:13 +00:00
Kristina Brooks 22db696549 [builtins] Fix c?zdi2 on sparc64/Linux and ignore riscv32
On sparc64/Linux, sparc64 isn't defined; the canonical way of
checking for sparc64 is sparc && arch64, which also works on the
BSDs and Solaris. Since this problem does not occur on 32-bit
architectures, riscv32 can be ignored. This fixes and refines rL324593.

Patch by jrtc27 (James Clarke)

Differential Revision: https://reviews.llvm.org/D43146

llvm-svn: 342504
2018-09-18 18:56:52 +00:00
Richard Smith 4357ca653a Switch to using a reserved identifier for this internal compiler-rt function.
llvm-svn: 341736
2018-09-08 00:17:37 +00:00
Tim Northover 8f141016ee ARM: wrap call to __clzsi2 so that the name is correct on MachO.
MachO symbols are prefixed with an extra '_' (that's 3 in total for this
function), so assembly calls have to go through a wrapper to insert any prefix
needed.

llvm-svn: 341540
2018-09-06 12:13:46 +00:00
Alex Lorenz 9693e8baa3 [macOS] stop generating the libclang_rt.10.4.a library for macOS 10.4
The support for macOS 10.4 has been dropped by Xcode 10.

rdar://42876880

llvm-svn: 339277
2018-08-08 17:29:55 +00:00
Azharuddin Mohammed ec6bdf8d4f [cmake] [ARM] Exclude any VFP builtins if VFP is not supported
Summary:
rL325492 disables FPU features when using soft floating point
(-mfloat-abi=soft), which is used internally when building for arm. This causes
errors with builtins that utililize VFP instructions.

With this change we check if VFP is enabled (by checking if the preprocessor
macro __VFP_FP__ is defined), and exclude such builtins if it is not enabled.

Reviewers: rengolin, samsonov, compnerd, smeenai, javed.absar, peter.smith

Reviewed By: peter.smith

Subscribers: delcypher, peter.smith, mgorny, kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D47217

llvm-svn: 338284
2018-07-30 18:18:59 +00:00
Martin Storsjo 946a81f5b0 [builtins] Implement the __chkstk function for ARM for MinGW
This function is available for linking in from kernel32.dll, but
it's not allowed to link that function from there in Windows Store
apps.

Differential Revision: https://reviews.llvm.org/D49055

llvm-svn: 337313
2018-07-17 19:14:47 +00:00
Francis Visoiu Mistrih 972a462a7e Fix bots after r334981
llvm-svn: 335013
2018-06-19 02:56:24 +00:00
Chris Bieneman feb4537b44 Fixing os_version_check.c to be actual C source
The initial implementaiton was using the C++ typeof keyword. This
causes the compiler to spew warnings unnecissarilly. This patch removes
the uses of typeof and replaces them with explicit typedefs of the
function types.

llvm-svn: 334981
2018-06-18 20:56:19 +00:00
Eli Friedman 16c4456022 [compiler-rt] [builtins] Don't build __atomic_* by default.
The locks need to be implemented in a shared library to work correctly,
so they shouldn't be part of libclang_rt.builtins.a, except in
specialized scenarios where the user can prove it will only be linked
once.

Differential Revision: https://reviews.llvm.org/D47606

llvm-svn: 334779
2018-06-14 23:22:53 +00:00
Ryan Prichard 1e216a59f6 [builtins] Delay emutls deallocation for one round
Summary:
With Android/Bionic, delay deallocation to round 2 of 4. It must run after
C++ thread_local destructors have been called, but before the final 2
rounds, because emutls calls free, and jemalloc then needs another 2
rounds to free its thread-specific data.

Fixes https://github.com/android-ndk/ndk/issues/687

Reviewers: cmtice, srhines, jyknight, chh, echristo

Reviewed By: srhines, chh, echristo

Subscribers: echristo, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D46978

llvm-svn: 334463
2018-06-12 01:32:26 +00:00
Ryan Prichard 31e4a550a3 [builtins] emutls cleanup: determine header size using sizeof
Summary: Also add a few post-#else/#endif comments

Reviewers: echristo, srhines

Reviewed By: echristo

Subscribers: chh, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D47861

llvm-svn: 334462
2018-06-12 01:32:25 +00:00
Azharuddin Mohammed 06e0fd3bc1 Revert "[cmake] [ARM] Check if VFP is supported before including any VFP builtins"
This reverts commit 2a10f5da5acb1b51d0a2ecf13dca0bf1de859db2.

llvm-svn: 333232
2018-05-24 21:36:27 +00:00
Azharuddin Mohammed 80968a9aba [cmake] [ARM] Check if VFP is supported before including any VFP builtins
Summary:
rL325492 disables FPU features when using soft floating point
(-mfloat-abi=soft), which is used internally when building for armv7. This
causes errors with builtins that utililize VFP instructions. With this change
we first check if VFP is enabled (by checking if the preprocessor macro
__VFP_FP__ is defined) before including such builtins.

Reviewers: rengolin, samsonov, compnerd, smeenai, javed.absar, peter.smith

Reviewed By: peter.smith

Subscribers: peter.smith, mgorny, kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D47217

llvm-svn: 333216
2018-05-24 18:53:16 +00:00
Sid Manning ed3065f7a1 Add basic compiler-rt builtins support for hexagon.
Differential Revision: https://reviews.llvm.org/D46364

llvm-svn: 331881
2018-05-09 14:44:54 +00:00
Roman Lebedev e8e95b5b01 [compiler-rt][X86][AMD][Bulldozer] Fix Bulldozer Model 2 detection.
Summary:
The compiler-rt side of D46314

I have discovered an issue by accident.
```
$ lscpu
Architecture:        x86_64
CPU op-mode(s):      32-bit, 64-bit
Byte Order:          Little Endian
CPU(s):              8
On-line CPU(s) list: 0-7
Thread(s) per core:  2
Core(s) per socket:  4
Socket(s):           1
NUMA node(s):        1
Vendor ID:           AuthenticAMD
CPU family:          21
Model:               2
Model name:          AMD FX(tm)-8350 Eight-Core Processor
Stepping:            0
CPU MHz:             3584.018
CPU max MHz:         4000.0000
CPU min MHz:         1400.0000
BogoMIPS:            8027.22
Virtualization:      AMD-V
L1d cache:           16K
L1i cache:           64K
L2 cache:            2048K
L3 cache:            8192K
NUMA node0 CPU(s):   0-7
Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb hw_pstate vmmcall bmi1 arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold
```
So this is model-2 bulldozer AMD CPU.

GCC agrees:
```
$ echo | gcc -E - -march=native -###
<...>
 /usr/lib/gcc/x86_64-linux-gnu/7/cc1 -E -quiet -imultiarch x86_64-linux-gnu - "-march=bdver2" -mmmx -mno-3dnow -msse -msse2 -msse3 -mssse3 -msse4a -mcx16 -msahf -mno-movbe -maes -mno-sha -mpclmul -mpopcnt -mabm -mlwp -mfma -mfma4 -mxop -mbmi -mno-sgx -mno-bmi2 -mtbm -mavx -mno-avx2 -msse4.2 -msse4.1 -mlzcnt -mno-rtm -mno-hle -mno-rdrnd -mf16c -mno-fsgsbase -mno-rdseed -mprfchw -mno-adx -mfxsr -mxsave -mno-xsaveopt -mno-avx512f -mno-avx512er -mno-avx512cd -mno-avx512pf -mno-prefetchwt1 -mno-clflushopt -mno-xsavec -mno-xsaves -mno-avx512dq -mno-avx512bw -mno-avx512vl -mno-avx512ifma -mno-avx512vbmi -mno-avx5124fmaps -mno-avx5124vnniw -mno-clwb -mno-mwaitx -mno-clzero -mno-pku -mno-rdpid --param "l1-cache-size=16" --param "l1-cache-line-size=64" --param "l2-cache-size=2048" "-mtune=bdver2"
<...>
```

But clang does not: (look for `bdver1`)
```
$ echo | clang -E - -march=native -###
clang version 7.0.0- (trunk)
Target: x86_64-pc-linux-gnu
Thread model: posix
InstalledDir: /usr/local/bin
 "/usr/lib/llvm-7/bin/clang" "-cc1" "-triple" "x86_64-pc-linux-gnu" "-E" "-disable-free" "-disable-llvm-verifier" "-discard-value-names" "-main-file-name" "-" "-mrelocation-model" "static" "-mthread-model" "posix" "-mdisable-fp-elim" "-fmath-errno" "-masm-verbose" "-mconstructor-aliases" "-munwind-tables" "-fuse-init-array" "-target-cpu" "bdver1" "-target-feature" "+sse2" "-target-feature" "+cx16" "-target-feature" "+sahf" "-target-feature" "+tbm" "-target-feature" "-avx512ifma" "-target-feature" "-sha" "-target-feature" "-gfni" "-target-feature" "+fma4" "-target-feature" "-vpclmulqdq" "-target-feature" "+prfchw" "-target-feature" "-bmi2" "-target-feature" "-cldemote" "-target-feature" "-fsgsbase" "-target-feature" "-xsavec" "-target-feature" "+popcnt" "-target-feature" "+aes" "-target-feature" "-avx512bitalg" "-target-feature" "-xsaves" "-target-feature" "-avx512er" "-target-feature" "-avx512vnni" "-target-feature" "-avx512vpopcntdq" "-target-feature" "-clwb" "-target-feature" "-avx512f" "-target-feature" "-clzero" "-target-feature" "-pku" "-target-feature" "+mmx" "-target-feature" "+lwp" "-target-feature" "-rdpid" "-target-feature" "+xop" "-target-feature" "-rdseed" "-target-feature" "-waitpkg" "-target-feature" "-ibt" "-target-feature" "+sse4a" "-target-feature" "-avx512bw" "-target-feature" "-clflushopt" "-target-feature" "+xsave" "-target-feature" "-avx512vbmi2" "-target-feature" "-avx512vl" "-target-feature" "-avx512cd" "-target-feature" "+avx" "-target-feature" "-vaes" "-target-feature" "-rtm" "-target-feature" "+fma" "-target-feature" "+bmi" "-target-feature" "-rdrnd" "-target-feature" "-mwaitx" "-target-feature" "+sse4.1" "-target-feature" "+sse4.2" "-target-feature" "-avx2" "-target-feature" "-wbnoinvd" "-target-feature" "+sse" "-target-feature" "+lzcnt" "-target-feature" "+pclmul" "-target-feature" "-prefetchwt1" "-target-feature" "+f16c" "-target-feature" "+ssse3" "-target-feature" "-sgx" "-target-feature" "-shstk" "-target-feature" "+cmov" "-target-feature" "-avx512vbmi" "-target-feature" "-movbe" "-target-feature" "-xsaveopt" "-target-feature" "-avx512dq" "-target-feature" "-adx" "-target-feature" "-avx512pf" "-target-feature" "+sse3" "-dwarf-column-info" "-debugger-tuning=gdb" "-resource-dir" "/usr/lib/llvm-7/lib/clang/7.0.0" "-internal-isystem" "/usr/local/include" "-internal-isystem" "/usr/lib/llvm-7/lib/clang/7.0.0/include" "-internal-externc-isystem" "/usr/include/x86_64-linux-gnu" "-internal-externc-isystem" "/include" "-internal-externc-isystem" "/usr/include" "-fdebug-compilation-dir" "/build/llvm-build-Clang-release" "-ferror-limit" "19" "-fmessage-length" "271" "-fobjc-runtime=gcc" "-fdiagnostics-show-option" "-fcolor-diagnostics" "-o" "-" "-x" "c" "-"
```

So clang, unlike gcc, considers this to be `bdver1`.

After some digging, i've come across `getAMDProcessorTypeAndSubtype()` in `Host.cpp`.
I have added the following debug printf after the call to that function in `sys::getHostCPUName()`:
```
errs() << "Family " << Family << " Model " << Model << " Type " << Type "\n";
```
Which produced:
```
Family 21 Model 2 Type 5
```
Which matches the `lscpu` output.

As it was pointed in the review by @craig.topper:
>>! In D46314#1084123, @craig.topper wrote:
> I dont' think this is right. Here is what I found on wikipedia. https://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures.
>
> AMD Bulldozer Family 15h - the successor of 10h/K10. Bulldozer is designed for processors in the 10 to 220W category, implementing XOP, FMA4 and CVT16 instruction sets. Orochi was the first design which implemented it. For Bulldozer, CPUID model numbers are 00h and 01h.
> AMD Piledriver Family 15h (2nd-gen) - successor to Bulldozer. CPUID model numbers are 02h (earliest "Vishera" Piledrivers) and 10h-1Fh.
> AMD Steamroller Family 15h (3rd-gen) - third-generation Bulldozer derived core. CPUID model numbers are 30h-3Fh.
> AMD Excavator Family 15h (4th-gen) - fourth-generation Bulldozer derived core. CPUID model numbers are 60h-6Fh, later updated revisions have model numbers 70h-7Fh.
>
>
> So there's a weird exception where model 2 should go with 0x10-0x1f.

Though It does not help that the code can't be tested at the moment.
With this logical change, the `bdver2` is properly detected.
```
$ echo | /build/llvm-build-Clang-release/bin/clang -E - -march=native -###
clang version 7.0.0 (trunk 331249) (llvm/trunk 331256)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /build/llvm-build-Clang-release/bin
 "/build/llvm-build-Clang-release/bin/clang-7" "-cc1" "-triple" "x86_64-unknown-linux-gnu" "-E" "-disable-free" "-main-file-name" "-" "-mrelocation-model" "static" "-mthread-model" "posix" "-mdisable-fp-elim" "-fmath-errno" "-masm-verbose" "-mconstructor-aliases" "-munwind-tables" "-fuse-init-array" "-target-cpu" "bdver2" "-target-feature" "+sse2" "-target-feature" "+cx16" "-target-feature" "+sahf" "-target-feature" "+tbm" "-target-feature" "-avx512ifma" "-target-feature" "-sha" "-target-feature" "-gfni" "-target-feature" "+fma4" "-target-feature" "-vpclmulqdq" "-target-feature" "+prfchw" "-target-feature" "-bmi2" "-target-feature" "-cldemote" "-target-feature" "-fsgsbase" "-target-feature" "-xsavec" "-target-feature" "+popcnt" "-target-feature" "+aes" "-target-feature" "-avx512bitalg" "-target-feature" "-movdiri" "-target-feature" "-xsaves" "-target-feature" "-avx512er" "-target-feature" "-avx512vnni" "-target-feature" "-avx512vpopcntdq" "-target-feature" "-clwb" "-target-feature" "-avx512f" "-target-feature" "-clzero" "-target-feature" "-pku" "-target-feature" "+mmx" "-target-feature" "+lwp" "-target-feature" "-rdpid" "-target-feature" "+xop" "-target-feature" "-rdseed" "-target-feature" "-waitpkg" "-target-feature" "-movdir64b" "-target-feature" "-ibt" "-target-feature" "+sse4a" "-target-feature" "-avx512bw" "-target-feature" "-clflushopt" "-target-feature" "+xsave" "-target-feature" "-avx512vbmi2" "-target-feature" "-avx512vl" "-target-feature" "-avx512cd" "-target-feature" "+avx" "-target-feature" "-vaes" "-target-feature" "-rtm" "-target-feature" "+fma" "-target-feature" "+bmi" "-target-feature" "-rdrnd" "-target-feature" "-mwaitx" "-target-feature" "+sse4.1" "-target-feature" "+sse4.2" "-target-feature" "-avx2" "-target-feature" "-wbnoinvd" "-target-feature" "+sse" "-target-feature" "+lzcnt" "-target-feature" "+pclmul" "-target-feature" "-prefetchwt1" "-target-feature" "+f16c" "-target-feature" "+ssse3" "-target-feature" "-sgx" "-target-feature" "-shstk" "-target-feature" "+cmov" "-target-feature" "-avx512vbmi" "-target-feature" "-movbe" "-target-feature" "-xsaveopt" "-target-feature" "-avx512dq" "-target-feature" "-adx" "-target-feature" "-avx512pf" "-target-feature" "+sse3" "-dwarf-column-info" "-debugger-tuning=gdb" "-resource-dir" "/build/llvm-build-Clang-release/lib/clang/7.0.0" "-internal-isystem" "/usr/local/include" "-internal-isystem" "/build/llvm-build-Clang-release/lib/clang/7.0.0/include" "-internal-externc-isystem" "/usr/include/x86_64-linux-gnu" "-internal-externc-isystem" "/include" "-internal-externc-isystem" "/usr/include" "-fdebug-compilation-dir" "/build/llvm-build-Clang-release" "-ferror-limit" "19" "-fmessage-length" "271" "-fobjc-runtime=gcc" "-fdiagnostics-show-option" "-fcolor-diagnostics" "-o" "-" "-x" "c" "-"
```

Reviewers: craig.topper, asbirlea, rnk, GGanesh, andreadb

Reviewed By: craig.topper

Subscribers: sdardis, dberris, aprantl, arichardson, JDevlieghere, #sanitizers, llvm-commits, cfe-commits, craig.topper

Differential Revision: https://reviews.llvm.org/D46323

llvm-svn: 331295
2018-05-01 18:40:15 +00:00
Shiva Chen 77f19a384c [PATCH] [compiler-rt, RISCV] Support builtins for RISC-V
Summary:
Support builtins for RISC-V, RV32 and RV64.

Reviewers: asb, apazos, mgrang

Differential Revision: https://reviews.llvm.org/D42958

llvm-svn: 326420
2018-03-01 07:47:27 +00:00
Mandeep Singh Grang d34e876185 [RISCV] Force enable int128 for compiling long double routines
Summary:
For RISCV32, we must force enable int128 for compiling long double routines using the flag -fforce-enable-int128.

Related clang patch: https://reviews.llvm.org/D43105

Reviewers: asb, kito-cheng, apazos, compnerd, howard.hinnant

Reviewed By: kito-cheng

Subscribers: shiva0217, efriedma, mgorny, hintonda, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D43106

llvm-svn: 326346
2018-02-28 18:24:09 +00:00
Jonas Devlieghere 1db3ca9ab1 [builtins] Workaround for infinite recursion in c?zdi2
gcc resolves `__builtin_c?z` to `__c?zdi2` which leads to infinite
recursion. This problem has been observed for sparc64, mips64 and riscv.
Presumably this happens whenever an arch without dedicated bit counting
instructions is targeted. This patch provides a workaround.

Differential revision: https://reviews.llvm.org/D42902

llvm-svn: 324593
2018-02-08 11:14:11 +00:00
Martin Storsjo 09bc73d11f [builtins] Align addresses to cache lines in __clear_cache for aarch64
This makes sure that the last cache line gets invalidated properly.

This matches the example code at
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/BABJDBHI.html,
and also matches what libgcc does.

Differential Revision: https://reviews.llvm.org/D42196

llvm-svn: 323315
2018-01-24 10:14:52 +00:00
Kamil Rytarowski f086a5ab03 [compiler-rt] Implement __clear_cache() on OpenBSD/mips64
Summary:
Make __clear_cache() invoke the platform's cache flush function
on OpenBSD/mips64.

Reviewers: krytarowski

Reviewed By: krytarowski

Subscribers: sdardis, dberris, arichardson, krytarowski, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D42332

llvm-svn: 323039
2018-01-20 14:16:16 +00:00
Martin Storsjo fe011a6ed9 [builtins] Use FlushInstructionCache on windows on aarch64 as well
Generalize this handling to a separate toplevel ifdef (since any
windows case should use the same function), instead of indenting
the aarch64 case one step further.

Differential Revision: https://reviews.llvm.org/D42197

llvm-svn: 322928
2018-01-19 07:34:46 +00:00
Dimitry Andric 60c7f2d9ce Fix PR35739: chkstk and chkst2 should only be built for Windows
As reported in PR35739, rL252927 added the Windows specific chkstk and
chkstk2 sources unconditionally, and since these are assembly without a
NO_EXEC_STACK_DIRECTIVE at the end, automated vulnerability scanners
warned about the objects having an executable stack.

Avoid the problem by only including these files when Windows is
targeted.

Reviewers: compnerd, rnk, martell

Reviewed By: martell

Subscribers: mstorsjo, mgorny, martell, javed.absar, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D41567

llvm-svn: 321431
2017-12-24 21:11:32 +00:00
Martin Storsjo f8e19b3799 [builtins] Implement __chkstk for arm64 windows
Differential Revision: https://reviews.llvm.org/D41134

llvm-svn: 321151
2017-12-20 06:52:52 +00:00
Dimitry Andric e4f5d01033 Fix more inconsistent line endings. NFC.
llvm-svn: 321016
2017-12-18 19:46:56 +00:00
Sterling Augustine 9b6943f103 Add powerpc64 to compiler-rt build infrastructure.
Now that we have disabled the run-forever tests, and cleaned up the
intel 80-bit float based tests, we should be able to enable testing
compiler-rt for powerpc64.

llvm-svn: 319474
2017-11-30 21:04:11 +00:00
Sterling Augustine 9750f662f7 Move x86-specific sources to x86-specific source lists.
llvm-svn: 319464
2017-11-30 19:39:33 +00:00
Alexander Richardson 23e70e6f57 Fix the MIPS baremetal build
Summary:
Currently sys/cachectl.h is used unconditionally on MIPS although it is
only available on Linux and will fail the build when targeting baremetal

Reviewers: petarj

Reviewed By: petarj

Subscribers: sdardis, krytarowski

Differential Revision: https://reviews.llvm.org/D40659

llvm-svn: 319455
2017-11-30 18:37:04 +00:00
Craig Topper 436c9263fb [X86] Add cpu detection for cannonlake.
This uses the same encoding for cannonlake in the proposed gcc patches here. https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00551.html

llvm-svn: 318610
2017-11-19 00:46:21 +00:00
Martin Storsjo 5fe3b4b266 [builtins] Include GENERIC_SOURCES in arm_SOURCES for MinGW
It is included in the built sources for all other arches supported
for MinGW currently, except for arm.

Differential Revision: https://reviews.llvm.org/D39938

llvm-svn: 318139
2017-11-14 07:07:01 +00:00
Weiming Zhao e58bb5dc4e [Builtins] Do not use tailcall for Thumb1
Summary:
The `b` instruction in Thumb1 has limited range, which may cause link-time errors if the jump target is far away.
This patch guards the tailcalls for non-Thumb1

Reviewers: peter.smith, compnerd, rengolin, eli.friedman

Reviewed By: rengolin

Subscribers: joerg, dalias, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D39700

llvm-svn: 317814
2017-11-09 17:32:57 +00:00