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Author SHA1 Message Date
Kito Cheng eb9bc38276 [ELF][RISCV] Support RISC-V in getBitcodeMachineKind 
Add Triple::riscv64 and Triple::riscv32 to getBitcodeMachineKind for get right
e_machine during LTO.

Reviewed By: ruiu, MaskRay

Differential Revision: https://reviews.llvm.org/D52165

llvm-svn: 364996
 2019-07-03 02:13:11 +00:00