Commit Graph

388107 Commits

Author SHA1 Message Date
Dmitry Vyukov 1dc838717a tsan: fix syscall test on aarch64
Add missing includes and use SYS_pipe2 instead of SYS_pipe
as it's not present on some arches.

Differential Revision: https://reviews.llvm.org/D102311
2021-05-12 09:00:51 +02:00
Martin Storsjö 382c505d9c [COFF] Fix ARM and ARM64 REL32 relocations to be relative to the end of the relocation
This matches how they are defined on X86.

This should fix the relative lookup tables pass for COFF, allowing
it to be reenabled.

Differential Revision: https://reviews.llvm.org/D102217
2021-05-12 09:53:43 +03:00
Dmitry Vyukov 2721e27c3a sanitizer_common: deduplicate CheckFailed
We have some significant amount of duplication around
CheckFailed functionality. Each sanitizer copy-pasted
a chunk of code. Some got random improvements like
dealing with recursive failures better. These improvements
could benefit all sanitizers, but they don't.

Deduplicate CheckFailed logic across sanitizers and let each
sanitizer only print the current stack trace.
I've tried to dedup stack printing as well,
but this got me into cmake hell. So let's keep this part
duplicated in each sanitizer for now.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D102221
2021-05-12 08:50:53 +02:00
Qiu Chaofan febbe4b5a0 [PowerPC] [Clang] Enable float128 feature on VSX targets
Reviewed By: nemanjai, steven.zhang

Differential Revision: https://reviews.llvm.org/D92815
2021-05-12 14:33:41 +08:00
Kristina Bessonova f8306647fa [libcxx][test] Split more debug mode tests
Split a few more debug mode tests missed in D100592.

Differential Revision: https://reviews.llvm.org/D102194
2021-05-12 08:28:16 +02:00
Dmitry Vyukov 23596fece0 sanitizer_common: don't write into .rodata
setlocale interceptor imitates a write into result,
which may be located in .rodata section.
This is the only interceptor that tries to do this and
I think the intention was to initialize the range for msan.
So do that instead. Writing into .rodata shouldn't happen
(without crashing later on the actual write) and this
traps on my local tsan experiments.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D102161
2021-05-12 07:54:06 +02:00
Vitaly Buka 85a96d82ca [symbolizer] Fix leak after D96883 2021-05-11 22:51:36 -07:00
Dmitry Vyukov 53558ed8a0 sanitizer_common: fix SIG_DFL warning
Currently we have:

sanitizer_posix_libcdep.cpp:146:27: warning: cast between incompatible
  function types from ‘__sighandler_t’ {aka ‘void (*)(int)’} to ‘sa_sigaction_t’
  146 |     sigact.sa_sigaction = (sa_sigaction_t)SIG_DFL;

We don't set SA_SIGINFO, so we need to assign to sa_handler.
And SIG_DFL is meant for sa_handler, so this gets rid of both
compiler warning, type cast and potential runtime misbehavior.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D102162
2021-05-12 07:23:20 +02:00
Dmitry Vyukov 8214764f35 tsan: declare annotations in test.h
We already declare subset of annotations in test.h.
But some are duplicated and declared in tests.
Move all annotation declarations to test.h.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D102152
2021-05-12 07:22:39 +02:00
Qiu Chaofan 6d2df18163 [VectorComine] Restrict single-element-store index to inbounds constant
Vector single element update optimization is landed in 2db4979. But the
scope needs restriction. This patch restricts the index to inbounds and
vector must be fixed sized. In future, we may use value tracking to
relax constant restrictions.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D102146
2021-05-12 13:18:20 +08:00
Dmitry Vyukov 5dad3d1ba9 tsan: mark sigwait as blocking
Add a test case reported in:
https://github.com/google/sanitizers/issues/1401
and fix it.
The code assumes sigwait will process other signals.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D102057
2021-05-12 06:56:18 +02:00
Dmitry Vyukov 04b2ada51c tsan: add a simple syscall test
Add a simple test that uses syscall annotations.
Just to ensure at least basic functionality works.
Also factor out annotated syscall wrappers into a separate
header file as they may be useful for future tests.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D102223
2021-05-12 06:42:11 +02:00
Chia-hung Duan f653313d4a [mlir][AsmPrinter] Remove recursion while SSA naming
Address the TODO of removing recursion while SSA naming.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D102226
2021-05-12 11:23:01 +08:00
Vitaly Buka 7d101e0f6a [NFC][msan] Move setlocale test into sanitizer_common 2021-05-11 19:05:07 -07:00
Congzhe Cao 3f8be15f29 [LoopInterchange] Handle lcssa PHIs with multiple predecessors
This is a bugfix in the transformation phase.

If the original outer loop header branches to both the inner loop
(header) and the outer loop latch, and if there is an lcssa PHI
node outside the loop nest, then after interchange the new outer latch
will have an lcssa PHI node inserted which has two predecessors, i.e.,
the original outer header and the original outer latch. Currently
the transformation assumes it has only one predecessor (the original
outer latch) and crashes, since the inserted lcssa PHI node does
not take both predecessors as incoming BBs.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D100792
2021-05-11 21:30:54 -04:00
Jim Ingham 10c309ad81 Removing test...
Actually, I don't think this test is going to be stable enough
to be worthwhile.  Let me see if I can think of a better way to
test this.
2021-05-11 18:27:37 -07:00
Matt Arsenault cc79aaced0 AMDGPU: Fix SILoadStoreOptimizer for gfx90a
This was hardcoding the register class to use for the newly created
pointer registers, violating the aligned VGPR requirement.
2021-05-11 21:26:43 -04:00
Jim Ingham 0f2eb7e6e5 This test is failing on Linux, skip while I investigate.
The gdb-remote tests are a bit artificial, depending on
Python threading, and sleeps.  So I'm not 100% surprised it doesn't
work straight up on another XSsystem.
2021-05-11 18:13:56 -07:00
Sam Clegg 19cedd3cd3 [lld][WebAssembly] Fix for string merging + negative addends
Don't include the relocation addend when calculating the
virtual address of a symbol.  Instead just pass the symbol's
offset and add the addend afterwards.

Without this fix we hit the `offset is outside the section`
error in MergeInputSegment::getSegmentPiece.

This fixes a real world error we were are seeing in emscripten.

Differential Revision: https://reviews.llvm.org/D102271
2021-05-11 17:47:57 -07:00
Richard Smith bb726383ac Revert "Fix bad mangling of <data-member-prefix> for a closure in the initializer of a variable at global namespace scope."
This reverts commit 697ac15a0f, for which
review was not complete. That change was accidentally pushed when
an unrelated change was pushed.
2021-05-11 17:46:18 -07:00
Richard Smith 3978333b71 Add test for PR50039.
I believe Clang's behavior is correct according to the standard here,
but this is an unusual situation for which we had no test coverage, so
I'm adding some.
2021-05-11 17:35:34 -07:00
Richard Smith 697ac15a0f Fix bad mangling of <data-member-prefix> for a closure in the initializer of a variable at global namespace scope.
This implements the direction proposed in
https://github.com/itanium-cxx-abi/cxx-abi/pull/126.

Differential Revision: https://reviews.llvm.org/D101968
2021-05-11 17:35:33 -07:00
Matt Arsenault 6f5ddf6731 GlobalISel: Don't hardcode varargs=false in resultsCompatible 2021-05-11 20:22:06 -04:00
Matt Arsenault a15ed701ab AMDGPU: Fix assert on constant load from addrspacecasted pointer
This was trying to create a bitcast between different address spaces.
2021-05-11 20:12:20 -04:00
Matt Arsenault 6ecbdb761f GlobalISel: Make constant fields const 2021-05-11 20:10:55 -04:00
Matt Arsenault 24e2e5df0e GlobalISel: Split ValueHandler into assignment and emission classes
Currently the ValueHandler handles both selecting the type and
location for arguments, as well as inserting instructions needed to
handle them. Split this so that the determination of the argument
handling is independent of the function state. Currently the checks
for tail call compatibility do not follow the full assignment logic,
so it misses cases where arguments require nontrivial legalization.

This should help avoid targets ending up in a buggy state where the
argument evaluation may change in different contexts.
2021-05-11 19:50:12 -04:00
Matt Arsenault 2bdfcf0cac GlobalISel: Move AArch64 AssignFnVarArg to base class
We can handle the distinction easily enough in the generic code, and
this makes it easier to abstract the selection of type/location from
the code to insert code.
2021-05-11 19:50:12 -04:00
Jordan Rupprecht fec2945998 Revert "[GVN] Clobber partially aliased loads."
This reverts commit 6c57044231.

It causes assertion errors due to widening atomic loads, and potentially causes miscompile elsewhere too. Repro, also posted to D95543:

```
$ cat repro.ll
; ModuleID = 'repro.ll'
source_filename = "repro.ll"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.widget = type { i32 }
%struct.baz = type { i32, %struct.snork }
%struct.snork = type { %struct.spam }
%struct.spam = type { i32, i32 }

@global = external local_unnamed_addr global %struct.widget, align 4
@global.1 = external local_unnamed_addr global i8, align 1
@global.2 = external local_unnamed_addr global i32, align 4

define void @zot(%struct.baz* %arg) local_unnamed_addr align 2 {
bb:
  %tmp = getelementptr inbounds %struct.baz, %struct.baz* %arg, i64 0, i32 1
  %tmp1 = bitcast %struct.snork* %tmp to i64*
  %tmp2 = load i64, i64* %tmp1, align 4
  %tmp3 = getelementptr inbounds %struct.baz, %struct.baz* %arg, i64 0, i32 1, i32 0, i32 1
  %tmp4 = icmp ugt i64 %tmp2, 4294967295
  br label %bb5

bb5:                                              ; preds = %bb14, %bb
  %tmp6 = load i32, i32* %tmp3, align 4
  %tmp7 = icmp ne i32 %tmp6, 0
  %tmp8 = select i1 %tmp7, i1 %tmp4, i1 false
  %tmp9 = zext i1 %tmp8 to i8
  store i8 %tmp9, i8* @global.1, align 1
  %tmp10 = load i32, i32* @global.2, align 4
  switch i32 %tmp10, label %bb11 [
    i32 1, label %bb12
    i32 2, label %bb12
  ]

bb11:                                             ; preds = %bb5
  br label %bb14

bb12:                                             ; preds = %bb5, %bb5
  %tmp13 = load atomic i32, i32* getelementptr inbounds (%struct.widget, %struct.widget* @global, i64 0, i32 0) acquire, align 4
  br label %bb14

bb14:                                             ; preds = %bb12, %bb11
  br label %bb5
}
$ opt -O2 repro.ll -disable-output
opt: /home/rupprecht/src/llvm-project/llvm/lib/Transforms/Utils/VNCoercion.cpp:496: llvm::Value *llvm::VNCoercion::getLoadValueForLoad(llvm::LoadInst *, unsigned int, llvm::Type *, llvm::Instruction *, const llvm::DataLayout &): Assertion `SrcVal->isSimple() && "Cannot widen volatile/atomic load!"' failed.
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0.      Program arguments: /home/rupprecht/dev/opt -O2 repro.ll -disable-output
...
```
2021-05-11 16:08:53 -07:00
Lang Hames d63860a052 [JITLink] Fix bogus format string. 2021-05-11 16:04:00 -07:00
Leonard Chan 5cb17728d1 [clang][Fuchsia] Introduce compat multilibs
These are GCC-compatible multilibs that use the generic Itanium C++ ABI
instead of the Fuchsia C++ ABI.

Differential Revision: https://reviews.llvm.org/D102030
2021-05-11 15:45:38 -07:00
Congzhe Cao 40e3aa39bd [LoopInterchange] Fix legality for triangular loops
This is a bug fix in legality check.

When we encounter triangular loops such as the following form:
    for (int i = 0; i < m; i++)
      for (int j = 0; j < i; j++), or

    for (int i = 0; i < m; i++)
      for (int j = 0; j*i < n; j++),

we should not perform interchange since the number of executions
of the loop body will be different before and after interchange,
resulting in incorrect results.

Reviewed By: bmahjour

Differential Revision: https://reviews.llvm.org/D101305
2021-05-11 18:36:53 -04:00
Petr Hosek 8280ece0c9 [Coverage] Support overriding compilation directory
When making compilation relocatable, for example in distributed
compilation scenarios, we want to set compilation dir to a relative
value like `.` but this presents a problem when generating reports
because if the file path is relative as well, for example `..`, you
may end up writing files outside of the output directory.

This change introduces a flag that allows overriding the compilation
directory that's stored inside the profile with a different value that
is absolute.

Differential Revision: https://reviews.llvm.org/D100232
2021-05-11 15:26:45 -07:00
Lang Hames a0162a81b1 [JITLink][MachO/x86_64] Expose API for creating eh-frame fixing passes.
These can be used to create eh-frame section fixing passes outside the usual
linker pipeline, which can be useful for tests and tools that just want to
verify or dump graphs.
2021-05-11 15:26:16 -07:00
Lang Hames 74a96b4c98 [JITLink][x86-64] Add an x86_64 PointerSize constexpr.
This can be used in place of magic '8' values in generic x86-64 utilities.
2021-05-11 15:26:15 -07:00
Lang Hames cbcfca343f [JITLink] Make LinkGraph debug dumps more readable.
This commit reorders some fields and fixes the width of others to try to
maintain more consistent columns. It also switches to long-hand scope
and linkage names, since LinkGraph dumps aren't read often enough for
single-character codes to be memorable.
2021-05-11 15:26:15 -07:00
Victor Huang 46475a79f8 [AIX][TLS] Diagnose use of unimplemented TLS models
Add front end diagnostics to report error for unimplemented TLS models set by
- compiler option `-ftls-model`
- attributes like `__thread int __attribute__((tls_model("local-exec"))) var_name;`

Reviewed by: aaron.ballman, nemanjai, PowerPC

Differential Revision: https://reviews.llvm.org/D102070
2021-05-11 17:21:08 -05:00
Congzhe Cao d3f89d4d16 Revert "[LoopInterchange] Fix legality for triangular loops"
This reverts commit 29342291d2.

The test case requires an assert build. Will add REQUIRES and re-commit.
2021-05-11 18:10:58 -04:00
Petr Hosek 489a3531a4 [llvm-cov] Support for v4 format in convert-for-testing
v4 moves function records to a dedicated section so we need to write
and read it separately.

https://reviews.llvm.org/D100535
2021-05-11 14:41:55 -07:00
Evandro Menezes 3a64b7080d [RISCV] Move instruction information into the RISCVII namespace (NFC)
Move instruction attributes into the `RISCVII` namespace and add associated helper functions.

Differential Revision: https://reviews.llvm.org/D102268
2021-05-11 16:32:42 -05:00
Nikita Popov 1556540372 [InstCombine] Clean up one-hot merge optimization (NFC)
Remove the requirement that the instruction is a BinaryOperator,
make the predicate check more compact and use slightly more
meaningful naming for the and operands.
2021-05-11 23:22:11 +02:00
Rob Suderman 764ad3b3fa [mlir][tosa] Tosa elementwise broadcasting had some minor bugs
Updated tests to include broadcast of left and right. Includes
bypass if in-type and out-type match shape (no broadcasting).

Differential Revision: https://reviews.llvm.org/D102276
2021-05-11 13:58:06 -07:00
River Riddle a9bbbaaa88 [mlir] Elide large elements attrs when printing Operations in diagnostics
Diagnostics are intended to be read by users, and in most cases displayed in a terminal. When not eliding huge element attributes, in some cases we end up dumping hundreds of megabytes(gigabytes) to the terminal (or logs), completely obfuscating the main diagnostic being shown.

Differential Revision: https://reviews.llvm.org/D102272
2021-05-11 13:50:27 -07:00
Alex Orlov ebdcebfcb4 Removed unnecessary introduction of semi-colons. 2021-05-12 00:46:00 +04:00
Austin Kerbow 4433f4601e [AMDGPU] Fix extra waitcnt being added with BUFFER_INVL2
The waitcnt pass would increment the number of vmem events for some buffer
invalidates that were not handled by the pass.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D102252
2021-05-11 13:17:33 -07:00
Evgenii Stepanov a7757f6c22 [hwasan] Stress test for thread creation.
This test has two modes - testing reused threads with multiple loops of
batch create/join, and testing new threads with a single loop of
create/join per fork.

The non-reuse variant catches the problem that was fixed in D101881 with
a high probability.

Differential Revision: https://reviews.llvm.org/D101936
2021-05-11 13:10:53 -07:00
Craig Topper d092dd56ae [RISCV] Regenerate stepvector.ll. NFC
It looks like the RV32 and RV64 prefixes were removed from the
RUN lines while another patch was in review that added check
lines that used them.
2021-05-11 13:04:57 -07:00
Christopher Pulido 4fb0aaf033 [OpenMP] Changes to enable MSVC ARM64 build of libomp
This is the first in a series of changes to the OpenMP runtime
that have been done internally by Microsoft. This patch makes
the necessary changes to enable libomp.dll to build with
the MSVC compiler targeting ARM64.

Differential Revision: https://reviews.llvm.org/D101173
2021-05-11 23:03:12 +03:00
Albion Fung ffbffaf6b6 [PowerPC] Improve codegen for int-to-fp conversion of subword vector extract
When an integer is converted into floating point in subword vector extract,
it can be done in 2 instructions instead of the 3+ instructions it generates
right now. This patch removes the uncessary generation.

Differential: https://reviews.llvm.org/D100604
2021-05-11 15:00:11 -05:00
Amara Emerson 69069509b2 [AArch64][GlobaISel] Mark target generic instructions as HasNoSideEffects.
One test needed updating because the newly side-effect-free instructions were
now being DCE'd.
2021-05-11 12:38:53 -07:00
Vitaly Buka 2a73b7bd8c [NFC][LSAN] Limit the number of concurrent threads is the test
Test still fails with D88184 reverted.

The test was flaky on https://bugs.chromium.org/p/chromium/issues/detail?id=1206745 and
https://lab.llvm.org/buildbot/#/builders/sanitizer-x86_64-linux

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D102218
2021-05-11 12:32:53 -07:00