llvm-project

Author SHA1 Message Date

Author	SHA1	Message	Date
Ulrich Weigand	cca8578efa	[SystemZ] Allow specifying integer registers as part of the address calculation Revision `e1de2773a5` provided support for accepting integer registers in inline asm i.e. __asm("lhi %r0, 5") -> lhi %r0, 5 __asm("lhi 0, 5") -> lhi 0,5 This patch aims to extend this support to instructions which compute addresses as well. (i.e instructions of type BDMem and BD[X\|R\|V\|L]Mem) Author: anirudhp Differential Revision: https://reviews.llvm.org/D83251	2020-07-08 18:20:24 +02:00
Ulrich Weigand	819c1651f7	[SystemZ] Support z15 processor name The recently announced IBM z15 processor implements the architecture already supported as "arch13" in LLVM. This patch adds support for "z15" as an alternate architecture name for arch13. The patch also uses z15 in a number of places where we used arch13 as long as the official name was not yet announced. llvm-svn: 372435	2019-09-20 23:04:45 +00:00

Ulrich Weigand

cca8578efa

[SystemZ] Allow specifying integer registers as part of the address calculation

Revision e1de2773a5 provided support for
accepting integer registers in inline asm i.e.

__asm("lhi %r0, 5") -> lhi %r0, 5
__asm("lhi 0, 5") -> lhi 0,5

This patch aims to extend this support to instructions which compute
addresses as well. (i.e instructions of type BDMem and BD[X|R|V|L]Mem)

Author: anirudhp

Differential Revision: https://reviews.llvm.org/D83251

2020-07-08 18:20:24 +02:00

Ulrich Weigand

819c1651f7

[SystemZ] Support z15 processor name

The recently announced IBM z15 processor implements the architecture
already supported as "arch13" in LLVM.  This patch adds support for
"z15" as an alternate architecture name for arch13.

The patch also uses z15 in a number of places where we used arch13
as long as the official name was not yet announced.

llvm-svn: 372435

2019-09-20 23:04:45 +00:00

2 Commits