Commit Graph

5 Commits

Author SHA1 Message Date
Matt Arsenault 291ece0efa AMDGPU/GlobalISel: Remove some selection tests which should be invalid
These use undef generic virtual register operands, which should be
rejected by the verifier.
2020-06-30 19:18:01 -04:00
Matt Arsenault 555e7ee04c AMDGPU/GlobalISel: Don't use XEXEC class for SGPRs
We don't use the xexec register classes for arbitrary values
anymore. Avoids a test variance beween GlobalISel and SelectionDAG>
2020-01-12 22:44:51 -05:00
Matt Arsenault f9a42ed0a7 AMDGPU: Relax 32-bit SGPR register class
Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This
will allow the register coalescer to do a better job eliminating
copies to m0.

For GlobalISel, as a terrible hack, use SGPR_32 for things that should
use SCC until booleans are solved.

llvm-svn: 375267
2019-10-18 18:26:37 +00:00
Matt Arsenault 12994a70cf AMDGPU: Use SGPR_128 instead of SReg_128 for vregs
SGPR_128 only includes the real allocatable SGPRs, and SReg_128 adds
the additional non-allocatable TTMP registers. There's no point in
allocating SReg_128 vregs. This shrinks the size of the classes
regalloc needs to consider, which is usually good.

llvm-svn: 374284
2019-10-10 07:11:33 +00:00
Matt Arsenault a65913e752 AMDGPU/GlobalISel: Select easy cases for G_BUILD_VECTOR
llvm-svn: 366087
2019-07-15 17:26:43 +00:00