Commit Graph

130607 Commits

Author SHA1 Message Date
Philip Reames eedef73b63 [unordered] Extend load/store type canonicalization to handle unordered operations
Extend the type canonicalization logic to work for unordered atomic loads and stores.  Note that while this change itself is fairly simple and low risk, there's a reasonable chance this will expose problems in the backends by suddenly generating IR they wouldn't have seen before.  Anything of this nature will be an existing bug in the backend (you could write an atomic float load), but this will definitely change the frequency with which such cases are encountered.  If you see problems, feel free to revert this change, but please make sure you collect a test case.  

llvm-svn: 267210
2016-04-22 20:33:48 +00:00
Matt Arsenault 629d12de70 DAGCombiner: Relax alignment restriction when changing load type
If the target allows the alignment, this should still be OK.

llvm-svn: 267209
2016-04-22 20:21:36 +00:00
Quentin Colombet 10768ab09e [AArch64] Fix optimizeCondBranch logic.
The opcode for the optimized branch does not depend on the size
of the activate bits in the AND masks, but the AND opcode itself.
Indeed, we need to use a X or W variant based on the AND variant
not based on whether the mask fits into the related variant.
Otherwise, we may end up using the W variant of the optimized branch
for 64-bit register inputs!

This fixes the last make check verifier issues for AArch64: PR27479.

llvm-svn: 267206
2016-04-22 20:09:58 +00:00
Justin Bogner b93949089e PM: Port SinkingPass to the new pass manager
llvm-svn: 267199
2016-04-22 19:54:10 +00:00
Justin Bogner 82077c4ab0 PM: Reorder the functions used for SinkingPass. NFC
This will make the port to the new PM easier to follow.

llvm-svn: 267198
2016-04-22 19:54:04 +00:00
Jun Bum Lim d29a24e4fd [DeadStoreElimination] Shorten beginning of memset overwritten by later stores
Summary: This change will shorten memset if the beginning of memset is overwritten by later stores.

Reviewers: hfinkel, eeckstein, dberlin, mcrosier

Subscribers: mgrang, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18906

llvm-svn: 267197
2016-04-22 19:51:29 +00:00
Justin Bogner 395c2127ed PM: Port DCE to the new pass manager
Also add a very basic test, since apparently there aren't any tests
for DCE whatsoever to add the new pass version to.

llvm-svn: 267196
2016-04-22 19:40:41 +00:00
Matthias Braun 4f57377c68 MachineScheduler: Move code to initialize a Candidate out of tryCandidate(); NFC
llvm-svn: 267191
2016-04-22 19:10:15 +00:00
Adam Nemet fe3def7c2a [LoopUtils] Extend findStringMetadataForLoop to return the value for metadata
E.g. for:

  !1 = {"llvm.distribute", i32 1}

it now returns the MDOperand for 1.

I will use this in LoopDistribution to check the value of the metadata.

Note that the change is backward-compatible with its current use in
LoopVersioningLICM.  An Optional implicitly converts to a bool depending
whether it contains a value or not.

llvm-svn: 267190
2016-04-22 19:10:05 +00:00
Matthias Braun 6493bc2b97 MachineScheduler: Limit the size of the ready list.
Avoid quadratic complexity in unusually large basic blocks by limiting
the size of the ready lists.

Differential Revision: http://reviews.llvm.org/D19349

llvm-svn: 267189
2016-04-22 19:09:17 +00:00
Chad Rosier 1a4bc110f5 [EarlyCSE/CVP] Add stats for CVPs and make sure to account for any Changes.
llvm-svn: 267187
2016-04-22 18:47:21 +00:00
Quentin Colombet 658d9dbe56 [AArch64] When creating MRS instruction, make sure the destination register is
declared as a definition.

This fixes the machine verifier error for CodeGen/AArch64/nzcv-save.ll.

llvm-svn: 267185
2016-04-22 18:46:17 +00:00
Adam Nemet 54053a518e [LoopVersioningLICM] Add test coverage for llvm.loop.licm_versioning.disable
In the next change, I am generalizing the function
findStringMetadataForLoop and I want to make sure I don't break this.
Looks like there was no coverage for this so far.

llvm-svn: 267182
2016-04-22 18:34:50 +00:00
Quentin Colombet 9598f10104 [AArch64][AdvSIMDScalar] Update the kill flags correctly.
We used to simply set the kill flags to true when transforming a scalar
instruction to a vector one.
SrcScalar1 = copy SrcVector1
... = opScalar SrcScalar1
=>
SrcScalar1 = copy SrcVector1
... = opVector SrcVector1<kill>

This is obviously wrong. The proper update consists in:
1. Propagate the kill status from the copy to the new opVector
2. Reset the kill status on the copy, since the live-range of
   SrcVector1 got extended.

This fixes some of the machine verifier errors for AArch64 with make check.

llvm-svn: 267180
2016-04-22 18:09:14 +00:00
Saleem Abdulrasool 8237008897 test: split test into two runs
Rather than checking both stdout and stderr simultaneously, split it into two
tests.  This apparently breaks on Windows where MSVCRT does not buffer output
correctly.  NFC.

Thanks to chapuni for bringing the issue to my attention!

llvm-svn: 267179
2016-04-22 18:06:51 +00:00
Krzysztof Parzyszek 040bb35d9d [Hexagon] Use common Pat classes for selecting code for intrinsics
llvm-svn: 267178
2016-04-22 18:05:55 +00:00
Chad Rosier 1a60159064 [SimplifyCFG] Add final missing implications to isImpliedTrueByMatchingCmp.
Summary: eq imply [u|s]ge and [u|s]le are true.

Remove redundant logic by implementing isImpliedFalseByMatchingCmp(Pred1, Pred2)
as isImpliedTrueByMatchingCmp(Pred1, getInversePredicate(Pred2)).

llvm-svn: 267177
2016-04-22 17:57:34 +00:00
Michael Kuperstein 2b909e9917 Point link to CODE_OWNERS.txt to klaus instead of viewvc.
llvm-svn: 267176
2016-04-22 17:41:12 +00:00
Sanjoy Das a6155b659a Have isKnownNotFullPoison be smarter around control flow
Summary:
(... while still not using a PostDomTree)

The way we use isKnownNotFullPoison from SCEV today, the new CFG walking
logic will not trigger for any realistic cases -- it will kick in only
for situations where we could have merged the contiguous basic blocks
anyway[0], since the poison generating instruction dominates all of its
non-PHI uses (which are the only uses we consider right now).

However, having this change in place will allow a later bugfix to break
fewer llvm-lit tests.

[0]: i.e. cases where block A branches to block B and B is A's only
successor and A is B's only predecessor.

Reviewers: broune, bjarke.roune

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19212

llvm-svn: 267175
2016-04-22 17:41:06 +00:00
Krzysztof Parzyszek 8c6fb415fd [Hexagon] Properly close live range in HexagonBlockRanges ---add testcase
llvm-svn: 267174
2016-04-22 17:30:13 +00:00
Krzysztof Parzyszek c06e79356f [Hexagon] Properly close live range in HexagonBlockRanges
llvm-svn: 267173
2016-04-22 17:27:22 +00:00
Justin Bogner 8851497f19 PM: Remove some redundant name() methods
These passes all get names from PassInfoMixin already, we don't need
to override them.

llvm-svn: 267172
2016-04-22 17:25:43 +00:00
Chad Rosier 3456cb5672 [SimplifyCFG] Add missing implications to isImpliedTrueByMatchingCmp.
Summary: [u|s]gt and [u|s]lt imply [u|s]ge and [u|s]le are true, respectively.
I've simplified the existing tests and added additional tests to cover the new
cases mentioned above.  I've also added tests for all the cases where the
first compare doesn't imply anything about the second compare.

llvm-svn: 267171
2016-04-22 17:14:12 +00:00
Chad Rosier 1960d13e29 [SimplifyCFG] Simplify code review by temporarily removing this test file.
A followup commit will replace these tests with simplified and more inclusive
tests.  The diff is unreadable if this were to be done in a single commit.

llvm-svn: 267170
2016-04-22 17:14:08 +00:00
Konstantin Zhuravlyov a40d8358e7 [AMDGPU] Insert nop pass: take care of outstanding feedback
- Switch few loops to range-based for loops
- Fix nop insertion at the end of BB
- Fix formatting
- Check for endpgm

Differential Revision: http://reviews.llvm.org/D19380

llvm-svn: 267167
2016-04-22 17:04:51 +00:00
Zoran Jovanovic f6344ff295 [mips][microMIPS] Revert commit r266861.
Commit r266861 was the reason for failing tests in LLVM test suite.

llvm-svn: 267166
2016-04-22 16:53:15 +00:00
Krzysztof Parzyszek 9062b75a93 [Hexagon] Teach mux expansion how to deal with undef predicates
llvm-svn: 267165
2016-04-22 16:47:01 +00:00
Krzysztof Parzyszek e2c6405708 [Hexagon] Add definitions for trap/pause instructions
Also add tests for other instructions from HexagonSystemInst.td.

llvm-svn: 267162
2016-04-22 16:25:00 +00:00
Tom Stellard 2339f6f5a3 PostRAHazardRecocgnizer: Fix unused-private-field warning
llvm-svn: 267160
2016-04-22 15:11:08 +00:00
Geoff Berry 9fe26e6dc9 [MemorySSA] Fix bug in CachingMemorySSAWalker::invalidateInfo
Summary:
CachingMemorySSAWalker::invalidateInfo was using IsCall to determine
which cache map needed to be cleared of entries referring to the invalidated
MemoryAccess, but there could also be entries referring to it in the
other cache map (value entries, not key entries).  This change just
clears both tables to be conservatively correct.

Also add a verifyRemoved() function, called when expensive
checks (i.e. XDEBUG) are enabled to verify that the invalidated
MemoryAccess object is not referenced in any of the caches.

Reviewers: dberlin, george.burgess.iv

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19388

llvm-svn: 267157
2016-04-22 14:44:10 +00:00
Tom Stellard ee34680bb0 CodeGen: Add a stand-alone hazard recognizer pass
Summary:
This new pass allows targets to use the hazard recognizer without having
to also run one of the schedulers.  This is useful when compiling with
optimizations disabled for targets that still need noop hazards
to be handled correctly.

Reviewers: hfinkel, atrick

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18594

llvm-svn: 267156
2016-04-22 14:43:50 +00:00
David Majnemer bfd695d591 [EarlyCSE] Don't add the overflow flags to the hash
We take the intersection of overflow flags while CSE'ing.
This permits us to consider two instructions with different overflow
behavior to be replaceable.

llvm-svn: 267153
2016-04-22 14:12:50 +00:00
Nirav Dave 9a878c4930 Emit code16 in assembly in 16-bit mode
Summary:
When generating assembly using -m16 we must explicitly mark it as
16-bit. Emit .code16 at beginning of file. Fixes wrong results when
using -fno-integrated-as.

Reviewers: dwmw2

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19392

llvm-svn: 267152
2016-04-22 13:36:11 +00:00
Simon Dardis 5676d06aef [mips] Fix select patterns for MIPS64
When targetting MIPS64R6 some of the patterns for select were guarded by a
broken predicate. The predicate was supposed to test if a constant value
could fit in a 16 bit zero-extended field. Instead the value was tested to
fit in a 16 bit sign-extended field. For negative constants of native word
width this resulted in wrong code generation.

Reviewers: vkalintiris, dsanders

Differential Review: http://reviews.llvm.org/D19378

llvm-svn: 267151
2016-04-22 13:19:22 +00:00
Teresa Johnson de9b8b40aa Document source_filename in LangRef.
Summary: Add documentation for new LLVM IR source_filename identifier.

Reviewers: joker.eph, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18857

llvm-svn: 267150
2016-04-22 13:09:17 +00:00
Vasileios Kalintiris e263b09019 [mips] Fix a small typo that would leave BLTZC out of getAnalyzableBrOpc().'
llvm-svn: 267149
2016-04-22 13:05:51 +00:00
Daniel Sanders d41718e8af Revert r267049, r26706[16789], r267071 - Refactor raw pdb dumper into library
r267049 broke multiple buildbots (e.g. clang-cmake-mips, and clang-x86_64-linux-selfhost-modules) which the follow-ups have not yet resolved and this is preventing subsequent committers from being notified about additional failures on the affected buildbots.

llvm-svn: 267148
2016-04-22 12:04:42 +00:00
Nikolay Haustov b1bfd5039e AMDGPU/SI: Add test missed in rL266865
llvm-svn: 267144
2016-04-22 11:39:43 +00:00
Silviu Baranga e985c76b90 [InstCombine] Preserve fast math flags when combining PHIs
Summary:
When optimizing PHIs which have inputs floating point binary
operators, we preserve all IR flags except the fast math
flags.

This change removes the logic which tracked some of the IR flags
(no wrap, exact) and replaces it by doing an and on the IR flags of
all inputs to the PHI - which will also handle the fast math
flags.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19370

llvm-svn: 267139
2016-04-22 11:21:36 +00:00
Hrvoje Varga 5560998250 [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
Differential Revision: http://reviews.llvm.org/D19354

llvm-svn: 267137
2016-04-22 11:18:40 +00:00
Zoran Jovanovic 8e366822c2 [mips][microMIPS] Add R_MICROMIPS_PC18_S3 relocation
Differential Revision: http://reviews.llvm.org/D15026

llvm-svn: 267130
2016-04-22 10:15:12 +00:00
Eric Liu 6be128e43d Fix -Wunused-variable in non-asserts build.
llvm-svn: 267128
2016-04-22 09:50:31 +00:00
Daniel Sanders 591c379563 Revert r267098 - [MachineCombiner] Support for floating-point FMA on ARM64
It introduced buildbot failures on clang-cmake-mips, clang-ppc64le-linux, among others.

llvm-svn: 267127
2016-04-22 09:37:26 +00:00
Ashutosh Nema 468558a061 [X86]: Changing cost for “TRUNCATE v16i32 to v16i8” in SSE4.1 mode.
Summary:
rL256194 transforms truncations between vectors of integers into PACKUS/PACKSS
operations during DAG combine. This generates better code for truncate, so cost
of truncate needs to be changed but looks like it got changed only in SSE2 table
Whereas this change is also applicable for SSE4.1, so the cost of truncate needs
to be changed for that as well. Cost of “TRUNCATE v16i32 to v16i8” & “TRUNCATE 
v16i16 to v16i8” should be same in SSE4.1 & SSE2 table. Removing their cost from
SSE4.1, so it will fall back to SSE2.

Reviewers: Simon Pilgrim
llvm-svn: 267123
2016-04-22 08:34:05 +00:00
Chris Dewhurst 6019702960 [Sparc] This provides support for itineraries on Sparc.
Specifically, itineraries for LEON processors has been added, along with several LEON processor Subtargets. Although currently all these targets are pretty much identical, support for features that will differ among these processors will be added in the very near future.

The different Instruction Itinerary Classes (IICs) added are sufficient to differentiate between the instruction timings used by LEON and, quite probably, by generic Sparc processors too, but the focus of the exercise has been for LEON processors, as the requirement of my project. If the IICs are not sufficient for other Sparc processor types and you want to add a new itinerary for one of those, it should be relatively trivial to adapt this.

As none of the LEON processors has Quad Floats, or is a Version 9 processor, none of those instructions have itinerary classes defined and revert to the default "NoItinerary" instruction itinerary.

Phabricator Review: http://reviews.llvm.org/D19359

llvm-svn: 267121
2016-04-22 08:17:17 +00:00
Chris Dewhurst 431fc8af7b The following code would not work before this patch, due to the inability to take the address of a global object:
void func1() {

...
}

int main(int argc, char** argv) {

void (*pFunc)();
pFunc = &func1
pFunc();
...
}

Phabricator review: http://reviews.llvm.org/D19368

llvm-svn: 267120
2016-04-22 08:13:47 +00:00
Vedant Kumar 6013f45f92 Revert "Initial implementation of optimization bisect support."
This reverts commit r267022, due to an ASan failure:

  http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_check/1549

llvm-svn: 267115
2016-04-22 06:51:37 +00:00
Zlatko Buljan ae720dbbb6 [mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions
Differential Revision: http://reviews.llvm.org/D18687

llvm-svn: 267114
2016-04-22 06:44:34 +00:00
David Majnemer d0ce8f1485 [GVN] Respect fast-math-flags on fcmps
We assumed that flags were only present on binary operators.  This is
not true, they may also be present on calls and fcmps.

llvm-svn: 267113
2016-04-22 06:37:51 +00:00
David Majnemer 68318e0414 Fix some spelling mistakes
llvm-svn: 267112
2016-04-22 06:37:48 +00:00
David Majnemer 9554c1339c [EarlyCSE] Take the intersection of flags on instructions
EarlyCSE had inconsistent behavior with regards to flag'd instructions:
- In some cases, it would pessimize if the available instruction had
  different flags by not performing CSE.
- In other cases, it would miscompile if it replaced an instruction
  which had no flags with an instruction which has flags.

Fix this by being more consistent with our flag handling by utilizing
andIRFlags.

llvm-svn: 267111
2016-04-22 06:37:45 +00:00
Sanjoy Das efdeb45ffd [SCEV] Extract out a `isSCEVExprNeverPoison` helper; NFCI
Summary:
Also adds a small comment blurb on control flow + no-wrap flags, since
that question came up a few days back on llvm-dev.

Reviewers: bjarke.roune, broune

Subscribers: sanjoy, mcrosier, llvm-commits, mzolotukhin

Differential Revision: http://reviews.llvm.org/D19209

llvm-svn: 267110
2016-04-22 05:38:54 +00:00
Craig Topper 591fc065c8 [SystemZ] Mark CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF as Expand instead of Custom since the custom logic just did what Expand does when CTTZ/CTLZ are Legal. NFC
llvm-svn: 267109
2016-04-22 05:29:58 +00:00
Craig Topper 444317bb33 [Lanai] Set CTLZ_ZERO_UNDEF/CTTZ_ZERO_UNDEF to Expand instead of Legal so they will be converted to CTLZ/CTTZ by LegalizeDAG. Remove extra instructions that only existed to to contain patterns that match the zero_undef operations. NFC
llvm-svn: 267108
2016-04-22 05:13:01 +00:00
Craig Topper 47d0409668 [Lanai] Remove unused methods declarations. NFC
llvm-svn: 267107
2016-04-22 05:12:57 +00:00
Mehdi Amini a0cb890fb6 Clean the API for CollectAsmUndefinedRefs, taking a Triple and a String InlineAsm instead of a Module (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267106
2016-04-22 04:58:12 +00:00
Mehdi Amini 9ff43e40fa IRObjectFile, clang-format fixup for r267104
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267105
2016-04-22 04:49:46 +00:00
Mehdi Amini 9a1724bf3d Use std::move on the enum to insert it into the pair to please MSVC
(I have no idea why is it needed)
Fixup for r267103

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267104
2016-04-22 04:45:57 +00:00
Mehdi Amini e9cffafdf7 Refactor IRObjectFile, extract a static CollectAsmUndefinedRefs() method to parse inline assembly (NFC)
I plan to call this from ThinLTOCodeGenerator.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 267103
2016-04-22 04:28:05 +00:00
Nicolai Haehnle b0c9748709 AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic
Summary:
This intrinsic returns true if the current thread belongs to a live pixel
and false if it belongs to a pixel that we are executing only for derivative
computation. It will be used by Mesa to implement gl_HelperInvocation.

Note that for pixels that are killed during the shader, this implementation
also returns true, but it doesn't matter because those pixels are always
disabled in the EXEC mask.

This unearthed a corner case in the instruction verifier, which complained
about a v_cndmask 0, 1, exec, exec<imp-use> instruction. That's stupid but
correct code, so make the verifier accept it as such.

Reviewers: arsenm, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19191

llvm-svn: 267102
2016-04-22 04:04:08 +00:00
Craig Topper 59479e7208 [AVX512] Teach lowering to use vplzcntd/q to implement 128/256-bit CTTZ_ZERO_UNDEF even without VLX support. We can just extend to 512-bits and extract like we do for CTLZ.
llvm-svn: 267100
2016-04-22 03:22:38 +00:00
Duncan P. N. Exon Smith 71480bd0c7 ValueMapper/Enumerator: Clean up code in post-order traversals, NFC
Re-layer the functions in the new (i.e., newly correct) post-order
traversals in ValueEnumerator (r266947) and ValueMapper (r266949).
Instead of adding a node to the worklist in a helper function and
returning a flag to say what happened, return the node itself.  This
makes the code way cleaner: the worklist is local to the main function,
there is no flag for an early loop exit (since we can cleanly bury the
loop), and it's perfectly clear when pointers into the worklist might be
invalidated.

I'm fixing both algorithms in the same commit to avoid repeating the
commit message; if you take the time to understand one the other should
be easy.  The diff itself isn't entirely obvious since the traversals
have some noise (i.e., things to do), but here's the high-level change:

    auto helper = [&WL](T *Op) {     auto helper = [](T **&I, T **E) {
                                 =>    while (I != E) {
      if (shouldVisit(Op)) {             T *Op = *I++;
        WL.push(Op, Op->begin());        if (shouldVisit(Op)) {
        return true;                       return Op;
      }                                }
      return false;                    return nullptr;
    };                               };
                                 =>
    WL.push(S, S->begin());          WL.push(S, S->begin());
    while (!empty()) {               while (!empty()) {
      auto *N = WL.top().N;            auto *N = WL.top().N;
      auto *&I = WL.top().I;           auto *&I = WL.top().I;
      bool DidChange = false;
      while (I != N->end())
        if (helper(*I++)) {      =>    if (T *Op = helper(I, N->end()) {
          DidChange = true;              WL.push(Op, Op->begin());
          break;                         continue;
        }                              }
      if (DidChange)
        continue;

      POT.push(WL.pop());        =>    POT.push(WL.pop());
    }                                }

Thanks to Mehdi for helping me find a better way to layer this.

llvm-svn: 267099
2016-04-22 02:33:06 +00:00
Gerolf Hoflehner b32f11fc62 [MachineCombiner] Support for floating-point FMA on ARM64
Evaluates fmul+fadd -> fmadd combines and similar code sequences in the
machine combiner. It adds support for float and double similar to the existing
integer implementation. The key features are:

- DAGCombiner checks whether it should combine greedily or let the machine
combiner do the evaluation. This is only supported on ARM64.
- It gives preference to throughput over latency: the heuristic used is
to combine always in loops. The targets decides whether the machine
combiner should optimize for throughput or latency.
- Supports for fmadd, f(n)msub, fmla, fmls patterns
- On by default at O3 ffast-math

llvm-svn: 267098
2016-04-22 02:15:19 +00:00
Teresa Johnson 6fb3f19959 [ThinLTO] Remove unused/incomplete lazy summary reading support (NFC)
This removes the interfaces added (and not yet complete) to support
lazy reading of summaries. This support is not expected to be needed
since we are moving to a model where the full index is only being
traversed in the thin link step, instead of the back ends.

(The second part of this that I plan to do next is remove the
GlobalValueInfo from the ModuleSummaryIndex - it was mostly needed to
support lazy parsing of summaries. The index can instead reference the
summary structures directly.)

llvm-svn: 267097
2016-04-22 01:52:00 +00:00
NAKAMURA Takumi adbab8638c Untabify.
llvm-svn: 267096
2016-04-22 01:33:50 +00:00
Nico Weber f3fc748308 Try to fix UNRESOLVED: LLVM :: CodeGen/AArch64/arm64-regress-opt-cmp.s on bots.
This test used to write a .s file until r266971 fixed that.  But on most bots,
the .s file still exists.  Add an rm statement to clean up the bots.  In a few
days, this statement can go away again.

llvm-svn: 267095
2016-04-22 01:08:56 +00:00
Saleem Abdulrasool 12b87facf4 ARM: fix test for Windows division
This was meant to be part of SVN r267080.  cbz cannot use a high register, which
would be silently truncated.  This has now been fixed.

llvm-svn: 267092
2016-04-22 01:03:38 +00:00
Dan Gohman 04e7fb778d [WebAssembly] Limit alignment hints to natural alignment.
This follows the current binary format rules.

llvm-svn: 267082
2016-04-21 23:59:48 +00:00
Saleem Abdulrasool a028853540 ARM: restrict register class for WIN__DBZCHK
WIN__DBZCHK will insert a CBZ instruction into the stream.  This instruction
reserves 3 bits for the condition register (rn).  As such, we must ensure that
we restrict the register to a low register.  Use the tGPR class instead of GPR
to ensure that this is properly constrained.  In debug builds, we would attempt
to use lr as a condition register which would silently get truncated with no
hint that the register selection was incorrect.

llvm-svn: 267080
2016-04-21 23:53:19 +00:00
Mike Aizatsky c89755e4cb [sancov] using normalized filenames for blacklist checks.
Differential Revision: http://reviews.llvm.org/D19395

llvm-svn: 267078
2016-04-21 23:38:45 +00:00
David Blaikie f0f6c29cec Fix more -Wunused-variable in non-asserts build.
llvm-svn: 267077
2016-04-21 23:24:09 +00:00
Tim Northover c52c74efdf MachO: enable .data_region directives everywhere
We'd disabled them on x86 because back in the early days some host tools
couldn't handle the new load commands. This no longer holds: anyone capable of
deploying Clang should be able to deploy its copies of ar/ranlib/etc.

rdar://25254790

llvm-svn: 267075
2016-04-21 23:00:17 +00:00
David Blaikie 3d42a86f9d Fix some -Wunused-variable warnings in non-asserts builds.
llvm-svn: 267073
2016-04-21 22:53:33 +00:00
Vedant Kumar ef0ac9f605 [Support] Fix Wcast-qual warning
llvm-svn: 267072
2016-04-21 22:40:59 +00:00
Reid Kleckner 5037674ae2 Fix PDB warnings and test
llvm-svn: 267071
2016-04-21 22:37:55 +00:00
Derek Schuff 025191d42f Improve error message reporting for MachineFunctionProperties
When printing the properties required by a pass, only print the
properties that are set, and not those that are clear (only properties
that are set are verified, clear properties are "don't-care").

llvm-svn: 267070
2016-04-21 22:19:24 +00:00
Amaury Sechet d46e58d38e Remove dead code. NFC
llvm-svn: 267069
2016-04-21 22:17:39 +00:00
Zachary Turner d01a7a7894 Fix -Wreturn-type warning with HAVE_DIA_SDK is false.
llvm-svn: 267068
2016-04-21 22:16:19 +00:00
Zachary Turner ad817e8266 Fix pdbdump-headers.test after guid format change.
llvm-svn: 267067
2016-04-21 22:13:25 +00:00
Zachary Turner b2fe61bd8c Fix for case sensitive filename failure.
llvm-svn: 267066
2016-04-21 22:08:27 +00:00
Mike Aizatsky 243b71fd8b Fixed flag description
Summary:
asan-use-after-return control feature we call use-after-return or
stack-use-after-return.

Reviewers: kcc, aizatsky, eugenis

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19284

llvm-svn: 267064
2016-04-21 22:00:13 +00:00
Amaury Sechet 7e16ce5a84 Remove various warnings. NFC
llvm-svn: 267061
2016-04-21 21:36:11 +00:00
Derek Bruening d862c178b0 [esan] EfficiencySanitizer instrumentation pass
Summary:
Adds an instrumentation pass for the new EfficiencySanitizer ("esan")
performance tuning family of tools.  Multiple tools will be supported
within the same framework.  Preliminary support for a cache fragmentation
tool is included here.

The shared instrumentation includes:
+ Turn mem{set,cpy,move} instrinsics into library calls.
+ Slowpath instrumentation of loads and stores via callouts to
  the runtime library.
+ Fastpath instrumentation will be per-tool.
+ Which memory accesses to ignore will be per-tool.

Reviewers: eugenis, vitalybuka, aizatsky, filcab

Subscribers: filcab, vkalintiris, pcc, silvas, llvm-commits, zhaoqin, kcc

Differential Revision: http://reviews.llvm.org/D19167

llvm-svn: 267058
2016-04-21 21:30:22 +00:00
Amaury Sechet 1a0e0978b4 Add utility function to manipulate attributes on CallSite. NFC
Summary: As per title. This will help work on the C API.

Reviewers: Wallbraker, whitequark, joker.eph, echristo, rafael

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D19173

llvm-svn: 267057
2016-04-21 21:29:10 +00:00
Kevin Enderby 6e295f2304 Fix a typo in an error message. Caught by Sean Silva!
llvm-svn: 267056
2016-04-21 21:20:40 +00:00
Vedant Kumar e44482fe7a [ProfileData] Report errors from InstrProfSymtab::create
InstrProfSymtab::create can fail with instrprof_error::malformed, but
this error is silently dropped. Propagate the error up to the caller so
we fail early.

Eventually, I'd like to transition ProfileData over to the new Error
class so we can't ignore hard failures like this.

llvm-svn: 267055
2016-04-21 21:07:25 +00:00
Sanjay Patel 1725bde4cc add tests for disguised fabs/fneg
llvm-svn: 267053
2016-04-21 21:02:25 +00:00
Quentin Colombet 23341a84ca [MachineBasicBlock] Make the pass argument truly mandatory when
splitting edges.

MachineBasicBlock::SplitCriticalEdges will crash if a nullptr would have
been passed for the Pass argument. Do not allow that by turning this
argument into a reference.
The alternative would have been to make the Pass a truly optional
argument, but although this is easy to do, I was afraid users using it
like this would not be aware the livness information, dominator tree and
such would silently be broken.

llvm-svn: 267052
2016-04-21 21:01:13 +00:00
Sanjay Patel 95590f4b7b use FileCheck; add test for disguised fabs
llvm-svn: 267051
2016-04-21 20:58:58 +00:00
Zachary Turner ba2d1c0250 Add natvis visualizers for endian types.
This allows ulittle* and ubig* types to be visualized properly
in VS.

Differential Revision: http://reviews.llvm.org/D19339
Reviewed By: Aaron Ballman

llvm-svn: 267050
2016-04-21 20:58:41 +00:00
Zachary Turner a12b3d4626 Refactor raw pdb dumper into library
PDB parsing code was hand-rolled into llvm-pdbdump. This patch moves the
parsing of this code into DebugInfoPDB and makes the dumper use this.

This is achieved by implementing the skeleton of RawPdbSession, the
non-DIA counterpart to the existing PDB read interface. None of the type /
source file / etc information is accessible yet, so this implementation is
not yet close to achieving parity with the DIA counterpart, but the
RawSession class simply holds a reference to a PDBFile class which handles
parsing the file format. Additionally a PDBStream class is introduced
which allows accessing the bytes of a particular stream in a PDB file.

Differential Revision: http://reviews.llvm.org/D19343
Reviewed By: majnemer

llvm-svn: 267049
2016-04-21 20:58:35 +00:00
Quentin Colombet 77e1878954 [MachineBasicBlock] Refactor SplitCriticalEdge to expose a query API.
Introduce canSplitCriticalEdge, so that clients can now query whether or
not a critical edge can be split without actually needing to split it.
This may be useful when gathering information for cost models for
instance.

llvm-svn: 267046
2016-04-21 20:46:27 +00:00
Kevin Enderby 5e55d17ba7 hange the variable name big_size to BigSize. Caught by Rafael Espíndola!
llvm-svn: 267043
2016-04-21 20:29:49 +00:00
Andrew Kaylor ca196478cc Zero-initialize members of the CpuHashInfoTy structure for AsmParser
llvm-svn: 267042
2016-04-21 20:09:35 +00:00
Lang Hames 543e0dcc0a [RuntimeDyld] Fix conservative over-allocation of memory for common symbols.
The previous allocation code was over-estimating the amount of memory required.

No test case: we don't currently have a good way to detect conervative
over-allocation.

llvm-svn: 267041
2016-04-21 20:08:06 +00:00
JF Bastien c22d29982b NFC: fix copy / paste comment
llvm-svn: 267039
2016-04-21 19:53:39 +00:00
Krzysztof Parzyszek adf02ae540 [Hexagon] Properly recognize register alt names
llvm-svn: 267038
2016-04-21 19:49:53 +00:00
Kevin Enderby 19be251e1c Fix crash in llvm-objdump with -macho -objc-meta-data that was trying dump a non-existent section.
Showed up in running on a large binary with the missing section.  I could create a fake
test case if anyone really wants but the fix is pretty obvious.

rdar://25837034

llvm-svn: 267037
2016-04-21 19:49:29 +00:00
JF Bastien 3e2e69f607 NFC: fix nonsensical comment
llvm-svn: 267036
2016-04-21 19:41:48 +00:00
Sanjoy Das a085cfc150 Folding compares with unescaped allocations
Summary:
If we know that the pointer allocated within a function does not escape,
we can fold away comparisons that are done with global pointers

Patch by Anna Thomas!

Reviewers: reames, majnemer, sanjoy

Subscribers: mgrang, mcrosier, majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D19276

llvm-svn: 267035
2016-04-21 19:26:45 +00:00
Krzysztof Parzyszek 5de5910d7d [Hexagon] Expand handling of the small-data/bss section
llvm-svn: 267034
2016-04-21 18:56:45 +00:00
Quentin Colombet c320fb4eae [RegisterBankInfo] Change the API for the verify methods.
Return bool instead of void so that it is natural to put the calls into
asserts.

llvm-svn: 267033
2016-04-21 18:34:43 +00:00
Matt Arsenault 98f8394e7c AMDGPU: Fix debug name of pass to better match
I get this wrong every time I try to debug this.

llvm-svn: 267030
2016-04-21 18:21:54 +00:00
Matt Arsenault 7846d885ed LegalizeDAG: Move unaligned load/store expansion to TLI
When custom lowered, this is not called if the store is custom
lowered. Move it to be a utility function so targets can
easily expand unaligned accesses when custom lowering.

llvm-svn: 267029
2016-04-21 18:19:11 +00:00
Quentin Colombet 0e5ff58567 [RegisterBankInfo] Change the representation of the partial mappings.
Instead of holding a mask, hold two value: the start index and the
length of the mapping. This is a more compact representation, although
less powerful. That being said, arbitrary masks would not have worked
for the generic so do not allow them in the first place.

llvm-svn: 267025
2016-04-21 18:09:34 +00:00
Matt Arsenault 8d1052f55c DAGCombiner: Reduce 64-bit BFE pattern to pattern on 32-bit component
If the extracted bits are restricted to the upper half or lower half,
this can be truncated.

llvm-svn: 267024
2016-04-21 18:03:06 +00:00
Philip Reames a98c7ead30 [instcombine][unordered] Extend load(select) transform to handle unordered loads
llvm-svn: 267023
2016-04-21 17:59:40 +00:00
Andrew Kaylor f0f279291c Initial implementation of optimization bisect support.
This patch implements a optimization bisect feature, which will allow optimizations to be selectively disabled at compile time in order to track down test failures that are caused by incorrect optimizations.

The bisection is enabled using a new command line option (-opt-bisect-limit).  Individual passes that may be skipped call the OptBisect object (via an LLVMContext) to see if they should be skipped based on the bisect limit.  A finer level of control (disabling individual transformations) can be managed through an addition OptBisect method, but this is not yet used.

The skip checking in this implementation is based on (and replaces) the skipOptnoneFunction check.  Where that check was being called, a new call has been inserted in its place which checks the bisect limit and the optnone attribute.  A new function call has been added for module and SCC passes that behaves in a similar way.

Differential Revision: http://reviews.llvm.org/D19172

llvm-svn: 267022
2016-04-21 17:58:54 +00:00
Nicolai Haehnle 97788020c5 Split IntrReadArgMem into IntrReadMem and IntrArgMemOnly
Summary:
IntrReadWriteArgMem simply becomes IntrArgMemOnly.

So there are fewer intrinsic properties that express their orthogonality
better, and correspond more closely to the corresponding IR attributes.

Suggested by: Philip Reames

Reviewers: joker.eph, reames, tstellarAMD

Subscribers: jholewinski, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19291

llvm-svn: 267021
2016-04-21 17:48:02 +00:00
Philip Reames 3ac0718423 [unordered] unordered loads from null are still unreachable
llvm-svn: 267019
2016-04-21 17:45:05 +00:00
Marcin Koscielnicki 48d72342ff [PowerPC] [SSP] Fix stack guard load for 32-bit.
r266809 incorrectly used LD to load the stack guard, it should be LWZ.

Differential Revision: http://reviews.llvm.org/D19358

llvm-svn: 267017
2016-04-21 17:36:05 +00:00
Adam Nemet 6dcf0788fc [LoopUtils] Fix typo in comment
llvm-svn: 267016
2016-04-21 17:33:22 +00:00
Adam Nemet 293be666eb [LoopUtils] Add asserts to findStringMetadataForLoop. NFC
These ensure that operand array has at least one element and it is the
self-reference.

llvm-svn: 267015
2016-04-21 17:33:20 +00:00
Adam Nemet 963341c872 [LoopUtils] Move def of findStringMetadataForLoop to LoopUtils.cpp. NFC
The decl is in LoopUtils.h.  I think that this was added to
LoopVersioningLICM.cpp by mistake.

llvm-svn: 267014
2016-04-21 17:33:17 +00:00
Adam Nemet f787826b46 [LoopUtils] Rename {check->find}StringMetadata{Into->For}Loop. NFC
"Into" was misleading.  I am also planning to use this helper to look
for loop metadata and return the argument, so find seems like a better
name.

llvm-svn: 267013
2016-04-21 17:33:12 +00:00
Philip Reames ac55090e96 [instcombine][unordered] Implement *-load forwarding for unordered atomics
This builds on 266999 which made FindAvailableValue do the right thing.  Tests included show the newly enabled transforms and those which disabled either due to conservatism or correctness requirements.

llvm-svn: 267006
2016-04-21 17:03:33 +00:00
Amjad Aboud a5ba99140c Fixed Dwarf debug info emission to skip DILexicalBlockFile entries.
Before this fix, DILexicalBlockFile entries were skipped only in some cases and were not in other cases.

Differential Revision: http://reviews.llvm.org/D18724

llvm-svn: 267004
2016-04-21 16:58:49 +00:00
Philip Reames 92c43699bc [unordered] Add tests and conservative handling in support of future changes [NFCI]
This change adds a couple of test cases to make sure FindAvailableLoadedValue does the right thing.  At the moment, the code added is dead, but separating it makes follow on changes far more obvious.

llvm-svn: 266999
2016-04-21 16:51:08 +00:00
Chad Rosier 99bc480bc3 Address Philip's post-commit feedback for r266987. NFC.
llvm-svn: 266998
2016-04-21 16:18:02 +00:00
Philip Reames 6ffe718c64 Minor comment cleanup [NFC]
llvm-svn: 266997
2016-04-21 16:15:19 +00:00
Rafael Espindola 15ca14c0b9 Fix recursive -only-needed.
We were assuming that only linkonce_odr GVs were lazy linked.

llvm-svn: 266995
2016-04-21 14:56:33 +00:00
Zoran Jovanovic 9360c10a88 [mips][microMIPS] Implement ldpc instruction
Differential Revision: http://reviews.llvm.org/D15009

llvm-svn: 266990
2016-04-21 14:32:12 +00:00
Zoran Jovanovic 6764fa7840 [mips][microMIPS] Add R_MICROMIPS_PC19_S2 relocation
Differential Revision: http://reviews.llvm.org/D14915

llvm-svn: 266988
2016-04-21 14:09:35 +00:00
Chad Rosier af83e40dee Refactor implied condition logic from ValueTracking directly into CmpInst. NFC.
Differential Revision: http://reviews.llvm.org/D19330

llvm-svn: 266987
2016-04-21 14:04:54 +00:00
Zoran Jovanovic 02b7003068 [mips][microMIPS] Add R_MICROMIPS_PC26_S1 relocation
Differential Revision: http://reviews.llvm.org/D14822

llvm-svn: 266985
2016-04-21 13:43:26 +00:00
Sam Kolton 201398e8a3 [AMDGPU] Assembler: prevent parseDPPCtrlOps from eating invalid tokens
Reviewers: nhaustov, tstellarAMD

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19317

llvm-svn: 266984
2016-04-21 13:14:24 +00:00
Rafael Espindola e9f0784acc Add a CachedHash structure.
A DenseMap doesn't store the hashes, so it needs to recompute them when
the table is resized.

In some applications the hashing cost is noticeable. That is the case
for example in lld for symbol names (StringRef).

This patch adds a templated structure that can wraps any value that can
go in a DenseMap and caches the hash.

llvm-svn: 266981
2016-04-21 12:16:21 +00:00
Zlatko Buljan dd4151504a [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions
Differential Revision: http://reviews.llvm.org/D18855

llvm-svn: 266980
2016-04-21 11:32:40 +00:00
Zlatko Buljan d370f440e2 [mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructions and add tests for LWM32 and SWM32
Differential Revision: http://reviews.llvm.org/D19150

llvm-svn: 266977
2016-04-21 11:01:51 +00:00
Evgeny Astigeevich fc972f1451 Updated a test not to produce an empty s-file.
llvm-svn: 266971
2016-04-21 09:36:49 +00:00
Evgeny Astigeevich fd89fe0dd3 [AArch64][CodeGen] Fix of PR27158: incorrect peephole optimization in AArch64InstrInfo::optimizeCompareInstr
AArch64InstrInfo::optimizeCompareInstr has bug PR27158 which causes generation of incorrect code.
A compare instruction is substituted with another instruction which does not
produce the same flags as the original compare instruction.
This patch contains:
1. Fix of the bug.
2. A regression test in MIR.
3. A new test to check that SUBS is replaced by SUB.

Differential Revision: http://reviews.llvm.org/D18838

llvm-svn: 266969
2016-04-21 08:54:08 +00:00
Craig Topper 21690db05a [AVX512] Add CTTZ support for v8i64 and v16i32 vectors.
llvm-svn: 266968
2016-04-21 07:30:06 +00:00
Craig Topper 89d7a76d88 [X86] Fix vector-tzcnt-512 test to disable CDI while enabling BWI for one of the runs. Update check patterns accordingly.
llvm-svn: 266967
2016-04-21 07:30:03 +00:00
Craig Topper 4c07b0f896 Fix test command line to explicitly disable CDI instructions for one test.
llvm-svn: 266966
2016-04-21 07:29:59 +00:00
Mehdi Amini 721800d438 CachePruning: early exit if no path supplied
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266965
2016-04-21 06:43:45 +00:00
Mehdi Amini 9df9a9cd53 ThinLTO: initialize variables
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266964
2016-04-21 06:43:41 +00:00
Craig Topper 340ad0a0c9 [AVX512] Add support for lowering CTTZ v64i8 and v32i16 with BWI instructions.
llvm-svn: 266963
2016-04-21 06:39:34 +00:00
Craig Topper 7dedfdc60a [X86] Remove redundant calls to setOperationAction for EXTRACT_VECTOR_ELT/INSERT_VECTOR_ELT from SSE41 block. They were already done in an earlier block. NFC
llvm-svn: 266962
2016-04-21 06:39:32 +00:00
Craig Topper 032e985cbc [X86] Remove some operations from the default Expand all vector ops loop. Instead let them stay Legal and mark them Expand for specific types where needed. Reduces overall number of calls to setOperationAction. NFC
llvm-svn: 266961
2016-04-21 06:39:29 +00:00
Craig Topper 98c855d480 [X86] Remove old leftover MMX code that sets various 64-bit vector operations to Expand. These vector types aren't legal so these operations would never make it far enough to need to expand. NFC
llvm-svn: 266960
2016-04-21 06:39:26 +00:00
Mehdi Amini f95f77adf6 ThinLTO: add module caching handling.
Differential Revision: http://reviews.llvm.org/D18494

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266959
2016-04-21 05:54:23 +00:00
Mehdi Amini a71a5a6289 ThinLTO: Resolve linkonce_odr aliases just like functions
This help to streamline the process of handling importing since
we don't need to special case alias everywhere: just like
linkonce_odr function, make sure at least one alias is emitted
by turning it weak.

Differential Revision: http://reviews.llvm.org/D19308

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266958
2016-04-21 05:47:17 +00:00
Sanjoy Das 54a3a006ca [SimplifyCFG] Fold `llvm.guard(false)` to unreachable
Summary:
`llvm.guard(false)` always bails out of the current compilation unit, so
we can prune any control flow following it.

Reviewers: hfinkel, pcc, reames

Subscribers: majnemer, reames, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19245

llvm-svn: 266955
2016-04-21 05:09:12 +00:00
Craig Topper 3e6be4c27a [X86] Remove unnecessary setting of CTTZ_ZERO_UNDEF to Custom for vector types where we can't do any better than the Custom lowering of CTTZ. LegalizeVectorOps will expand to CTTZ since its marked Custom.
CTTZ_ZERO_UNDEF can be custom lowered specially if CTLZ is supported. Otherwise CTTZ and CTTZ_ZERO_UNDEF are handled the same way by using CTPOP and bitmath.

llvm-svn: 266952
2016-04-21 04:44:00 +00:00
Craig Topper 52cb5ec36f [SelectionDAG] Teach LegalizeVectorOps to directly Expand CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to CTTZ/CTLZ directly if those ops are Legal/Custom instead of deferring it to LegalizeOps.
This is needed to support CTTZ/CTLZ Custom correctly since LegalizeOps would be too late to do the custom lowering.

llvm-svn: 266951
2016-04-21 04:43:57 +00:00
Craig Topper 3dd625ce79 [AVX512] Add support for popcount of v8i64 and v16i32 with and without BWI instructions.
Without BWI we have to split the vectors into 256-bit vectors so we can use AVX2 pshufb and then concatenate the results.

llvm-svn: 266950
2016-04-21 03:57:24 +00:00
Duncan P. N. Exon Smith 0ab44dbf8f ValueMapper: Map uniqued nodes in post-order
The iteratitive algorithm from r265456 claimed but failed to create a
post-order traversal.  It had the same error that was fixed in the
ValueEnumerator in r266947: now, instead of pushing all operands on the
worklist at once, we pause whenever an operand gets pushed in order to
go depth-first (I know, it sounds obvious).

Sadly, I have no idea how to observe this from outside the algorithm and
so I haven't written a test.  The output should be the same; it should
just use fewer temporary nodes now.  I've added some comments that I
hope make the current logic clear enough it's unlikely to regress.

llvm-svn: 266949
2016-04-21 02:34:36 +00:00
Mehdi Amini bda3c97c16 ThinLTO/ModuleLinker: add a flag to not always pull-in linkonce when performing importing
Summary:
The function importer already decided what symbols need to be pulled
in. Also these magically added ones will not be in the export list
for the source module, which can confuse the internalizer for
instance.

Reviewers: tejohnson, rafael

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D19096

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266948
2016-04-21 01:59:39 +00:00
Duncan P. N. Exon Smith c196531ef3 BitcodeWriter: Emit metadata in post-order (again)
Emit metadata nodes in post-order.  The iterative algorithm from r266709
failed to maintain this property.  After understanding my mistake, it
wasn't too hard to write a test with llvm-bcanalyzer (and I've actually
made this change once before: see r220340).

This also reverts the "noisy" testcase change from r266709.  That should
have been more of a red flag :/.

Note: The same bug crept into the ValueMapper in r265456.  I'm still
working on the fix.

llvm-svn: 266947
2016-04-21 01:55:12 +00:00
Matthias Braun b550b765bd MachineSched: Cleanup; NFC
llvm-svn: 266946
2016-04-21 01:54:13 +00:00
Nick Lewycky 762f8a8549 Add optimization for 'icmp slt (or A, B), A' and some related idioms based on knowledge of the sign bit for A and B.
No matter what value you OR in to A, the result of (or A, B) is going to be UGE A. When A and B are positive, it's SGE too. If A is negative, OR'ing a value into it can't make it positive, but can increase its value closer to -1, therefore (or A, B) is SGE A. Working through all possible combinations produces this truth table:

```
A is
+, -, +/-
F  F   F   +    B is
T  F   ?   -
?  F   ?   +/-
```

The related optimizations are flipping the 'slt' for 'sge' which always NOTs the result (if the result is known), and swapping the LHS and RHS while swapping the comparison predicate.

There are more idioms left to implement (aren't there always!) but I've stopped here because any more would risk becoming unreasonable for reviewers.

llvm-svn: 266939
2016-04-21 00:53:14 +00:00
Dehao Chen a8bae82373 Refine instruction weight annotation algorithm for sample profiler.
Summary:
This patch refined the instruction weight anootation algorithm:
1. Do not use dbg_value intrinsics for annotation.
2. Annotate cold calls if the call is inlined in profile, but not inlined before preparation. This indicates that the annotation preparation step found no sample for the inlined callsite, thus the call should be very cold.

Reviewers: dnovillo, davidxl

Subscribers: mgrang, llvm-commits

Differential Revision: http://reviews.llvm.org/D19286

llvm-svn: 266936
2016-04-20 23:36:23 +00:00
Kevin Enderby d4eaa74693 Fix another compilation error from r266919 for clang-atom-d525-fedora-rel which
is another place that libObject’s getName() for symbols returns Expected<...>
that needed to be updated.

llvm-svn: 266933
2016-04-20 23:10:14 +00:00
Evgeniy Stepanov 2383465e33 Fix compilation error in r266919.
lib/Object/MachOObjectFile.cpp:53:44: error: moving a temporary object prevents copy elision [-Werror,-Wpessimizing-move]
  return malformedError(Obj.getFileName(), std::move(Msg.str()), ECOverride);

llvm-svn: 266930
2016-04-20 22:44:40 +00:00
Vedant Kumar 932866bfe7 [test/PGOProfile] Make tests independent of the raw profile version (NFC)
Differential Revision: http://reviews.llvm.org/D19290

llvm-svn: 266928
2016-04-20 22:24:01 +00:00
Kevin Enderby 81e8b7d949 Thread Expected<...> up from libObject’s getName() for symbols to allow llvm-objdump to produce a good error message.
Produce another specific error message for a malformed Mach-O file when a symbol’s
string index is past the end of the string table.  The existing test case in test/Object/macho-invalid.test
for macho-invalid-symbol-name-past-eof now reports the error with the message indicating
that a symbol at a specific index has a bad sting index and that bad string index value.
 
Again converting interfaces to Expected<> from ErrorOr<> does involve
touching a number of places. Where the existing code reported the error with a
string message or an error code it was converted to do the same.  There is some
code for this that could be factored into a routine but I would like to leave that for
the code owners post-commit to do as they want for handling an llvm::Error.  An
example of how this could be done is shown in the diff in
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h which had a Check() routine
already for std::error_code so I added one like it for llvm::Error .

Also there some were bugs in the existing code that did not deal with the
old ErrorOr<> return values.  So now with Expected<> since they must be
checked and the error handled, I added a TODO and a comment:
“// TODO: Actually report errors helpfully” and a call something like
consumeError(NameOrErr.takeError()) so the buggy code will not crash
since needed to deal with the Error.

Note there fixes needed to lld that goes along with this that I will commit right after this.
So expect lld not to built after this commit and before the next one.

llvm-svn: 266919
2016-04-20 21:24:34 +00:00
Krzysztof Parzyszek 64d4e2bc0d [Hexagon] Add -mv.. options to override CPU selection
This is for compatibility with scripts that use -mv5, etc. with the
assembler.

llvm-svn: 266918
2016-04-20 21:17:40 +00:00
Duncan P. N. Exon Smith 3c406c2da5 IR: Use SmallVector instead of std::vector of TrackingMDRef
Don't use std::vector<TrackingMDRef>, since (at least in some versions
of libc++) std::vector apparently copies values on grow operations
instead of moving them.  Found this when I was temporarily deleting the
copy constructor for TrackingMDRef to investigate a performance
bottleneck.

llvm-svn: 266909
2016-04-20 20:14:09 +00:00
Duncan P. N. Exon Smith a2495d9c5a IR: Stop copying vectors of TrackingMDRef in DIBuilder
No real functionality change here, just avoiding an unnecessary copy of
std::vector<TrackingMDRef> for every subprogram with variables.

llvm-svn: 266907
2016-04-20 20:03:59 +00:00
Kostya Serebryany a83bfeac9d Rename asan-check-lifetime into asan-stack-use-after-scope
Summary:
This is done for consistency with asan-use-after-return.
I see no other users than tests.

Reviewers: aizatsky, kcc

Differential Revision: http://reviews.llvm.org/D19306

llvm-svn: 266906
2016-04-20 20:02:58 +00:00
Chad Rosier b346dcbc25 Typo.
llvm-svn: 266905
2016-04-20 19:16:23 +00:00
Chad Rosier 41dd31f0b0 [ValueTracking] Make isImpliedCondition return an Optional<bool>. NFC.
Phabricator Revision: http://reviews.llvm.org/D19277

llvm-svn: 266904
2016-04-20 19:15:26 +00:00
Nico Weber 77729b82e7 Replace a loop with a for-each loop. No behavior change.
llvm-svn: 266903
2016-04-20 19:09:26 +00:00
Duncan P. N. Exon Smith af0fdc2ab8 IR: Avoid mallocs in constructor of ModuleSlotTracker
A ModuleSlotTracker can be created without actually being used (e.g.,
r266889 added one to the Verifier).  Create the SlotTracker within it
lazily on the first call to ModuleSlotTracker::getMachine.

llvm-svn: 266902
2016-04-20 19:05:59 +00:00
Davide Italiano bf4df85ba7 [MC] Silence warning due to unused variable in !Debug builds.
llvm-svn: 266901
2016-04-20 18:45:31 +00:00
Duncan P. N. Exon Smith 51e7adf6aa Verifier: Add ModuleSlotTracker to printAsOperand call
I missed this site in r266889.

llvm-svn: 266900
2016-04-20 18:42:51 +00:00
Jacques Pienaar d96f8a3e82 [lanai] Add subword scheduling itineraries.
Differentiate between word and subword memory operations as they take different
amount of cycles to complete. This just adds a basic model of the subword
latency to the scheduler.

llvm-svn: 266898
2016-04-20 18:28:55 +00:00
Duncan P. N. Exon Smith 8ec8da40a8 Verifier: Prefer early continue over if-nesting, NFC
llvm-svn: 266897
2016-04-20 18:27:18 +00:00
Davide Italiano 8a8f24b098 [MC] EmitNop: Make an assertion more useful.
Differential Revision:  http://reviews.llvm.org/D19334

llvm-svn: 266895
2016-04-20 17:53:21 +00:00
Duncan P. N. Exon Smith b011ad7330 LTO: Verify the input even if optimize() isn't called
Clients may call writeMergedModules before calling optimize, or call
compileOptimized without calling optimize.  Make sure they don't sneak
past the verifier.  This adds LTOCodeGenerator::verifyMergedModuleOnce,
and calls it from writeMergedModule, optimize, and codegenOptimized.

I couldn't find a good way to test this.  I tried writing broken IR to
send into llvm-lto, but LTOCodeGenerator doesn't understand textual IR,
and assembler runs the verifier itself anyway.  Checking in
valid-but-doesn't-verify bitcode here doesn't seem valuable.

llvm-svn: 266894
2016-04-20 17:48:22 +00:00
Mehdi Amini d826bbbb0a ModuleLinker: only import what is in GlobalsToImport, regarless if it is a function or not.
The alias handling was specific to the old iterative inlining
mechanism, so that is dead now. The variable handling could make a
difference, since we were previously falling through to the normal
selection logic, but we don't observe changes in the validation
because no client seems to rely on it.

Differential Revision: http://reviews.llvm.org/D19307

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266893
2016-04-20 17:47:42 +00:00
Duncan P. N. Exon Smith 0ecff953c3 IR: Use a single ModuleSlotTracker in the Verifier
Speed up Verifier output by sharing a single ModuleSlotTracker for the
duration.  There should be no functionality change here except for much
faster output when there's more than one statement.

Now the Verifier won't be traversing the full Metadata graph every time
it prints an error.  The TypePrinter is still not shared, but that would
take some extra plumbing.

llvm-svn: 266889
2016-04-20 17:27:44 +00:00
Duncan P. N. Exon Smith e8fc69d136 IR: Don't use raw_null_ostream in Verifier
While using a raw_null_ostream meant that the Verifier didn't have to
think about whether to print, it's actually quite expensive to print out
IR.  Only print if the output is going somewhere.

llvm-svn: 266884
2016-04-20 16:17:37 +00:00
Duncan P. N. Exon Smith 9c3ff1986b IR: Use default member initialization in Verifier, NFC
llvm-svn: 266883
2016-04-20 15:55:24 +00:00
Krzysztof Parzyszek 5626703837 [Hexagon] Fix handling of lcomm directive
Patch by Colin LeMahieu.

llvm-svn: 266882
2016-04-20 15:54:13 +00:00
Teresa Johnson 143d15bc29 Re-enable "[gold-plugin] Disable name for values other than GlobalValue"
This restores r266871 with a fix for gold tests relying on the value
names, when using a release compiler, by adding a way to disable the
default discarding. Update affected tests to use the new mechanism so
that value names are preserved as expected, regardless of how the
compiler was built.

llvm-svn: 266881
2016-04-20 15:16:57 +00:00
Teresa Johnson b35cc691ea [ThinLTO] Prevent importing of "llvm.used" values
Summary:
This patch prevents importing from (and therefore exporting from) any
module with a "llvm.used" local value. Local values need to be promoted
and renamed when importing, and their presense on the llvm.used variable
indicates that there are opaque uses that won't see the rename. One such
example is a use in inline assembly.

See also the discussion at:
http://lists.llvm.org/pipermail/llvm-dev/2016-April/098047.html

As part of this, move collectUsedGlobalVariables out of Transforms/Utils
and into IR/Module so that it can be used more widely. There are several
other places in LLVM that used copies of this code that can be cleaned
up as a follow on NFC patch.

Reviewers: joker.eph

Subscribers: pcc, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D18986

llvm-svn: 266877
2016-04-20 14:39:45 +00:00
Krzysztof Parzyszek 16331f0aa0 [RDF] Consider register as live if any alias is live
This only affects the recomputation of kill flags.

llvm-svn: 266875
2016-04-20 14:33:23 +00:00
Zoran Jovanovic fdbd0a37c1 [mips][microMIPS] Implement BGEC, BGEUC, BLTC, BLTUC, BEQC and BNEC instructions
Differential Revision: http://reviews.llvm.org/D14206

llvm-svn: 266873
2016-04-20 14:07:46 +00:00
Teresa Johnson f0bedf5343 Revert "[gold-plugin] Disable name for values other than GlobalValue"
This reverts commit r266871. Setting the default based on the NDEBUG
flag is causing test failures. Need to figure out whether to change this
approach or update tests.

llvm-svn: 266872
2016-04-20 13:18:47 +00:00
Teresa Johnson d3ded4a441 [gold-plugin] Disable name for values other than GlobalValue
Summary:
Applies Mehdi's optimization (r263086) to disable value names other than
for GlobalValues to LTO/ThinLTO performed via the gold-plugin, in the
same manner as it is applied in libLTO.

Reviewers: rafael, joker-eph

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19269

llvm-svn: 266871
2016-04-20 13:01:37 +00:00
Nikolay Haustov fb5c307ccd AMDGPU/SI: Assembler: improvements to support trap handlers.
Add ParseAMDGPURegister which can be invoked recursively for parsing lists.
Rename getRegForName to getSpecialRegForName.
Support legacy SP3 register list syntax: [s2,s3,s4,s5] or [flat_scratch_lo,flat_scratch_hi].
Add 64-bit registers TBA, TMA where missing.
Add some tests.

Differential Revision: http://reviews.llvm.org/D19163

llvm-svn: 266865
2016-04-20 09:34:48 +00:00
Asaf Badouh 89406d1815 [X86] enable PIE for functions
Call locally defined function directly for PIE/fPIE

Differential Revision: http://reviews.llvm.org/D19226

llvm-svn: 266863
2016-04-20 08:32:57 +00:00
Hrvoje Varga 117625aaf3 [mips][microMIPS]Implement CFC*, CTC* and LDC* instructions
Differential Revision: http://reviews.llvm.org/D18640

llvm-svn: 266861
2016-04-20 06:34:48 +00:00
Craig Topper ddf022a337 [AVX512] Add avx512cd+vl runs to vector-tzcnt-128/256 tests to show using the vplzcntd/q instructions.
llvm-svn: 266860
2016-04-20 05:19:01 +00:00
Craig Topper 7e37746011 [AVX512] Update vector-tzcnt-512 test to show how bad v32i16 and v64i8 is with avx512bw enabled.
llvm-svn: 266859
2016-04-20 05:18:58 +00:00
Craig Topper 99e60e9f1f [AVX512] Add popcount support for v32i16 and v64i8.
llvm-svn: 266858
2016-04-20 05:18:55 +00:00
Mehdi Amini bb3a1d92f3 ThinLTO: never promote as external weak
This linkage is *not* intended to express that a declaration refers
to a weak symbol, but that the symbol might not be present at link
time. I don't believe it was the intent.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266856
2016-04-20 04:18:11 +00:00
Mehdi Amini 2c719cc117 FunctionImport: make sure we always select the right callee in presence of alias
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266854
2016-04-20 04:17:36 +00:00
Craig Topper 3e8f1e483c [X86] Mark some floating point operations that are always expanded for vector types as Expand in a floating point only loop instead of looping through all vector types.
llvm-svn: 266850
2016-04-20 01:57:44 +00:00
Craig Topper 7f28d55a00 [X86] Don't mark vector loads and shifts Expand in advance. Loads are always marked Legal or Promote for all the legal types later. Shifts are always marked custom. NFC
llvm-svn: 266849
2016-04-20 01:57:42 +00:00
Craig Topper ab7497dd6e [X86] Merge the two different SSE2 blocks in the X86TargetLowering constructor. Also qualfiy the XOP block with !useSoftFloat to match the other vector blocks.
llvm-svn: 266848
2016-04-20 01:57:40 +00:00
Craig Topper 397968ea16 [X86] Don't set vector FADD,FSUB,FMUL,FDIV,FNEG,FSQRT to Expand early. For every legal FP type we either set them to Legal or Custom anyway. So let them stay defaulted to Legal and only change when they need to be Custom.
llvm-svn: 266847
2016-04-20 01:57:38 +00:00
Mehdi Amini 3c0e64c9d6 llvm-lto: run the module verifier when doing IR level work
It seems it was only running during CodeGen previously.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266846
2016-04-20 01:04:26 +00:00
Mehdi Amini 6968ef773b ThinLTO: Move alias importing decision on the summary
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266845
2016-04-20 01:04:20 +00:00
Marcin Koscielnicki f12609c9ed [SystemZ] Add support for llvm.thread.pointer intrinsic.
Differential Revision: http://reviews.llvm.org/D19054

llvm-svn: 266844
2016-04-20 01:03:48 +00:00
Amaury Sechet 60b31453ac Add LLVMGetAttrKindID in the C API in order to facilitate migration away from LLVMAttribute
Summary:
LLVMAttribute has outlived its utility and is becoming a problem for C API users that what to use all the LLVM attributes. In order to help moving away from LLVMAttribute in a smooth manner, this diff introduce LLVMGetAttrKindIDInContext, which can be used instead of the enum values.

See D18749 for reference.

Reviewers: Wallbraker, whitequark, joker.eph, echristo, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19081

llvm-svn: 266842
2016-04-20 01:02:12 +00:00
NAKAMURA Takumi 8a57b23e86 MipsAsmParser::loadImmediate(): Prune an obsolete \param in r266602. [-Wdocumentation]
llvm-svn: 266841
2016-04-20 00:55:38 +00:00
Duncan P. N. Exon Smith c2dd7da5ca IR: Use HANDLE_METADATA_LEAF to define MetadataKind enum, NFC
llvm-svn: 266839
2016-04-20 00:29:48 +00:00
Kostya Serebryany 1bfd583d82 [libFuzzer] added -detect_leaks flag (0 by default for now). When enabled, it will help finding leaks while fuzzing
llvm-svn: 266838
2016-04-20 00:24:21 +00:00