974e12b2d3
Remove includes of Support/Compiler.h that are no longer needed after the
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VISIBILITY_HIDDEN removal.
llvm-svn: 85043
2009-10-25 06:57:41 +00:00
02d5f77d26
Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
2009-10-25 06:33:48 +00:00
8759585aba
Revert 84315 for now. Re-thinking the patch.
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llvm-svn: 84321
2009-10-17 07:53:04 +00:00
0818d87ed1
Rename getFixedStack to getStackObject. The stack objects represented are not
...
necessarily fixed. Only those will negative frame indices are "fixed."
llvm-svn: 84315
2009-10-17 06:22:26 +00:00
be8137b0b4
Replace TargetInstrInfo::isInvariantLoad and its target-specific
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implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.
llvm-svn: 83475
2009-10-07 17:38:06 +00:00
fa14dd430c
Add register-reuse to frame-index register scavenging. When a target uses
...
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
llvm-svn: 83467
2009-10-07 17:12:56 +00:00
10d3dc569b
Instead of printing unnecessary basic block labels as labels in
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verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.
Also, factor out the relevant code out of all the targets and into
target-independent code.
llvm-svn: 83392
2009-10-06 17:38:38 +00:00
051454a16f
Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction.
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llvm-svn: 83363
2009-10-06 02:19:11 +00:00
e0709cfc92
Use MachineInstr as an processDebugLoc() argument.
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This will allow processDebugLoc() to handle scopes for DWARF debug info.
llvm-svn: 83183
2009-09-30 23:12:50 +00:00
48b185d6f7
Improve MachineMemOperand handling.
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- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
This eliminates MachineInstr's std::list member and allows the data to be
created by isel and live for the remainder of codegen, avoiding a lot of
copying and unnecessary translation. This also shrinks MemSDNode.
- Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
fields for MachineMemOperands.
- Change MemSDNode to have a MachineMemOperand member instead of its own
fields with the same information. This introduces some redundancy, but
it's more consistent with what MachineInstr will eventually want.
- Ignore alignment when searching for redundant loads for CSE, but remember
the greatest alignment.
Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.
llvm-svn: 82794
2009-09-25 20:36:54 +00:00
32f71d714b
Rename getTargetNode to getMachineNode, for consistency with the
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naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
llvm-svn: 82790
2009-09-25 18:54:59 +00:00
757acfea63
Fix the offset values for these memoperands. For frame objects, the
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PseudoSourceValue already effectively represents the offset from the
frame base, so the actual offset should not be added to it.
llvm-svn: 82465
2009-09-21 17:58:09 +00:00
9827ad39a7
Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
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llvm-svn: 82311
2009-09-19 09:51:03 +00:00
270d0f986f
Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
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Not functionality change yet.
llvm-svn: 82273
2009-09-18 21:02:19 +00:00
eb2cc68254
remove all but one reference to TargetRegisterDesc::AsmName.
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llvm-svn: 81714
2009-09-13 20:31:40 +00:00
ad10b3be3e
the tblgen produced 'getRegisterName' method does not access
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the object, make it static instead of const.
llvm-svn: 81711
2009-09-13 20:19:22 +00:00
06c5eed9e9
make tblgen produce a function that returns the name for a physreg.
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Nothing is using this info yet.
llvm-svn: 81707
2009-09-13 20:08:00 +00:00
1d04aa78f3
replace printBasicBlockLabel with EmitBasicBlockStart,
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now that printBasicBlockLabel is only used for starting
a MBB. This allows elimination of a bunch of arguments.
llvm-svn: 81684
2009-09-13 18:25:37 +00:00
4cd449813a
convert some uses of printBasicBlockLabel to use GetMBBSymbol
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instead.
llvm-svn: 81677
2009-09-13 17:14:04 +00:00
321bc99a74
remove DebugLoc from MCInst and eliminate "Comment printing" from
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the MCInst path of the asmprinter. Instead, pull comment printing
out of the autogenerated asmprinter into each target that uses the
autogenerated asmprinter. This causes code duplication into each
target, but in a way that will be easier to clean up later when more
asmprinter stuff is commonized into the base AsmPrinter class.
This also fixes an xcore strangeness where it inserted two tabs
before every instruction.
llvm-svn: 81396
2009-09-09 23:14:36 +00:00
2fbeaf084f
Remove some unused variables and methods warned about by
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icc (#177 , partial). Patch by Erick Tryzelaar.
llvm-svn: 81106
2009-09-06 08:33:48 +00:00
68c5f477fa
Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.
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llvm-svn: 80773
2009-09-02 08:44:58 +00:00
3c62f5095a
Normalize makefile comments and sort cmake file lists.
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llvm-svn: 80584
2009-08-31 13:05:24 +00:00
34ee203337
Fix some refactos for iostream changes (in -Asserts mode).
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- The world needs better C++ refactoring tools, can I get an Amen!?
llvm-svn: 79843
2009-08-23 08:50:52 +00:00
317dbbcfb1
eliminate uses of cerr()
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llvm-svn: 79834
2009-08-23 07:05:07 +00:00
af29ea6d57
eliminate the last DOUTs from the targets.
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llvm-svn: 79833
2009-08-23 06:49:22 +00:00
f7b571726a
Forgot to update some CMakeLists.
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llvm-svn: 79780
2009-08-22 22:20:11 +00:00
e9a75a6654
rename TAI -> MAI, being careful not to make MAILJMP instructions :)
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llvm-svn: 79777
2009-08-22 21:43:10 +00:00
7b26fce23e
Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
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llvm-svn: 79763
2009-08-22 20:48:53 +00:00
f0d31ab7b8
Some dummy cost model for s390x:
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- Prefer short-imm instructions over ext-imm, when possible
- Prefer Z10 instructions over Z9, when possible
This hopefully should fix some dejagnu test fails on solaris
llvm-svn: 79741
2009-08-22 11:46:16 +00:00
f31a44ec01
Add fcopysign instructions
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llvm-svn: 79664
2009-08-21 20:02:37 +00:00
47398930e4
Expand few nodes until someone will be crazy enough to implement them natively :)
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llvm-svn: 79659
2009-08-21 18:52:42 +00:00
cb7444342b
Typo :(
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llvm-svn: 79657
2009-08-21 18:41:02 +00:00
81be4b345a
Correct instruction names for subtract-with-borrow
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llvm-svn: 79656
2009-08-21 18:37:28 +00:00
a39f96c6ed
Handle 'r' inline asm constraint
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llvm-svn: 79648
2009-08-21 18:15:41 +00:00
4b7dadb76e
eliminate AsmPrinter::SwitchToSection and just have clients
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talk to the MCStreamer directly instead.
llvm-svn: 79405
2009-08-19 05:49:37 +00:00
ef3d457126
Various AsmWriter output cleanups. Use WriteAsOperand instead of
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PrintUnmangledNameSafely.
llvm-svn: 78878
2009-08-13 01:36:44 +00:00
9a6cf91261
Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
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pair instead of from a virtual method on TargetMachine. This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use
TargetAsmInfo.
llvm-svn: 78802
2009-08-12 07:22:17 +00:00
2b083cf989
prune #include
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llvm-svn: 78749
2009-08-11 23:07:27 +00:00
9f94459d24
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
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the latter is capable of representing either a primitive or an extended type.
llvm-svn: 78713
2009-08-11 20:47:22 +00:00
2c30970b22
pass the TargetTriple down from each target ctor to the
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LLVMTargetMachine ctor. It is currently unused.
llvm-svn: 78711
2009-08-11 20:42:37 +00:00
53aa7a960c
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
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llvm-svn: 78610
2009-08-10 22:56:29 +00:00
b94284b5e2
make printInstruction return void since its result is omitted. Make the
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error condition get trapped with an assert.
llvm-svn: 78449
2009-08-08 01:32:19 +00:00
b1692dc267
don't check the result of printInstruction anymore.
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llvm-svn: 78444
2009-08-08 00:05:42 +00:00
be47ccffef
Convert bswap test to filecheck, add more test entries & convert stuff to filecheck
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llvm-svn: 78212
2009-08-05 16:50:53 +00:00
2e627cb37f
Add memory versions of some instructions.
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Patch by Neale Ferguson!
llvm-svn: 78203
2009-08-05 16:16:11 +00:00
f9bbcd1afd
Major calling convention code refactoring.
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Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
llvm-svn: 78142
2009-08-05 01:29:28 +00:00
c6b5e8a5c5
Don't flush the raw_ostream between each MachineFunction. These flush
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calls were originally put in place because errs() at one time was
not unbuffered, and these print routines are commonly used with errs()
for debugging. However, errs() is now properly unbuffered, so the
flush calls are no longer needed. This significantly reduces the
number of write(2) calls for regular asm printing when there are many
small functions.
llvm-svn: 78137
2009-08-05 00:49:25 +00:00
c3719c36e6
Move most targets TargetMachine constructor to only taking a target triple.
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- The C, C++, MSIL, and Mips backends still need the module.
llvm-svn: 77927
2009-08-02 23:37:13 +00:00
31b44e8f6c
Normalize Subtarget constructors to take a target triple string instead of
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Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
llvm-svn: 77918
2009-08-02 22:11:08 +00:00
7ee0246f51
eliminate the TM argument to the TAI class, remove comment about supporting
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solaris :)
llvm-svn: 77865
2009-08-02 04:32:07 +00:00
b25afe081c
remove TargetAsmInfo::TM, which is now dead. The basic TAI class now
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no longer depends on TM!
llvm-svn: 77863
2009-08-02 04:27:24 +00:00
b2bbb61f33
REmove dead fields of TAI.
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llvm-svn: 77820
2009-08-01 22:40:22 +00:00
5034329f8d
pass the mangler down into the various SectionForGlobal methods.
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No functionality change.
llvm-svn: 77432
2009-07-29 05:09:30 +00:00
5e693ed07b
Rip all of the global variable lowering logic out of TargetAsmInfo. Since
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it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.
Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.
This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.
llvm-svn: 77294
2009-07-28 03:13:23 +00:00
86b7255776
Eliminate getNamed/getUnnamedSection, adding a new and unified getOrCreateSection
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instead.
llvm-svn: 77186
2009-07-27 06:17:14 +00:00
149465ea06
Eliminate SectionFlags, just embed a SectionKind into Section
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instead and drive things based off of that.
llvm-svn: 77184
2009-07-27 05:32:16 +00:00
602d44fa70
untangle a TargetAsmInfo hack where ELFTargetAsmInfo would create a
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'unnamed' bss section, but some impls would want a named one. Since
they don't have consistent behavior, just make each target do their
own thing, instead of doing something "sortof common" then having
targets change immutable objects later.
llvm-svn: 77165
2009-07-26 19:23:28 +00:00
9813b0b025
Eliminate some uses of DOUT, cerr, and getNameStart().
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llvm-svn: 77145
2009-07-26 07:49:05 +00:00
ee01b242e8
Factor commonality in triple match routines into helper template for registering
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classes, and migrate existing targets over.
llvm-svn: 77126
2009-07-26 05:03:33 +00:00
bc981d8efa
Kill Target specific ModuleMatchQuality stuff.
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- This was overkill and inconsistently implemented.
llvm-svn: 77114
2009-07-26 02:22:58 +00:00
691a4784db
Simplify JIT target selection.
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- Instead of requiring targets to define a JIT quality match function, we just
have them specify if they support a JIT.
- Target selection for the JIT just gets the host triple and looks for the best
target which matches the triple and has a JIT.
llvm-svn: 77060
2009-07-25 10:09:50 +00:00
5680b4f285
Add new helpers for registering targets.
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- Less boilerplate == good.
llvm-svn: 77052
2009-07-25 06:49:55 +00:00
47db941fd3
Get rid of the Pass+Context magic.
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llvm-svn: 76702
2009-07-22 00:24:57 +00:00
1f74b1fdfd
Missed a piece of the commit to remove the shift flavor.
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llvm-svn: 76635
2009-07-21 20:15:24 +00:00
100865e59d
make AsmPrinter::doFinalization iterate over the global variables
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and call PrintGlobalVariable, allowing elimination and simplification
of various targets.
llvm-svn: 76604
2009-07-21 18:38:57 +00:00
249df80306
fix Sparc, SystemZ, and MSP430 to not override AsmPrinter::doInitialization.
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This eliminates redundancy setting up the mangler and adds support to them
for module-level inline asm and a .file directive.
llvm-svn: 76592
2009-07-21 17:37:35 +00:00
1177cee9dc
Rename LessPrivateGlobalPrefix -> LinkerPrivateGlobalPrefix to match the
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LLVM IR concept.
llvm-svn: 76590
2009-07-21 17:30:51 +00:00
dde1a8eef4
Pass in the unfortunately named "LessPrivatePrefix" for the
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"LinkerPrivatePrefix". It seems to have been used in only one place before I
started this "linker_private" business. I'm thinking that a rename is in
order...
llvm-svn: 76479
2009-07-20 21:30:28 +00:00
a3c6f6bffa
Add plumbing for the `linker_private' linkage type. This type is meant for
...
"private" symbols which the assember shouldn't strip, but which the linker may
remove after evaluation. This is mostly useful for Objective-C metadata.
This is plumbing, so we don't have a use of it yet. More to come, etc.
llvm-svn: 76385
2009-07-20 01:03:30 +00:00
88f35c870b
CMake support for SystemZ.
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llvm-svn: 76384
2009-07-20 00:24:17 +00:00
87ad1e54d4
SystemZ *does* have a CodeGen/AsmPrinter split.
...
- What it doesn't have is the rest of its cmake files...
llvm-svn: 76352
2009-07-19 00:46:44 +00:00
7eaf6dd84a
Tweak cmake files for the four targets that don't split CodeGen out.
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- We should canonicalize this and get rid of the cmake and llvm-config hacks to
support both variants.
llvm-svn: 76350
2009-07-19 00:26:46 +00:00
83779208cc
Add dependencies from TargetInfo onto .td generation.
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- Shouldn't really be necessary, but currently .inc files get included into
some main target headers.
llvm-svn: 76349
2009-07-19 00:21:12 +00:00
67038c1333
Put Target definitions inside Target specific header, and llvm namespace.
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llvm-svn: 76344
2009-07-18 23:03:22 +00:00
0ef680bcbd
Add carry producing / using versions of add / sub
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llvm-svn: 76316
2009-07-18 14:16:06 +00:00
8486df0ed2
Expand frem
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llvm-svn: 76315
2009-07-18 13:44:25 +00:00
de5e015bfd
Turn abort() into unreachable
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llvm-svn: 76314
2009-07-18 13:34:59 +00:00
30b1c2f636
Turn few asserts into errors / unreachable's
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llvm-svn: 76313
2009-07-18 13:33:17 +00:00
6e4bdd7d78
Handle vector returns
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llvm-svn: 76312
2009-07-18 12:51:06 +00:00
39f2a22401
Provide expansion for ct* intrinsics
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llvm-svn: 76311
2009-07-18 12:26:13 +00:00
c3b10f0677
Expand sext_inreg for i1
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llvm-svn: 76310
2009-07-18 12:20:36 +00:00
acd2f4dcea
Add missed return
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llvm-svn: 76209
2009-07-17 18:28:59 +00:00
35e95639c0
Avoid a compiler warning when assertions are turned off.
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llvm-svn: 76176
2009-07-17 12:25:14 +00:00
7ecc62d8c1
Fix 'may be used uninitialized' warning.
...
- Anton, please review.
llvm-svn: 76144
2009-07-17 02:19:26 +00:00
02fc607d54
Unbreak
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llvm-svn: 76064
2009-07-16 14:36:52 +00:00
73fcd3d962
Temporary disable 16 bit bswap
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llvm-svn: 76063
2009-07-16 14:35:57 +00:00
460e59034b
Add instruction formats and few opcodes
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llvm-svn: 76062
2009-07-16 14:35:20 +00:00
902facfe96
Add bswap patterns
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llvm-svn: 76061
2009-07-16 14:34:52 +00:00
ff21565821
Provide crazy pseudos for regpairs spills / reloads
...
llvm-svn: 76060
2009-07-16 14:34:15 +00:00
7fa0ce1a21
Handle long-disp stuff more consistently
...
llvm-svn: 76059
2009-07-16 14:33:52 +00:00
30e1cb2ab9
All FP instructions have 12 bit memory displacement field
...
llvm-svn: 76058
2009-07-16 14:33:27 +00:00
5b03970c7b
Another predicate routine
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llvm-svn: 76057
2009-07-16 14:33:01 +00:00
5761e33ce4
More helpers
...
llvm-svn: 76056
2009-07-16 14:32:41 +00:00
b22afc7bcc
Add bunch of branch folding stuff
...
llvm-svn: 76055
2009-07-16 14:32:19 +00:00
0f8c47a7bb
Add missed opcodes to short => long displacement conversion
...
llvm-svn: 76054
2009-07-16 14:31:52 +00:00
201d49d56a
Cleanup
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llvm-svn: 76053
2009-07-16 14:31:32 +00:00
3ae30e08ef
Fix logic inversion for RI-mode address selection
...
llvm-svn: 76052
2009-07-16 14:31:14 +00:00
4121039bef
Expand 32-bit bitconverts via memory
...
llvm-svn: 76050
2009-07-16 14:30:29 +00:00
bc2ead6ea3
Fix incomin arg stack frame offset in case we need to generate stack frame
...
llvm-svn: 76049
2009-07-16 14:29:57 +00:00
3729850b50
Fix instruction mnemonics for some fp_to_sint operations
...
llvm-svn: 76048
2009-07-16 14:29:26 +00:00
a293caf2ed
i32 values are passed extended also on stack. Handle this in generic way
...
llvm-svn: 76047
2009-07-16 14:29:05 +00:00
1fa01d307c
We definitely have 1-0 bools
...
llvm-svn: 76046
2009-07-16 14:28:46 +00:00
bd41c83ab0
Revert the commit, it just hides the real bug
...
llvm-svn: 76045
2009-07-16 14:28:26 +00:00
6fb6e09781
Out GR128 regclass is not a 'real' i128 one.
...
llvm-svn: 76044
2009-07-16 14:27:53 +00:00
fef4a3b762
Add missed condbranch opcodes
...
llvm-svn: 76043
2009-07-16 14:27:26 +00:00
6c01db428f
Handle bitconverts
...
llvm-svn: 76042
2009-07-16 14:27:01 +00:00
70d0bceed6
Unbreak mvi and friends - emit only 'significant' part of the operand
...
llvm-svn: 76041
2009-07-16 14:26:38 +00:00
573fab1879
Expand fp_to_uint too
...
llvm-svn: 76040
2009-07-16 14:26:06 +00:00
d57f8cee1d
We don't have FP truncstores
...
llvm-svn: 76039
2009-07-16 14:25:46 +00:00
3f254d536a
Expand uint_to_fp
...
llvm-svn: 76038
2009-07-16 14:25:30 +00:00
1ae8098144
Emit proper rounding mode for fp_to_sint
...
llvm-svn: 76037
2009-07-16 14:25:12 +00:00
35a5d6f7ca
f32/f64 regs are stored on stack if we're short in FP regs
...
llvm-svn: 76036
2009-07-16 14:24:57 +00:00
2acdac0f8e
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
...
llvm-svn: 76035
2009-07-16 14:24:41 +00:00
8c18d8972c
Make FP zero to be legal FP immediate via LOAD ZERO
...
llvm-svn: 76034
2009-07-16 14:24:16 +00:00
3894c8b6c2
Loads are not two-address in any way
...
llvm-svn: 76033
2009-07-16 14:24:01 +00:00
c8f76f47dd
Add LOAD NEGATIVE instruction
...
llvm-svn: 76032
2009-07-16 14:23:44 +00:00
ae2d8abf2c
LOAD COMPLEMENT instruction is not really two-addr
...
llvm-svn: 76031
2009-07-16 14:23:30 +00:00
82af42d361
Add multiple add/sub instructions
...
llvm-svn: 76030
2009-07-16 14:23:16 +00:00
b106b60456
Handle FP callee-saved regs
...
llvm-svn: 76029
2009-07-16 14:23:01 +00:00
871784ba88
Proper FP extloads
...
llvm-svn: 76028
2009-07-16 14:22:46 +00:00
12400008a7
Add proper PWS impdef's
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llvm-svn: 76027
2009-07-16 14:22:30 +00:00
3c44a39156
Propagate FP select_cc to dag inserters
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llvm-svn: 76026
2009-07-16 14:22:15 +00:00
430ab4f382
Implement fp_to_sint
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llvm-svn: 76025
2009-07-16 14:21:57 +00:00
345e08d24c
Implement FP regs spills / restores
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llvm-svn: 76024
2009-07-16 14:21:41 +00:00
0fcdd8d424
Add fabs
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llvm-svn: 76023
2009-07-16 14:21:27 +00:00
50485d65d4
Add fneg
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llvm-svn: 76022
2009-07-16 14:21:12 +00:00
d7416e7c0b
We don't have native sine / cosine instructions
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llvm-svn: 76021
2009-07-16 14:20:56 +00:00
77928399b0
More sint_to_fp stuff
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llvm-svn: 76020
2009-07-16 14:20:39 +00:00
8195797de2
Add bunch of FP instructions
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llvm-svn: 76019
2009-07-16 14:20:24 +00:00
45a56de726
We don't have any FP extloads
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llvm-svn: 76018
2009-07-16 14:20:08 +00:00
ead9b9fb31
Implement all comparisons
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llvm-svn: 76017
2009-07-16 14:19:54 +00:00
7cb00653c1
Add constpool lowering / printing
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llvm-svn: 76016
2009-07-16 14:19:35 +00:00
c806cea4cb
Allow FP arguments pass / return
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llvm-svn: 76015
2009-07-16 14:19:16 +00:00
923b47e89d
Register FP regclasses
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llvm-svn: 76014
2009-07-16 14:19:02 +00:00
5509b58cd7
Add FP regs
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llvm-svn: 76013
2009-07-16 14:18:48 +00:00
570d0c36ee
Fix fallout from prev. patch
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llvm-svn: 76012
2009-07-16 14:18:31 +00:00
b25949b0f5
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
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llvm-svn: 76011
2009-07-16 14:18:17 +00:00
e5b04d7102
Use divide single for 32 bit signed divides
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llvm-svn: 76010
2009-07-16 14:17:52 +00:00
2799032a45
Add missed operands types
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llvm-svn: 76009
2009-07-16 14:17:07 +00:00
5fd5c3efb6
Missed part of prev. patch
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llvm-svn: 76008
2009-07-16 14:16:45 +00:00
b950f1961b
Another attempt to fix prologue emission
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llvm-svn: 76007
2009-07-16 14:16:26 +00:00
091872cb37
Implement 'large' PIC model
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llvm-svn: 76006
2009-07-16 14:16:05 +00:00
569a94c4d0
Implement shifts properly (hopefilly - finally!)
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llvm-svn: 76005
2009-07-16 14:15:24 +00:00
e0ad108f04
Remove redundand register move
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llvm-svn: 76004
2009-07-16 14:14:54 +00:00
fe8df8ff61
Properly handle divides. As a bonus - implement memory versions of them.
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llvm-svn: 76003
2009-07-16 14:14:33 +00:00
68b101a0e1
Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford
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llvm-svn: 76002
2009-07-16 14:14:01 +00:00
1de4295372
32 bit rotate is not twoaddr instruction
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llvm-svn: 76001
2009-07-16 14:13:43 +00:00
34ad780d0d
32 bit shifts have only 12 bit displacements
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llvm-svn: 76000
2009-07-16 14:13:24 +00:00
6759661c3f
Add proper register aliases
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llvm-svn: 75999
2009-07-16 14:12:54 +00:00
Nick Lewycky