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Author SHA1 Message Date
Matt Arsenault f7f59b5292 [AMDGPU, AsmParser] Enable the mnemonic spell corrector. 
Patch by Dmitry Venikov

llvm-svn: 321202
 2017-12-20 18:52:57 +00:00
Dmitry Preobrazhensky ac2b02643b [AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tma 
See bugs 35494 and 35559:
https://bugs.llvm.org/show_bug.cgi?id=35494
https://bugs.llvm.org/show_bug.cgi?id=35559

Reviewers: vpykhtin, artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D41007

llvm-svn: 320375
 2017-12-11 15:23:20 +00:00
Matt Arsenault 4d263f6f18 AMDGPU: Add definition for v_swap_b32 
This is somewhat tricky because there are two
pairs of tied operands, and it isn't allowed to be
VOP3 encoded.

llvm-svn: 296519
 2017-02-28 21:09:04 +00:00