Commit Graph

248 Commits

Author SHA1 Message Date
Misha Brukman e73e76dc42 Convert tabs to spaces
llvm-svn: 21452
2005-04-22 17:54:37 +00:00
Misha Brukman 89b8c8d215 Remove trailing whitespace
llvm-svn: 21424
2005-04-21 23:13:11 +00:00
Duraid Madina 0a7c2b9078 print negative 64 bit immediates as negative numbers, makes things a little
easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything

llvm-svn: 21300
2005-04-14 10:08:01 +00:00
Duraid Madina dfbbcc098b oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4
llvm-svn: 21299
2005-04-14 10:06:35 +00:00
Duraid Madina f6b666fb06 we have zextloads, not sextloads!
llvm-svn: 21296
2005-04-14 08:37:32 +00:00
Duraid Madina 2f2312575b * add the shladd instruction
* fold left shifts of 1, 2, 3 or 4 bits into adds

  This doesn't save much now, but should get a serious workout once
  multiplies by constants get converted to shift/add/sub sequences.
  Hold on! :)

llvm-svn: 21282
2005-04-13 06:12:04 +00:00
Duraid Madina e7ef27bcfe * if ANDing with a constant of the form:
0x00000..00FFF..FF
      ^      ^
      ^      ^
    any number of
    0's followed by
    some number of
    1's

    then we use dep.z to just paste zeros over the input. For the special
    cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
    because we're all about readability!!!
    that's what it's about!! readability!

  *twitch* ;D

llvm-svn: 21279
2005-04-13 04:50:54 +00:00
Chris Lattner 7f4c4179a6 Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing
things like this:

       mov r9 = 65535;;
       and r8 = r8, r9;;

To be emitted instead of:

        zxt2 r8 = r8;;

To get this back, the selector for ISD::AND should recognize this case.

llvm-svn: 21269
2005-04-13 02:41:52 +00:00
Duraid Madina fd469bddac * OK, after changing to use liveIn/liveOut instead of IDEFs,
to avoid redundant mov out3=r44 type instructions, we need to
tell the register allocator the truth about out? registers.

FIXME: unfortunately, since the list of allocatable registers is immutable,
we can't simply 'delete r127' from the allocation order, say, if 'out0' is
used. The only correct thing we can do is have a linear order of regs:

out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127

and slide a 'window' of 96 registers along this line, depending on how many
of the out? regs a function actually uses. The only downside of this is
that the out? registers will be allocated _first_, which makes the
resulting assembly ugly. :( Note this in the README. Hope this gets fixed
soon. :) (note the 3rd person speech there)

llvm-svn: 21252
2005-04-12 18:42:59 +00:00
Chris Lattner 14f72885dd Put out* into the allocation order, allowing the register allocator to
coallesce moves into outgoing args.

llvm-svn: 21249
2005-04-12 15:12:51 +00:00
Chris Lattner 6b91767b77 Make sure to realize that calls use their argument regs
llvm-svn: 21248
2005-04-12 15:12:19 +00:00
Duraid Madina b6dfb227b7 stop emitting IDEFs for args - change to using liveIn/liveOut
llvm-svn: 21247
2005-04-12 14:54:44 +00:00
Chris Lattner 607bd26b38 IA64 supports this operation.
llvm-svn: 21228
2005-04-11 18:55:36 +00:00
Duraid Madina 8de7ac092d hmm, should probably change addImm() to take 64-bit arguments one day anyway.
llvm-svn: 21224
2005-04-11 07:16:39 +00:00
Duraid Madina fb43ef78c5 assorted fixes:
* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
  * fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
  * fix nasty thinko - didn't use two-address form of conditional add
    for extending bools to integers, so occasionally there would be
    garbage in the result. it's amazing how often zeros are just
    sitting around in registers ;) - this should fix a bunch of tests.

llvm-svn: 21221
2005-04-11 05:55:56 +00:00
Duraid Madina 46aa06cfed ok, the "ia64 has a boatload of registers" joke stopped being funny today ;)
* fix overallocation of integer (stacked) registers: we can't allocate
  registers for local use if they are required as output registers

this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.

llvm-svn: 21178
2005-04-09 11:53:00 +00:00
Chris Lattner a3a135a9f7 This target does not support/want ISD::BRCONDTWOWAY
llvm-svn: 21164
2005-04-09 03:22:37 +00:00
Duraid Madina 41ff502549 fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn)
fix hack in division (clean up frcpa instruction)

llvm-svn: 21153
2005-04-08 10:01:48 +00:00
Duraid Madina a7abda3989 teach asmprinter to print s8/s14 operands
llvm-svn: 21131
2005-04-07 12:34:36 +00:00
Duraid Madina 8419da8acf codegen immediate forms of add/sub/shift
llvm-svn: 21130
2005-04-07 12:33:38 +00:00
Duraid Madina b484f7c55e add immediate forms of add, sub, shift
llvm-svn: 21129
2005-04-07 12:32:24 +00:00
Duraid Madina c36b6c3b1a steal sampo's div-by-constant-power-of-2 stuff
thanks sampo!!

llvm-svn: 21113
2005-04-06 09:55:17 +00:00
Duraid Madina 03c530786c add fms instruction
llvm-svn: 21112
2005-04-06 09:54:09 +00:00
Duraid Madina c0e9adf3cc lie a bit and say that r1/r12 (GP/SP) _aren't_ callee-save, as we take
care of this ourselves

llvm-svn: 21110
2005-04-06 06:18:36 +00:00
Duraid Madina df0ecbd4cc make sure 'special' registers don't get allocated
llvm-svn: 21109
2005-04-06 06:17:54 +00:00
Duraid Madina 9935f44fb8 fix SREM/UREM, which gave incorrect results for x%y if x was zero. This is
an ugly hack, but it seems to work. I should fix this properly and add a test
as well.

fixes multisource/obsequi (maybe others)

llvm-svn: 21075
2005-04-04 05:05:52 +00:00
Duraid Madina dbc810022b add implicit use op
llvm-svn: 21074
2005-04-04 04:50:57 +00:00
Duraid Madina 6c9afaead4 .bss is no problem here.
llvm-svn: 21061
2005-04-03 14:52:01 +00:00
Duraid Madina 50b339b7fa ia64 asmprinter fixes:
- turn off assembler's autoalignment
  - set FunctionAddrPrefix/Suffix so that .data8 entries pointing to
    functions have their value wrapped in @fptr(), so that a function
    descriptor will be materialized for that function.

llvm-svn: 21025
2005-04-02 12:30:47 +00:00
Duraid Madina c935c833d1 support IDEF, fnegabs (thanks sampo)
llvm-svn: 21023
2005-04-02 10:33:53 +00:00
Duraid Madina 0ccac38ed3 add fnegabs op
llvm-svn: 21022
2005-04-02 10:06:27 +00:00
Duraid Madina 0720dc14ed add support FNEG and FABS
llvm-svn: 21012
2005-04-02 05:18:38 +00:00
Chris Lattner 0b7e4cd107 This target doesn't support fabs/fneg yet.
llvm-svn: 21010
2005-04-02 05:03:24 +00:00
Duraid Madina 617af97040 repair mindless SELECT waste.
llvm-svn: 20982
2005-04-01 10:35:00 +00:00
Duraid Madina 21ce5f7a66 Assorted fixes:
* Stop being pessimistic about output register allocation
  * Start to handle function descriptors: compute target GPs and so on
  when doing indirect calls etc. Not there yet, though. For the moment,
  we try to use _indirect_ branches wherever possible, to stress test
  function descriptors.
  * FP divide-by-zero should work now
  * add varargs (it doesn't work, though)

At this point, all of SingleSource passes (modulo C++ tests that are due
to issues with the CFE, see note in the README.) Much of MultiSource also
passes although there's still a ton of bugs around. Something for me to
work on tomorrow, then. :)

llvm-svn: 20960
2005-03-31 12:31:11 +00:00
Duraid Madina ffb9d14bb3 * declare local common symbols as such (.lcomm, not merely .common)
* begin great adventure into correct function descriptor materialization

llvm-svn: 20956
2005-03-31 07:40:24 +00:00
Duraid Madina 8106f12d33 daintyness
llvm-svn: 20955
2005-03-31 07:36:43 +00:00
Duraid Madina 73c2777a0e add what we need to fudge a 'floating point conditional move', this is
used to get FP div-by-zero working properly (shunt the right answer
depending on how frcpa sets its predicate output)

llvm-svn: 20954
2005-03-31 07:32:32 +00:00
Duraid Madina bdbf8ba2d0 Emit .global @function and .global @object entries so the Intel ias
assembler may be used; identify LLVM output as such.

llvm-svn: 20892
2005-03-28 15:21:43 +00:00
Nate Begeman f656525cb6 Change interface to LowerCallTo to take a boolean isVarArg argument.
llvm-svn: 20842
2005-03-26 01:29:23 +00:00
Chris Lattner fed2a42895 fix a compilation error, patch contributed by Bill Wendling!
llvm-svn: 20807
2005-03-24 05:12:48 +00:00
Nate Begeman 952105220e Remove comments that are now meaningless from the pattern ISels, at Chris's
request.

llvm-svn: 20804
2005-03-24 04:39:54 +00:00
Alkis Evlogimenos 1a48561432 Stop using deprecated interface.
llvm-svn: 20679
2005-03-19 09:22:17 +00:00
Duraid Madina 8a3aa43422 typo/denial
llvm-svn: 20663
2005-03-17 20:23:27 +00:00
Duraid Madina df642ff2ae clean up warnings when building in release mode
llvm-svn: 20658
2005-03-17 19:00:40 +00:00
Duraid Madina a06265a119 OK, IA64 is statically linked into llc
llvm-svn: 20655
2005-03-17 18:37:05 +00:00
Duraid Madina f5cc2c453d build the IA64 target as a .so for now
llvm-svn: 20654
2005-03-17 18:29:04 +00:00
Duraid Madina 91ed0a11cf and so it begins...
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!

llvm-svn: 20652
2005-03-17 18:17:03 +00:00