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248 Commits

Author SHA1 Message Date
Duraid Madina c090ac13bd some hoovering 
llvm-svn: 25643
 2006-01-26 09:08:31 +00:00
Evan Cheng 030e002fb9 Set SchedulingForLatency to be the default scheduling preference for all. 
llvm-svn: 25607
 2006-01-25 18:52:42 +00:00
Nate Begeman e74795cd70 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Evan Cheng 1092a02619 Default scheduling preference is SchedulingForLatency. 
llvm-svn: 25603
 2006-01-25 09:15:54 +00:00
Duraid Madina 5ea06a9f13 add bundling! well not really, for now it's just stop-insertion. 
llvm-svn: 25593
 2006-01-25 02:23:38 +00:00
Duraid Madina 37c8ad14f4 die, die!! r15, you are not callee-saved 
llvm-svn: 25527
 2006-01-23 06:11:45 +00:00
Duraid Madina cc87402925 fix register corruption! (my god.) r15 is a scratch reg, using that as 
a frame pointer is a pretty doofus thing to do. use r5 instead, and
mark it callee-saved, coz that's what it is!

llvm-svn: 25526
 2006-01-23 06:08:46 +00:00
Chris Lattner de02d7727f Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Duraid Madina 4204e02fc6 insignificant, but next up is proper stack frame layout! 
llvm-svn: 25497
 2006-01-21 14:27:19 +00:00
Duraid Madina f54c9395e7 remove RET hack, add proper support for rets (watching out for ret voids) 
llvm-svn: 25486
 2006-01-20 20:24:31 +00:00
Duraid Madina 4026e12e85 fix sext breakage: now we correctly deal with functions that return 
int vs uint

llvm-svn: 25478
 2006-01-20 16:10:05 +00:00
Duraid Madina 9a8fb20689 fix storing bools! eek! 
llvm-svn: 25476
 2006-01-20 03:40:25 +00:00
Duraid Madina 550d8ec1ad fix boolean XOR (which fixes up comparisons..) 
llvm-svn: 25462
 2006-01-19 15:18:56 +00:00
Duraid Madina 4d69a01254 BOOM! 
llvm-svn: 25460
 2006-01-19 14:14:11 +00:00
Duraid Madina bcbcfac6ea click click 
llvm-svn: 25459
 2006-01-19 14:13:11 +00:00
Duraid Madina 29b9d7cdff fix calls that return f32 
llvm-svn: 25455
 2006-01-19 08:31:51 +00:00
Duraid Madina e08a95d3c1 oops, this shouldn't have gotten in 
llvm-svn: 25388
 2006-01-17 03:09:48 +00:00
Duraid Madina 266ff6056a use proper (82-bit) spills/fills when spilling FP regs, so that 
divides don't get broken. this fixes obsequi, smg2000, and probably
a bunch of other stuff (tm)

llvm-svn: 25385
 2006-01-17 02:04:52 +00:00
Duraid Madina c261469ad9 fixing divides 
llvm-svn: 25383
 2006-01-17 01:19:49 +00:00
Duraid Madina e995910e64 fixing divides: FP should now be 100%, and integers are fine too 
unless you try to div/mod 0 by anything, in which case you will
get some cute number, and not 0, which is bad.

llvm-svn: 25358
 2006-01-16 14:33:04 +00:00
Duraid Madina ba187774fe fix division! again!! pattern isel, prepare to die. 
llvm-svn: 25353
 2006-01-16 06:33:38 +00:00
Duraid Madina c8817d2857 explain that r12 is the stack pointer reg 
llvm-svn: 25336
 2006-01-15 09:45:23 +00:00
Chris Lattner c17b41c3ba Cleanup IA64ISD, tell the graph drawer what the symbolic names for the enums are. 
llvm-svn: 25324
 2006-01-14 22:27:21 +00:00
Nate Begeman 2fba8a3aaa bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Duraid Madina 0b94324c5e don't be a doofus - this fixes storing bools 
llvm-svn: 25274
 2006-01-13 10:28:25 +00:00
Chris Lattner fdc6d1ea69 new nodes 
llvm-svn: 25271
 2006-01-13 02:40:58 +00:00
Duraid Madina 84be729a56 sabre's (correct) fix means these guys need to be flagged as well (else 
the scheduler will complain)

llvm-svn: 25241
 2006-01-12 03:28:40 +00:00
Chris Lattner 9d5e4e8f3c Fix an itanium call lowering bug for duraid 
llvm-svn: 25235
 2006-01-12 01:33:08 +00:00
Nate Begeman 6b9e00dedc Missed a spot. 
llvm-svn: 25233
 2006-01-11 23:20:28 +00:00
Nate Begeman 1b8121b227 Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner eaf94a8d2e tblgen does this now 
llvm-svn: 25220
 2006-01-11 19:53:22 +00:00
Duraid Madina 0302e62296 cleanup GETFD 
llvm-svn: 25198
 2006-01-11 03:50:40 +00:00
Duraid Madina c712fd6b4e this just might work 
llvm-svn: 25195
 2006-01-11 01:38:07 +00:00
Duraid Madina 0d5d08b26e add support for selecting bools 
FIXME: this is commented out because it makes tblgen go a bit fruity
llvm-svn: 25193
 2006-01-11 01:21:12 +00:00
Chris Lattner 0fb2ae7d17 silence a bogus warning 
llvm-svn: 25185
 2006-01-10 19:45:18 +00:00
Duraid Madina 014e8ee806 heh, 'sif it'd be a legalizer bug. 
llvm-svn: 25172
 2006-01-10 05:26:01 +00:00
Duraid Madina e977a93bd5 support functions that return bool (this "should" work but doesn't, 
*maybe* due to a legalizer bug.)

llvm-svn: 25171
 2006-01-10 05:08:25 +00:00
Chris Lattner efbb8da3f5 silence a bogus gcc warning 
llvm-svn: 25129
 2006-01-06 17:56:38 +00:00
Jim Laskey deeafa0f00 Had expand logic backward. 
llvm-svn: 25105
 2006-01-05 01:47:43 +00:00
Jim Laskey 762e9ec06c Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.

llvm-svn: 25104
 2006-01-05 01:25:28 +00:00
Duraid Madina 69ac08c683 nasty paste-o, calls passing more than 8 arguments along were having 
args >8 put into the wrong place

llvm-svn: 25027
 2005-12-27 10:17:03 +00:00
Evan Cheng 14c53b45f5 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Duraid Madina 6b240e55d1 unbreak calls, a few more tests should run. Tomorrow: bugpoint! 
llvm-svn: 25010
 2005-12-25 14:09:08 +00:00
Duraid Madina 06dcc199f0 we don't feed our call instructions extra operands 
llvm-svn: 25009
 2005-12-25 14:07:01 +00:00
Chris Lattner 177d7af5d5 remove dead code 
llvm-svn: 24965
 2005-12-22 21:16:08 +00:00
Duraid Madina 644e7db818 this is a hack, which may or may not hang around. In short: 
whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.

BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952
 2005-12-22 13:29:14 +00:00
Duraid Madina 3692fa14b8 we can't do this directly in lowering, so we need this case 
llvm-svn: 24951
 2005-12-22 07:14:45 +00:00
Duraid Madina 3608ab87c0 oops, back this out 
llvm-svn: 24950
 2005-12-22 07:13:51 +00:00
Duraid Madina b1d57fb175 we can't all have brains now, can we 
llvm-svn: 24948
 2005-12-22 06:41:39 +00:00
Duraid Madina d0c146d59f this should take care of calls to varadic functions, but it doesn.,t 
BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string, etce

llvm-svn: 24947
 2005-12-22 06:39:57 +00:00
Duraid Madina a8de8a5db4 we need to emit the getf.d instruction in lowering, so add it 
to IA64ISD

llvm-svn: 24946
 2005-12-22 06:38:38 +00:00
Duraid Madina 5ccf76fed3 I shoulda done this a *long* time ago (tm): implement calls properly, 
i.e. r1/r12/rp are saved/restored regardless of scheduling/luck

TODO: calls to external symbols, indirect (function descriptor) calls,
      performance (we're being paranoid right now)

BUG: the code for handling calls to vararg functions breaks if FP
args are passed (this will make printf() go haywire so a bunch of
tests will fail)

BUG: this seems to trigger some legalize nastiness
llvm-svn: 24942
 2005-12-22 04:07:40 +00:00
Duraid Madina 8f6c86fe3b kill SelectCALL() in the DAG isel, we handle this in lowering now, like 
SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about
ISD::CALL/TAILCALL)

llvm-svn: 24941
 2005-12-22 03:58:17 +00:00
Duraid Madina a743e00e7a update tablegen files - nothing to see here 
llvm-svn: 24939
 2005-12-22 03:56:03 +00:00
Jim Laskey 9e296bee9a Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Chris Lattner c54cddd25b Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted. 
llvm-svn: 24595
 2005-12-05 02:34:29 +00:00
Chris Lattner 93feffb4ed IA64 doesn't support the LOCATION node, and for some reason the ISelPattern 
stuff isn't using ISelLowering.cpp

llvm-svn: 24567
 2005-12-01 18:19:53 +00:00
Nate Begeman 006bb04f3a Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Chris Lattner a75694aa16 Pay attn to the node returned by SelectNodeTo 
llvm-svn: 24551
 2005-11-30 23:02:08 +00:00
Nate Begeman 6f8c1ace6e No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
 2005-11-30 18:54:35 +00:00
Chris Lattner 9c415364cf No targets support line number info yet. 
llvm-svn: 24513
 2005-11-29 06:16:21 +00:00
Duraid Madina 0c88f150c6 add support for dynamic_stackalloc to the dag isel (thanks andrew ;) 
next up: support argument passing in memory, not just registers

llvm-svn: 24490
 2005-11-25 07:49:25 +00:00
Duraid Madina 8edbf805d7 add support for div/rem to the dag->dag isel. yay. 
llvm-svn: 24472
 2005-11-21 14:14:54 +00:00
Chris Lattner b9db67a045 Eliminate unneeded intermediate class. Move doFinalizeMethod to bottom of 
file.

llvm-svn: 24470
 2005-11-21 08:40:17 +00:00
Chris Lattner b55de47595 Start using shared asmprinter Constant Pool emitter, use shorter cpi names. 
llvm-svn: 24469
 2005-11-21 08:38:26 +00:00
Chris Lattner 99946fb63f Adjust to capitalized AsmPrinter method names 
llvm-svn: 24456
 2005-11-21 07:51:23 +00:00
Chris Lattner 2b53ea99b0 Use PrivateGlobalPrefix for basic block labels 
llvm-svn: 24452
 2005-11-21 07:39:22 +00:00
Chris Lattner 2bccd73dbb Start using SwitchSection, allowing globals and functions to be emitted 
to specific sections.  Delete some dead functions copied from the X86 backend.

llvm-svn: 24449
 2005-11-21 07:26:04 +00:00
Chris Lattner 2c0b435ba6 Rename SwitchSection -> switchSection to avoid conflicting with a future 
change.

llvm-svn: 24443
 2005-11-21 06:55:27 +00:00
Chris Lattner 8a4995e42a Start using PrivateGlobalPrefix correctly 
llvm-svn: 24442
 2005-11-21 06:51:52 +00:00
Duraid Madina 76034f95f6 add FP select. next up - divide! 
llvm-svn: 24346
 2005-11-14 01:17:30 +00:00
Chris Lattner b28f214033 Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. 
llvm-svn: 24233
 2005-11-08 02:11:51 +00:00
Duraid Madina 3c1c8c55c3 add support for storing and returning bools 
llvm-svn: 24228
 2005-11-07 03:11:02 +00:00
Duraid Madina 4a30d4a460 just some random hacking - calls (particularly indirect) need a lot of 
love (especially with -sched=simple)

llvm-svn: 24225
 2005-11-06 13:43:30 +00:00
Duraid Madina 4645db0948 ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and 
a bunch of other things) but is currently ignored by the code
generator.

llvm-svn: 24206
 2005-11-06 04:29:30 +00:00
Duraid Madina 31071b7471 oops, forgot to load GP for indirect calls, though the old code now commented 
out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)

would fix this but it's 3am! :O

llvm-svn: 24186
 2005-11-04 17:55:53 +00:00
Duraid Madina d3260128af kill redundant SP/GP/RP save/restores across calls 
llvm-svn: 24183
 2005-11-04 10:01:10 +00:00
Duraid Madina fc1d1b2499 add support for loading bools 
llvm-svn: 24182
 2005-11-04 09:59:06 +00:00
Duraid Madina 7ac646ef95 fun with predicates! (add TRUNC i64->i1, AND i1 i1, fix XOR i1 i1) 
llvm-svn: 24175
 2005-11-04 00:57:56 +00:00
Duraid Madina f0f22a55b0 add pattern to load constant 0 into a predicate reg 
llvm-svn: 24164
 2005-11-03 10:09:32 +00:00
Chris Lattner 674660ff03 Fix a bug that prevented this pattern from matching 
llvm-svn: 24161
 2005-11-03 05:45:34 +00:00
Duraid Madina 955ffafd79 "fix" support for FP constants (this code asserts in the scheduler, 
though)

llvm-svn: 24152
 2005-11-02 07:32:59 +00:00
Duraid Madina 4480dcdcea add F0 and F1 to the FP register class 
llvm-svn: 24151
 2005-11-02 07:30:39 +00:00
Chris Lattner b5310bdbe9 This works now 
llvm-svn: 24150
 2005-11-02 06:49:37 +00:00
Duraid Madina 17decbb253 add support for SELECT to TargetSelectionDAG.td, add support for 
selecting ints to IA64, and a few other ia64 bits and pieces

llvm-svn: 24147
 2005-11-02 02:37:18 +00:00
Duraid Madina 9abf1650ed add support for loading FP constants +0.0 and +1.0 to the dag isel, 
stop pretending -0.0 and -1.0 are machine constants

llvm-svn: 24146
 2005-11-02 02:35:04 +00:00
Duraid Madina 5a087ff8c3 heh, scheduling was easy? 
need to send chris, jim and sampo a box of fish each

llvm-svn: 24135
 2005-11-01 05:49:08 +00:00
Duraid Madina 9b61d3c1e2 FORTRAN!!! :( and other similarly unfortunate things mean that on ia64 
one sometimes needs to pass FP args in both FP *and* integer registers.

llvm-svn: 24134
 2005-11-01 05:46:16 +00:00
Duraid Madina b81b61330e so tablegen was thinking I might want to convert FPs to predicates. 
clever little tablegen!

llvm-svn: 24133
 2005-11-01 03:32:15 +00:00
Duraid Madina 6c912bffd6 add support for int->FP and FP->int ops, and add ia64 patterns for these 
llvm-svn: 24132
 2005-11-01 03:07:25 +00:00
Duraid Madina a284b6636f add zeroextend predicate->integer 
llvm-svn: 24131
 2005-11-01 01:29:55 +00:00
Duraid Madina 88fc69f627 add FP compares and implicit register defs to the dag isel 
llvm-svn: 24118
 2005-10-31 01:42:11 +00:00
Duraid Madina 57b7ee9da8 fix some broken comparisons, this affected the Pattern isel too. 
llvm-svn: 24109
 2005-10-30 10:14:19 +00:00
Duraid Madina 7abaf906e2 add some FP stuff, some mix.* stuff, and constant pool support to the 
DAG instruction selector, which should be destroyed one day (in the pattern
isel also) since ia64 can pack any constant in the instruction stream

llvm-svn: 24094
 2005-10-29 16:08:30 +00:00
Duraid Madina c252f33fdb add shladd 
llvm-svn: 24080
 2005-10-29 04:13:40 +00:00
Chris Lattner 12fca42062 These are autogenerated 
llvm-svn: 24063
 2005-10-28 18:26:52 +00:00
Duraid Madina f221c261f3 DAG->DAG instruction selection for ia64! "hello world" works, not much else. 
use -enable-ia64-dag-isel to turn this on

TODO: delete lowering stuff from the pattern isel
    : get operations on predicate bits working
    : get other bits of pseudocode going
    : use sampo's mulh/mull-using divide-by-constant magic
    : *so* many patterns ("extr", "tbit" and "dep" will be fun :)
    : add FP
    : add a JIT!
    : get it working 100%

in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.

OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.

llvm-svn: 24058
 2005-10-28 17:46:35 +00:00
Chris Lattner 529169cab2 remove dead stuff 
llvm-svn: 24054
 2005-10-28 04:58:24 +00:00
Chris Lattner e68a807025 Eliminate getClass, it is not needed 
llvm-svn: 24053
 2005-10-28 04:57:11 +00:00
Nate Begeman ae5d9bd65b Don't generate operations that aren't yet supported 
llvm-svn: 23858
 2005-10-21 01:52:45 +00:00