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Author SHA1 Message Date
Krzysztof Parzyszek 3ad0d01e9e [Hexagon] Add inline-asm constraint 'a' for modifier register class 
For example
  asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory")

llvm-svn: 308761
 2017-07-21 17:51:27 +00:00