Commit Graph

235616 Commits

Author SHA1 Message Date
George Burgess IV 1ca8affb24 [CFLAA] Split the CFL graph out from CFLSteens. NFC.
Patch by Jia Chen.

Differential Revision: http://reviews.llvm.org/D21963

llvm-svn: 274591
2016-07-06 00:36:12 +00:00
George Burgess IV a362b09a81 [MSSA] Fix typo. NFC.
llvm-svn: 274590
2016-07-06 00:28:43 +00:00
George Burgess IV bfa401e5ad [CFLAA] Split into Anders+Steens analysis.
StratifiedSets (as implemented) is very fast, but its accuracy is also
limited. If we take a more aggressive andersens-like approach, we can be
way more accurate, but we'll also end up being slower.

So, we've decided to split CFLAA into CFLSteensAA and CFLAndersAA.

Long-term, we want to end up in a place where CFLSteens is queried
first; if it can provide an answer, great (since queries are basically
map lookups). Otherwise, we'll fall back to CFLAnders, BasicAA, etc.

This patch splits everything out so we can try to do something like
that when we get a reasonable CFLAnders implementation.

Patch by Jia Chen.

Differential Revision: http://reviews.llvm.org/D21910

llvm-svn: 274589
2016-07-06 00:26:41 +00:00
David Majnemer 69898e6bc5 Attempt to reduce flakiness in workingset-samples.cpp
The test is matching against 'KB' but it looks like the output can be
'MB'.

llvm-svn: 274587
2016-07-06 00:12:43 +00:00
Tim Northover 449c15e1bd AArch64: try to fix optimized build failure.
I think the Ops filled out by Regex::match contain pointers into the temporary
std::string returned by StringRef::upper. Its lifetime is extended by the call
to match, but only until the end of that call (not to the uses of Ops later
on).

llvm-svn: 274586
2016-07-05 23:15:58 +00:00
Greg Clayton ad2b63cbaa Warning about debugging optimized code was not happening without dSYMs. Now it works for DWARF in .o files on Darwin.
I changed "m_is_optimized" in lldb_private::CompileUnit over to be a lldb::LazyBool so that it can be set to eLazyBoolCalculate if it needs to be parsed later. With SymbolFileDWARFDebugMap, we don't actually open the DWARF in the .o files for each compile unit until later, and we can't tell if a compile unit is optimized ahead of time. So to avoid pulling in all .o right away just so we can answer the questions of "is this compile unit optimized" we defer it until a point where we will have the compile unit parsed.

<rdar://problem/26068360> 

llvm-svn: 274585
2016-07-05 23:01:20 +00:00
Tim Northover be22e5ccbe TableGen: avoid string copy.
llvm-svn: 274584
2016-07-05 22:51:30 +00:00
Simon Pilgrim 7643b337a2 [X86][AVX2] Simplified BROADCAST combining to avoid repeated matching attempts
llvm-svn: 274583
2016-07-05 22:41:04 +00:00
Manman Ren 39b37c0f9d Fix an ordering problem in r274431
llvm-svn: 274582
2016-07-05 22:24:44 +00:00
Matt Arsenault e8dbf791b1 AMDGPU: Remove unnecessary string usage in AsmPrinter
Registers are printed a lot, so don't create temporary
std::strings. Using char instead of a string to an ostream
saves a function call.

llvm-svn: 274581
2016-07-05 22:06:56 +00:00
Sean Callanan 8ba1654d48 Fixed a bug where we report a single type multiple times in namespaces.
Also added a testcase.

<rdar://problem/22786569>

llvm-svn: 274580
2016-07-05 22:06:01 +00:00
Ryan Govostes b395d7271d [asan] Update tests according to r274578
llvm-svn: 274579
2016-07-05 21:53:23 +00:00
Ryan Govostes e51401bdab [asan] Add a hidden option for Mach-O global metadata liveness tracking
llvm-svn: 274578
2016-07-05 21:53:08 +00:00
Kelvin Li 0cd68276a1 [OpenMP] remove outdated comment (NFC)
llvm-svn: 274577
2016-07-05 21:38:53 +00:00
Tim Northover e6ae6767d9 AArch64: TableGenerate system instruction operands.
The way the named arguments for various system instructions are handled at the
moment has a few problems:

  - Large-scale duplication between AArch64BaseInfo.h and AArch64BaseInfo.cpp
  - That weird Mapping class that I have no idea what I was on when I thought
    it was a good idea.
  - Searches are performed linearly through the entire list.
  - We print absolutely all registers in upper-case, even though some are
    canonically mixed case (SPSel for example).
  - The ARM ARM specifies sysregs in terms of 5 fields, but those are relegated
    to comments in our implementation, with a slightly opaque hex value
    indicating the canonical encoding LLVM will use.

This adds a new TableGen backend to produce efficiently searchable tables, and
switches AArch64 over to using that infrastructure.

llvm-svn: 274576
2016-07-05 21:23:04 +00:00
Tim Northover 88403d7a84 TableGen: promote "code" type from syntactic sugar.
It's being immediately converted to a "string", but being able to tell what
type the field was originally can be useful in backends.

llvm-svn: 274575
2016-07-05 21:22:55 +00:00
Rafael Espindola aaa0191be6 Transfer ownership of the gold plugin.
llvm-svn: 274574
2016-07-05 20:49:50 +00:00
Balaram Makam d4acd7ed10 Revert r259387: "AArch64: Implement missed conditional compare sequences."
This reverts commit r259387 because it inserts illegal code after legalization
    in some backends where i64 OR type is illegal for example.

llvm-svn: 274573
2016-07-05 20:24:05 +00:00
Simon Pilgrim bec6543d17 [X86][AVX2] Add support for target shuffle combining to BROADCAST
Only support broadcast from vector register so far - memory folding support will have to wait.

llvm-svn: 274572
2016-07-05 20:11:29 +00:00
Simon Pilgrim 48adedffb7 [X86][AVX512] Fixed decoding of permd/permpd variable mask shuffles + enabled them for target shuffle combining
Corrected element mask masking to extract the bottom index bits (now matches the perm2 implementation but for unary inputs).

llvm-svn: 274571
2016-07-05 18:31:17 +00:00
Saleem Abdulrasool 4d950ef892 ARM: fix `-mlong-calls` for WoA
Not all code-paths set the relocation model to static for Windows.  This
currently breaks on Windows ARM with `-mlong-calls` when built with clang.
Loosen the assertion to what it was previously.  We would ideally ensure that
all the configuration sets Windows to static relocation model.

llvm-svn: 274570
2016-07-05 18:30:52 +00:00
Matt Arsenault 2d79389508 DAGCombiner: Fold away vector extract of insert with the same index
This only really matters when the index is non-constant since the
constant case already gets taken care of by other combines.

llvm-svn: 274569
2016-07-05 18:25:02 +00:00
Greg Clayton d458c4de36 Fix "lldb.SBProcess.is_stopped" and "lldb.SBProcess.is_running" to do the right thing.
https://llvm.org/bugs/show_bug.cgi?id=28428

llvm-svn: 274568
2016-07-05 18:19:43 +00:00
Tim Northover 01dff9d18a AArch64: use correct SDValue # when looking for bitfield placement.
The other use really does only care about the SDNode (it checks the
opcode against a whitelist), but bitFieldPlacement can be misled if
the node produces multiple results.

Patch by Ismail Badawi.

llvm-svn: 274567
2016-07-05 18:02:57 +00:00
Erik Pilkington f1bd000f71 [Sema] Fix a bug where pack expansion was not expanded in type alias
The problem is that the parameter pack in a function type type alias is not
reexpanded after being transformed. Also remove an incorrect comment in a
similar function. Fixes PR26017.

Differential Revision: http://reviews.llvm.org/D21030

llvm-svn: 274566
2016-07-05 17:57:24 +00:00
Justin Bogner 2a15ffa2bf Re-apply "test: Use add_lit_testsuites so that subsets of tests can be specified"
This version should actually remove the empty directories I removed
all of the files from. Thanks to tstellar for pointing out git-svn's
--rmdir flag.

Original message:

This creates make/ninja targets like check-clang-codegen and
check-clang-unit, much like LLVM already has. I had to move some input
files into Input directories so they weren't picked up as test
directories.

llvm-svn: 274565
2016-07-05 17:54:40 +00:00
Matt Arsenault ffc8275f2b AMDGPU: Fix folding SGPRs into madak/madmk src0
Because of the special immediate operand, the constant
bus is already used so SGPRs are never useful.

r263212 changed the name of the immediate operand, which
broke the verifier check for the restriction.

llvm-svn: 274564
2016-07-05 17:09:01 +00:00
Davide Italiano a8d89f3500 [MC/Darwin] Fix a -Wmisleading-indentation warning, reported by GCC 6.
llvm-svn: 274563
2016-07-05 16:56:09 +00:00
Justin Bogner a73e81c53b Revert "test: Use add_lit_testsuites so that subsets of tests can be specified"
This reverts r274560. It's breaking a bunch of bots due to a directory
with a space in the name. Doesn't repro locally for some reason.

llvm-svn: 274562
2016-07-05 16:14:58 +00:00
Tom Stellard a4b746d808 AMDGPU/SI: Remove address space query functions from AMDGPUDAGToDAGISel
Summary:
These have been replaced with TableGen code (except for isConstantLoad,
which is still used for R600).  The queries were broken for cases
where MemOperand was a PseudoSourceValue.

Reviewers: arsenm

Subscribers: arsenm, kzhuravl, llvm-commits

Differential Revision: http://reviews.llvm.org/D21684

llvm-svn: 274561
2016-07-05 16:10:44 +00:00
Justin Bogner 2976e014fc test: Use add_lit_testsuites so that subsets of tests can be specified
This creates make/ninja targets like check-clang-codegen and
check-clang-unit, much like LLVM already has. I had to move some input
files into Input directories so they weren't picked up as test
directories.

llvm-svn: 274560
2016-07-05 16:06:12 +00:00
Michael Zuckerman b920665493 [Clang][Feature] Adding CLFLUSHOPT feature and intrinsic to clang
Differential Revision: http://reviews.llvm.org/D21792

llvm-svn: 274559
2016-07-05 15:56:03 +00:00
Matthew Simpson 89188729c3 [LV] Refactor integer induction widening (NFC)
This patch also removes the SCEV variants of getStepVector() since they have no
uses after the refactoring.

Differential Revision: http://reviews.llvm.org/D21903

llvm-svn: 274558
2016-07-05 15:41:28 +00:00
Tobias Grosser d1e90f5929 cmake: do not check-format anything in lib/External
There is no need to specifically match for isl, but we can exclude anything in
lib/External from formatting as we assume that externally contributed code
should always match the upstream code. This simplifies the cmake script and
allows additional external projects to be added without the need to explicitly
exclude them from formatting.

llvm-svn: 274557
2016-07-05 15:26:33 +00:00
Valery Pykhtin e65b39ec09 [AMDGPU] rename DS_1A1D_Off8_NORET to DS_1A2D_Off8_NORET as ds_write2xx use 2 source registers. NFC.
llvm-svn: 274556
2016-07-05 15:15:28 +00:00
Simon Pilgrim 9769428e08 [X86][AVX512] Remove vector BROADCAST builtins.
llvm-svn: 274555
2016-07-05 14:49:58 +00:00
Simon Pilgrim 73ac160dd8 [X86][AVX512] Remove vector BROADCAST builtins.
llvm-svn: 274554
2016-07-05 14:49:31 +00:00
Michael Zuckerman bdc5f40dca [LLVM][INTRINSICS] adding intrinsics of CLFLUSHOPT
Differential Revision: http://reviews.llvm.org/D21789

llvm-svn: 274553
2016-07-05 14:42:12 +00:00
Felix Berger 17934da767 [clang-tidy] UnnecessaryValueParamCheck - only warn for virtual methods
Summary:

As changing virtual methods could break method overrides disable applying the fix and just warn.

Reviewers: alexfh, sbenza

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D21936

llvm-svn: 274552
2016-07-05 14:40:44 +00:00
Sam Kolton a9cd6aa895 [AMDGPU] Assembler: Fix parsing error with floating-point literals passed to integer instructions
Differential Revision: http://reviews.llvm.org/D21972

llvm-svn: 274551
2016-07-05 14:01:11 +00:00
Simon Pilgrim 4e96fbf3c1 [X86][AVX512] Autoupgrade the BROADCAST intrinsics
llvm-svn: 274550
2016-07-05 13:58:47 +00:00
Kuba Brecka c54b108cf8 [tsan] Synchronize leaving a GCD group with notifications
In the patch that introduced support for GCD barrier blocks, I removed releasing a group when leaving it (in dispatch_group_leave). However, this is necessary to synchronize leaving a group and a notification callback (dispatch_group_notify). Adding this back, simplifying dispatch_group_notify_f and adding a test case.

Differential Revision: http://reviews.llvm.org/D21927

llvm-svn: 274549
2016-07-05 13:48:54 +00:00
Kuba Brecka 09d3e53a93 [tsan] dispatch_once interceptor will cause a crash/deadlock when the original dispatch_once is used
Because we use SCOPED_TSAN_INTERCEPTOR in the dispatch_once interceptor, the original dispatch_once can also be sometimes called (when ignores are enabled or when thr->is_inited is false). However the original dispatch_once function doesn’t expect to find “2” in the storage and it will spin forever (but we use “2” to indicate that the initialization is already done, so no waiting is necessary). This patch makes sure we never call the original dispatch_once.

Differential Revision: http://reviews.llvm.org/D21976

llvm-svn: 274548
2016-07-05 13:39:54 +00:00
Daniel Sanders 976d938c1e [mips][ias] Remove k_PhysReg since it's not possible to create an operand of this kind.
Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D21986

llvm-svn: 274547
2016-07-05 13:38:40 +00:00
John Brawn 24ca18e31e [CMake] Adjust export_executable_symbols to cope with non-target link libraries
export_executable_symbols looks though the link libraries of the executable in
order to figure out transitive dependencies, but in doing so it assumes that
all link libraries are also targets. This is not true as of r273302, so adjust
it to check if they actually are targets.

llvm-svn: 274546
2016-07-05 13:16:54 +00:00
Simon Pilgrim 1e91654b38 [X86][AVX512BW] Added BROADCAST intrinsics fast-isel generic IR tests
llvm-svn: 274545
2016-07-05 13:16:05 +00:00
Simon Pilgrim f5a8837e1b [X86][AVX512] Converted the VBROADCAST intrinsics to generic IR
llvm-svn: 274544
2016-07-05 12:59:33 +00:00
James Molloy ae5ff990ae [Thumb] Reapply r272251 with a fix for PR28348 (mk 2)
The important thing I was missing was ensuring newly added constants were kept in topological order. Repositioning the node is correct if the constant is newly added (so it has no topological ordering) but wrong if it already existed - positioning it next in the worklist would break the topological ordering.

Original commit message:
  [Thumb] Select a BIC instead of AND if the immediate can be encoded more optimally negated

  If an immediate is only used in an AND node, it is possible that the immediate can be more optimally materialized when negated. If this is the case, we can negate the immediate and use a BIC instead;

    int i(int a) {
      return a & 0xfffffeec;
    }

  Used to produce:
      ldr r1, [CONSTPOOL]
      ands r0, r1
    CONSTPOOL: 0xfffffeec

  And now produces:
      movs    r1, #255
      adds    r1, #20  ; Less costly immediate generation
      bics    r0, r1

llvm-svn: 274543
2016-07-05 12:37:13 +00:00
Asaf Badouh 136332888a [X86][AVX512F] add float/double abs intrinsics
add abs intrinsics that use native LLVM-IR.
change _mm512_mask[z]_and_epi{32|64} to use select intrinsic

Differential Revision: http://reviews.llvm.org/D21973

llvm-svn: 274542
2016-07-05 12:24:14 +00:00
Asaf Badouh f9cdb8de7a [AVX512] minor fix in sqrt{ss|sd} intrinsics arguments
Differential Revision: http://reviews.llvm.org/D21988

llvm-svn: 274541
2016-07-05 11:36:21 +00:00