9a2c6b8f3e
Delete SplittingSpiller. It was not being used by anyone, and it is being
...
superceded by SplitKit.
llvm-svn: 118754
2010-11-11 00:52:44 +00:00
c87c843db7
It's not necessary to clear out the Size and TBAATag at each of
...
these points.
llvm-svn: 118752
2010-11-11 00:42:22 +00:00
8bf3d832e5
Set NonLocalDepInfo's Size field to UnknownSize when invalidating
...
it, so that it doesn't appear to be a known size.
llvm-svn: 118748
2010-11-11 00:20:27 +00:00
c400670bf1
Insert two blank SlotIndexes between basic blocks instead of just one.
...
This is the first small step towards using closed intervals for liveness instead
of the half-open intervals we're using now.
We want to be able to distinguish between a SlotIndex that represents a variable
being live-out of a basic block, and an index representing a variable live-in to
its successor.
That requires two separate indexes between blocks. One for live-outs and one for
live-ins.
With this change, getMBBEndIdx(MBB).getPrevSlot() becomes stable so it stays
greater than any instructions inserted at the end of MBB.
llvm-svn: 118747
2010-11-11 00:19:20 +00:00
fd0ad36c28
Document debuginfo-tests.
...
llvm-svn: 118746
2010-11-11 00:13:39 +00:00
b057cf8146
Delete unused function.
...
llvm-svn: 118743
2010-11-10 23:56:02 +00:00
3cb87f4c31
No need to add liveness that's already there.
...
llvm-svn: 118742
2010-11-10 23:56:00 +00:00
868dd4e66a
Hook up AliasAnalysis in InlineSpiller. This is used for rematerializing
...
constant loads.
llvm-svn: 118741
2010-11-10 23:55:56 +00:00
c4dd2349c7
Move LDM predicate operand encoding into base clase. Add STM missing STM
...
encoding bits.
llvm-svn: 118738
2010-11-10 23:44:32 +00:00
cc4a491557
ARM LDM encoding for the mode (ia, ib, da, db) operand.
...
llvm-svn: 118736
2010-11-10 23:38:36 +00:00
5a8d781caa
Factor some code into WriteSection.
...
llvm-svn: 118733
2010-11-10 23:36:59 +00:00
58ef598cd1
Fix ARM encoding of non-return LDM instructions.
...
llvm-svn: 118732
2010-11-10 23:18:49 +00:00
e39a9fcc0e
Fix ARM encoding of LDM+Return instruction.
...
llvm-svn: 118730
2010-11-10 23:12:48 +00:00
6791936848
When clearing a non-local pointer dependency cache entry, clear
...
the reverse map too. This fixes seflhost build errors.
llvm-svn: 118729
2010-11-10 22:35:02 +00:00
eb97f59753
Update the section index map after we add the medatada sections.
...
llvm-svn: 118728
2010-11-10 22:34:07 +00:00
364bf04267
Take care of special characters while creating named MDNode name to hold function specific local variable's info.
...
This fixes radar 8653152. I am checking in testcase as a separate check-in.
llvm-svn: 118726
2010-11-10 22:19:21 +00:00
1801410fa8
Use SectionIndexMap in WriteSymbolTable to make it a little less brittle.
...
llvm-svn: 118725
2010-11-10 22:16:43 +00:00
1d760ce8b3
Factor out the code for computing an AliasAnalysis::Location
...
for a given instruction into a helper function.
llvm-svn: 118723
2010-11-10 21:51:35 +00:00
d634003ebd
Factor some code into ComputeIndexMap.
...
llvm-svn: 118722
2010-11-10 21:51:05 +00:00
2e8ca44b81
Fully invalidate cached results when a prior query's size or
...
type is insufficient for, or incompatible with, the current query.
llvm-svn: 118721
2010-11-10 21:45:11 +00:00
ca52411955
Fix an issue where we tried to turn a v2f32 build_vector into a v4i32 build vector with 2 elts
...
llvm-svn: 118720
2010-11-10 21:35:41 +00:00
8f7220e9fd
Reduce the maximum recursion depth, 5 seems pointlessly too much.
...
Probably it should just be 1, but compromise with 3.
llvm-svn: 118718
2010-11-10 20:53:24 +00:00
0a6021a54d
Enhance GVN to do more precise alias queries for non-local memory
...
references. For example, this allows gvn to eliminate the load in
this example:
void foo(int n, int* p, int *q) {
p[0] = 0;
p[1] = 1;
if (n) {
*q = p[0];
}
}
llvm-svn: 118714
2010-11-10 20:37:15 +00:00
51d68339a2
Change the String<size> methods to take a fragment instead of a buffer.
...
llvm-svn: 118709
2010-11-10 20:02:59 +00:00
6ee7d9aade
Basic rematerialization during splitting.
...
Whenever splitting wants to insert a copy, it checks if the value can be
rematerialized cheaply instead.
Missing features:
- Delete instructions when all uses have been rematerialized.
- Truncate live ranges to the remaining uses after rematerialization.
llvm-svn: 118702
2010-11-10 19:31:50 +00:00
89eb6a8b94
RABasic is nearly functionally complete. There are a few remaining
...
benchmarks hitting an assertion.
Adds LiveIntervalUnion::collectInterferingVRegs.
Fixes "late spilling" by checking for any unspillable live vregs among
all physReg aliases.
llvm-svn: 118701
2010-11-10 19:18:47 +00:00
36ef57d2eb
Use MCSectionELF in places we know we have an ELF section.
...
llvm-svn: 118699
2010-11-10 19:05:07 +00:00
d209911642
Use getValueOperand() and getPointerOperand() on load and store
...
instructions instead of hard-coding operand numbers.
llvm-svn: 118698
2010-11-10 19:03:33 +00:00
f899c87343
Rename AccessesArguments and AccessesArgumentsReadonly, and rewrite
...
their comments.
llvm-svn: 118696
2010-11-10 18:30:00 +00:00
f3b1bf1606
Teach InstructionSimplify how to look through PHI nodes. Since PHI
...
nodes can be used in loops, this could result in infinite looping
if there is no recursion limit, so add such a limit. It is also
used for the SelectInst case because in theory there could be an
infinite loop there too if the basic block is unreachable.
llvm-svn: 118694
2010-11-10 18:23:01 +00:00
ebfb6fb563
Fix a copy+pasto Duncan noticed.
...
llvm-svn: 118693
2010-11-10 18:18:23 +00:00
066c1bb1e9
Add a doesAccessArgPointees helper function, and update code to use
...
it, and to be consistent.
llvm-svn: 118692
2010-11-10 18:17:28 +00:00
ca21cd749e
Simplify and clean up MC symbol lookup for ARM constant pool values. This fixes
...
double quoting of ObjC symbol names in constant pool entries.
rdar://8652107
llvm-svn: 118688
2010-11-10 17:59:10 +00:00
2577580967
Factor out the code for testing whether a function accesses
...
arbitrary memory into a helper function, and adjust some comments.
llvm-svn: 118687
2010-11-10 17:34:04 +00:00
3cd9145da6
Give NonLocalDepResult a NonLocalDepEntry member, replacing
...
indivudal members holding the same data, to clarify the relationship
between NonLocalDepResult and NonLocalDepEntry.
llvm-svn: 118686
2010-11-10 17:15:52 +00:00
61cb245436
Detect if llvm-gcc is built on dragonegg.
...
Store the flags needed to disable optimizations and to emit LLVM-IR depending on
the version of llvm-gcc used.
llvm-svn: 118684
2010-11-10 16:31:34 +00:00
b39a89716f
Fix Whitespace.
...
llvm-svn: 118683
2010-11-10 15:06:00 +00:00
885f18cddf
System/Path: Update comments to match code.
...
llvm-svn: 118682
2010-11-10 15:05:50 +00:00
909d238eba
System/Win32/Path: Implement isSymLink.
...
llvm-svn: 118681
2010-11-10 15:05:39 +00:00
b0579e9d3f
Simplify binary operations where one operand is a select instruction.
...
The simplifications performed here never create new instructions, they
only return existing instructions (or a constant), and so are always a
win. In theory they should transform (for example)
%z = and i32 %x, %y
%s = select i1 %cond, i32 %y, i32 %z
%r = and i32 %x, %s
into
%r = and i32 %x, y
but in practice they get into a fight with instcombine, and lose.
Unfortunately instcombine does a poor job in this case. Nonetheless
I'm committing this transform to make it easier to discuss what to
do to make peace with instcombine.
llvm-svn: 118679
2010-11-10 13:00:08 +00:00
23ebef1456
Win32/Process.inc: [PR8527] Process::FileDescriptorIsDisplayed(fd) should not check by FILE_TYPE_CHAR. It must be better to check it with Console API.
...
The special file "NUL" is FILE_TYPE_CHAR with GetFileType(h). It was treated as display device and discarding output to NUL had failed. (eg. opt -o nul)
llvm-svn: 118678
2010-11-10 08:37:47 +00:00
812834b86c
There is no EndPtr anymore - reinterpret the original comment in terms
...
of InputData.
llvm-svn: 118677
2010-11-10 07:46:36 +00:00
f23b2d9d8d
Update ARMConstantPoolValue to not use a modifier string. Use an explicit
...
VariantKind marker to indicate the additional information necessary. Update
MC to handle the new Kinds. rdar://8647623
llvm-svn: 118671
2010-11-10 03:26:07 +00:00
a4ceea8cd8
Add a test to the previous added clo instruction. Patch by Akira again
...
llvm-svn: 118668
2010-11-10 02:22:44 +00:00
67fc18a493
Add clo instruction. Patch by Akira Hatanaka (ahatanaka@mips.com) with some minor tweaks
...
llvm-svn: 118667
2010-11-10 02:13:22 +00:00
0171dc30ff
When checking that the necessary bits are zero in
...
order to reduce ((x<<30)>>24) to x<<6, check the
correct bits. PR 8547.
llvm-svn: 118665
2010-11-10 01:30:56 +00:00
91607f878c
Emit a '!' if this is a "writeback" register or memory address.
...
llvm-svn: 118662
2010-11-10 01:07:54 +00:00
de5c4dc24b
Simplify the LiveRangeEdit::canRematerializeAt() interface a bit.
...
llvm-svn: 118661
2010-11-10 01:05:12 +00:00
2694e14087
Make ModRefBehavior a lattice. Use this to clean up AliasAnalysis
...
chaining and simplify FunctionAttrs' GetModRefBehavior logic.
llvm-svn: 118660
2010-11-10 01:02:18 +00:00
55c4cc76ce
Rename a parameter to avoid confusion with a local variable
...
llvm-svn: 118656
2010-11-10 00:08:58 +00:00
e9a9c6da04
Emit the warning about the register list not being in ascending order only once.
...
llvm-svn: 118653
2010-11-09 23:45:59 +00:00
7e62965a7d
Jim's recent fixes 118600, 118587, 118513 have made these work.
...
llvm-svn: 118652
2010-11-09 23:43:34 +00:00
9bb44a5ce8
Fixed version of 118639 with an extra assert to catch similar problems
...
earlier. Implicit bool -> int conversions are evil!
llvm-svn: 118651
2010-11-09 23:42:07 +00:00
bed9465a96
s/std::vector/SmallVector/
...
llvm-svn: 118648
2010-11-09 23:28:44 +00:00
33048f069f
Revert previous patch. Missed a case.
...
llvm-svn: 118645
2010-11-09 22:54:38 +00:00
da3c0fbc64
Delete the allocated vector.
...
llvm-svn: 118644
2010-11-09 22:51:42 +00:00
d0046ca62d
Define the subtarget feature for the architecture version,
...
as derived from the target triple. This is important for enabling
features that are implied based on the architecture version.
llvm-svn: 118643
2010-11-09 22:50:47 +00:00
193722ebc8
Do not use MEMBARRIER_MCR for any Thumb code.
...
It is only supported for ARM code. Normally Thumb2 code would use DMB instead,
but depending on how the compiler is invoked (e.g., -mattr=-db) that might be
disabled. This prevents a "cannot select MEMBARRIER_MCR" error in that
situation. Radar 8644195
llvm-svn: 118642
2010-11-09 22:50:44 +00:00
2cae3277a5
Two types of instructions have register lists:
...
* LDM, et al, uses a bit mask to indicate the register list.
* VLDM, et al, uses a base register plus number.
The LDM instructions may be non-contiguous, but the VLDM ones must be
contiguous. Those are semantic checks that should be done later in the
compiler. Also postpone the creation of the bit mask until it's needed.
llvm-svn: 118640
2010-11-09 22:44:22 +00:00
4bdd2724e3
Remove IsExplicit. It was always false.
...
llvm-svn: 118639
2010-11-09 22:37:44 +00:00
a942ad4222
Change the ARMConstantPoolValue modifier string to an enumeration. This will
...
help in MC'izing the references that use them.
llvm-svn: 118633
2010-11-09 21:36:17 +00:00
488660554e
Adds RABasic verification and tracing.
...
(retry now that the windows build is green)
llvm-svn: 118630
2010-11-09 21:04:34 +00:00
c275aafbce
Convert comments to doxygen syntax.
...
llvm-svn: 118628
2010-11-09 20:33:57 +00:00
e3467a7687
Teach FunctionAttrs about the VAArg instruction.
...
llvm-svn: 118627
2010-11-09 20:17:38 +00:00
35814e6128
Use the AliasAnalysis interface to determine how a Function accesses
...
memory. This isn't a real improvement with present day AliasAnalysis
implementations; it's mainly for consistency.
llvm-svn: 118624
2010-11-09 20:13:27 +00:00
88ff1ece63
VAArg doesn't capture its operand.
...
llvm-svn: 118623
2010-11-09 20:09:35 +00:00
88d5f7fd95
Translate IntrReadArgMem to AccessesArgumentsReadonly.
...
llvm-svn: 118622
2010-11-09 20:07:20 +00:00
5d06f892ef
Teach AliasAnalysis about AccessesArgumentsReadonly.
...
llvm-svn: 118621
2010-11-09 20:06:55 +00:00
0f17507478
Teach LICM and AliasSetTracker about AccessesArgumentsReadonly.
...
llvm-svn: 118618
2010-11-09 19:58:21 +00:00
de52155685
Teach FunctionAttrs about AccessesArgumentsReadonly.
...
llvm-svn: 118617
2010-11-09 19:56:27 +00:00
7c1fddb531
Add a trivial virtual dtor to AbstractRegisterDescription to appease
...
-Wnon-virtual-dtor.
llvm-svn: 118616
2010-11-09 19:56:25 +00:00
0a843c907f
AccessesArgumentsReadonly is read-only.
...
llvm-svn: 118615
2010-11-09 19:50:00 +00:00
bdb22007bb
Add a AccessesArgumentsReadonly ModRefBehavior value, so that the intrinsic
...
property IntrReadArgMem can be modeled.
llvm-svn: 118614
2010-11-09 19:48:55 +00:00
42d50e920b
Reverting r118604. Windows build broke.
...
llvm-svn: 118613
2010-11-09 19:47:51 +00:00
007484527b
Factor out the logic for onlyReadsMemory into a helper function.
...
llvm-svn: 118611
2010-11-09 19:43:24 +00:00
f501579f8a
Delete AccessesArgumentsAndGlobals, which was unused.
...
llvm-svn: 118610
2010-11-09 19:41:37 +00:00
2fd4c37d8b
Handle ARM constant pool values that need an explicit reference to the '.'
...
pseudo-label. (TLS stuff).
llvm-svn: 118609
2010-11-09 19:40:22 +00:00
4d94e47368
add a case we fail to devirt.
...
llvm-svn: 118608
2010-11-09 19:37:28 +00:00
68147ee320
Trailing whitespace.
...
llvm-svn: 118606
2010-11-09 19:22:26 +00:00
85064c17be
Adds RABasic verification and tracing.
...
llvm-svn: 118604
2010-11-09 19:01:17 +00:00
38f8e76e51
Further MCize ARM constant pool values. This allows basic PIC references for
...
object file emission.
llvm-svn: 118601
2010-11-09 18:45:04 +00:00
7e51095c23
Add encoding of Rt to ARM LDR/STR w/ reg+reg offset encoding.
...
llvm-svn: 118600
2010-11-09 18:43:54 +00:00
91bfeb10b5
Last try to get this reference counting right, I swear.
...
llvm-svn: 118589
2010-11-09 17:47:10 +00:00
2d335436f3
Really fix the leak in the attributes list. Thanks to Benjamin Kramer for pointing out how I was being stupid.
...
llvm-svn: 118588
2010-11-09 17:46:38 +00:00
59002dc973
For ARM load/store instructions, encode [reg+reg] with no shifter immediate as
...
a left shift by zero.
llvm-svn: 118587
2010-11-09 17:38:15 +00:00
9b973490c9
ARM .word data fixups don't need an adjustment.
...
llvm-svn: 118586
2010-11-09 17:36:59 +00:00
fc5ad3f0f9
Factorize code, no functionality change.
...
llvm-svn: 118516
2010-11-09 17:25:51 +00:00
9c5c829d9a
Fix trailing whitespace and style, no functionality change
...
llvm-svn: 118515
2010-11-09 17:25:34 +00:00
dbfb5edbdb
Add encoder method for ARM load/store shifted register offset operands.
...
llvm-svn: 118513
2010-11-09 17:20:53 +00:00
e5276f11ee
Testcase for PR8211 (llc crash at -O0).
...
llvm-svn: 118509
2010-11-09 16:22:27 +00:00
d7e3b54635
System/Path/Windows: Implement GetLLVMDefaultConfigDir.
...
llvm-svn: 118507
2010-11-09 15:11:42 +00:00
86cdb42737
System/Path/Windows: Generalize GetUserHomeDirectory.
...
llvm-svn: 118506
2010-11-09 15:11:31 +00:00
181fd8cd89
System/Path/Windows: Make GetSystemLibraryPaths more generic.
...
llvm-svn: 118505
2010-11-09 15:11:19 +00:00
bb6e51c957
System/Windows: Reduce dependencies.
...
llvm-svn: 118504
2010-11-09 15:11:07 +00:00
8daf3c00c9
System/Windows: Use normalized case and include method.
...
llvm-svn: 118503
2010-11-09 15:10:56 +00:00
df929cf8df
System/Path/Windows: Change GetRootDirectory to return file:/// instead of C:/.
...
llvm-svn: 118502
2010-11-09 15:10:45 +00:00
4b263dddc4
Update comment.
...
llvm-svn: 118501
2010-11-09 15:10:29 +00:00
25e84078e3
Fix leak in my recent fix for PR8442.
...
llvm-svn: 118490
2010-11-09 05:17:47 +00:00
5db8921422
Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl
...
in order to fold it into a load.
llvm-svn: 118471
2010-11-09 01:54:35 +00:00
4677bafd85
Delete an extraneous svn:executable property.
...
llvm-svn: 118470
2010-11-09 01:51:06 +00:00
9098714f8b
Add support for a few simple fixups to the ARM Darwin asm backend. This allows
...
constant pool references and global variable refernces to resolve properly
for object file generation. For example,
int x;
void foo(unsigned a, unsigned *p) {
p[a] = x;
}
can now be successfully compiled directly to an (ARM mode) object file.
llvm-svn: 118469
2010-11-09 01:37:15 +00:00
f11ea9ce61
Fix an inline asm pasto from 117667; was preventing
...
{i64, i64} from matching i128.
llvm-svn: 118465
2010-11-09 01:15:07 +00:00
7b0c25faf6
Fix some places where error messages were being swallowed.
...
llvm-svn: 118464
2010-11-09 01:13:31 +00:00
1fc8ec1d4b
Fix PR8441, a thread unsafe static variable in our dynamic library loading facilities.
...
llvm-svn: 118463
2010-11-09 00:36:06 +00:00
1b83ed5f7c
Revert r118457 and r118458. These won't hold for GPRs.
...
llvm-svn: 118462
2010-11-09 00:30:18 +00:00
9b14a25126
Fix PR8441, a race condition in the static attributes list. While the reference counting was itself threadsafe,
...
the implicit removal of each object from the global list was not. Make this operation atomic.
llvm-svn: 118461
2010-11-09 00:27:03 +00:00
31b850be15
Get the register and count from the register list operands.
...
llvm-svn: 118458
2010-11-08 23:51:20 +00:00
aeead4d1e1
reglist has two operands.
...
llvm-svn: 118457
2010-11-08 23:50:20 +00:00
8d2aa03ce1
The "addRegListOperands()" function returns the start register and the total
...
number of registers in the list.
llvm-svn: 118456
2010-11-08 23:49:57 +00:00
fbb44c4d74
Add some comments noting some correspondences between ModRefBehavior
...
values, LLVM IR function attributes, and LLVM intrinsic attributes.
llvm-svn: 118455
2010-11-08 23:46:02 +00:00
c7baee31ad
Add support for ARM's specialized vector-compare-against-zero instructions.
...
llvm-svn: 118453
2010-11-08 23:21:22 +00:00
9c656fe815
Initial support for Mips32 and Mips32r2. Patch contributed by Akira Hatanaka (ahatanaka@mips.com)
...
llvm-svn: 118447
2010-11-08 21:42:32 +00:00
a91d02bc61
Add "write back" bit encoding.
...
llvm-svn: 118446
2010-11-08 21:28:03 +00:00
69ba1e9ccb
Fix PR8211
...
llvm-svn: 118445
2010-11-08 21:24:59 +00:00
023270e453
Remove contributor names as per coding statndard.
...
llvm-svn: 118442
2010-11-08 20:56:32 +00:00
52be6b41d3
Add an additional test for icmp of select folding.
...
llvm-svn: 118441
2010-11-08 20:56:28 +00:00
142ff82a18
Re-introduce the MaxLookup limit to BasicAliasAnalysis'
...
pointsToConstantMemory code to guard against possible
compile time slowdowns.
llvm-svn: 118440
2010-11-08 20:26:19 +00:00
2a9221793a
Add a testcase for a call which BasicAA says only accesses memory through
...
its arguments and which TBAA says doesn't write to memory.
llvm-svn: 118439
2010-11-08 20:20:11 +00:00
fc82674b9c
Adding working version of assembly parser for the MBlaze backend
...
Major cleanup of whitespace and formatting issues in MBlaze backend
llvm-svn: 118434
2010-11-08 19:40:01 +00:00
470ade12e0
Fix a thinko that Duncan spotted.
...
llvm-svn: 118430
2010-11-08 19:24:47 +00:00
0ef474730f
Revert 118422 in search of bot verdancy.
...
llvm-svn: 118429
2010-11-08 19:17:22 +00:00
c745320cf9
Document parameters. Fix typos.
...
llvm-svn: 118424
2010-11-08 18:28:34 +00:00
3528465232
Adds support for spilling previously allocated live intervals to
...
handle cases in which a register is unavailable for spill code.
Adds LiveIntervalUnion::extract. While processing interferences on a
live virtual register, reuses the same Query object for each
physcial reg.
llvm-svn: 118423
2010-11-08 18:02:08 +00:00
f3e224f830
Support -mcpu=cortex-a8 in ARM attributes - Has Fixme. 1 Test modified.
...
llvm-svn: 118422
2010-11-08 17:58:07 +00:00
8a3c3f2ad3
Fix typo.
...
llvm-svn: 118421
2010-11-08 17:53:02 +00:00
2cd1fd4a82
Make FunctionAttrs TBAA-aware.
...
llvm-svn: 118417
2010-11-08 17:12:04 +00:00
601c94b309
Implement getModRefBehavior for TypeBasedAliasAnalysis.
...
llvm-svn: 118416
2010-11-08 17:10:22 +00:00
fc6b6bd5a6
Complete listing of ARM/MC/ELF relocation enums
...
llvm-svn: 118413
2010-11-08 16:47:27 +00:00
9130bad71f
Extend the AliasAnalysis::pointsToConstantMemory interface to allow it
...
to optionally look for constant or local (alloca) memory.
Teach BasicAliasAnalysis::pointsToConstantMemory to look through Select
and Phi nodes, and to support looking for local memory.
Remove FunctionAttrs' PointsToLocalOrConstantMemory function, now that
AliasAnalysis knows all the tricks that it knew.
llvm-svn: 118412
2010-11-08 16:45:26 +00:00
0b56778d65
Delete getIntrinsicModRefBehavior. Clients can just use the normal
...
getModRefBehavior now, since it now understands intrinsics as well
as normal functions.
llvm-svn: 118411
2010-11-08 16:11:19 +00:00
86449d705a
Make FunctionAttrs use AliasAnalysis::getModRefBehavior, now that it
...
knows about intrinsic functions.
llvm-svn: 118410
2010-11-08 16:10:15 +00:00
e461d7d135
Teach BasicAliasAnalysis::getModRefBehavior(const Function *F)
...
to analyze intrinsic functions.
llvm-svn: 118409
2010-11-08 16:08:43 +00:00
6cf44b0353
Add comments.
...
llvm-svn: 118408
2010-11-08 15:34:42 +00:00
fab7697e42
Add generating function declaration for PTX
...
llvm-svn: 118398
2010-11-08 03:06:08 +00:00
09bf309527
Add physical register counting functions
...
llvm-svn: 118397
2010-11-08 03:00:52 +00:00
c03ec0cc42
Add a dummy PTXMCAsmStreamer class
...
llvm-svn: 118396
2010-11-08 02:58:44 +00:00
9d17a3194e
Set default flags for .rodata.
...
llvm-svn: 118395
2010-11-08 02:47:59 +00:00
345b98eddd
Add registry hook for assembly text output
...
llvm-svn: 118394
2010-11-08 02:21:17 +00:00
424601a9b3
Make RegList an ASM operand so that TableGen will generate code for it. This is
...
an initial implementation and may change once reglists are fully fleshed out.
llvm-svn: 118390
2010-11-08 00:39:58 +00:00
2f9d17c44f
Revert.
...
llvm-svn: 118389
2010-11-08 00:32:40 +00:00
a620bd1fa3
Add simplification of floating point comparisons with the result
...
of a select instruction, the same as already exists for integer
comparisons.
llvm-svn: 118379
2010-11-07 16:46:25 +00:00
f532d31198
Fix a README item: when doing a comparison with the result
...
of a select instruction, see if doing the compare with the
true and false values of the select gives the same result.
If so, that can be used as the value of the comparison.
llvm-svn: 118378
2010-11-07 16:12:23 +00:00
20b11eaa01
Speed up AddSectionToTheEnd. It was walking all fragments in all sections.
...
This is really slow with we have 1000s of sections each with a corresponding
relocation section. Also, it is only used by the ELF writer to add
basic data, so there is no need to force a new layout pass.
Should fix PR8563.
llvm-svn: 118377
2010-11-07 15:03:27 +00:00
5a27007bb7
typos
...
llvm-svn: 118376
2010-11-07 13:48:10 +00:00
68bac75190
In this context, a reglist is a reg.
...
llvm-svn: 118375
2010-11-07 13:08:28 +00:00
3e100cf582
Fix memory leak in StringRef::edit_distance(). 'Allocated' could be leaked on an early return.
...
llvm-svn: 118370
2010-11-07 06:09:02 +00:00
7bcbfe9c80
Testcase for llvm-gcc 118368. 8629268.
...
llvm-svn: 118369
2010-11-07 04:58:48 +00:00
559b8fbffc
Add method for checking if a path is a symbolic link.
...
llvm-svn: 118367
2010-11-07 04:36:50 +00:00
5665a93bc5
Relax dwarf line fragments. This fixes a crash in the included testcase.
...
llvm-svn: 118365
2010-11-07 02:07:12 +00:00
0530c024b6
implement aliases for div/idiv that have an explicit A register operand,
...
implementing rdar://8431864
llvm-svn: 118364
2010-11-06 22:41:18 +00:00
e18980aeaa
Add support for parsing register lists. We can't use a bitfield to keep track of
...
the registers, because the register numbers may be much greater than the number
of bits available in the machine's register.
I extracted the register list verification code out of the actual parsing of the
registers. This made checking for errors much easier. It also limits the number
of warnings that would be emitted for cascading infractions.
llvm-svn: 118363
2010-11-06 22:36:58 +00:00
9654e108d7
add aliases for movs between seg registers and mem. There are multiple
...
different forms of this instruction (movw/movl/movq) which we reported
as being ambiguous. Since they all do the same thing, gas just picks the
one with the shortest encoding. Follow its lead here.
This implements rdar://8208615
llvm-svn: 118362
2010-11-06 22:35:34 +00:00
7923358842
move the "sh[lr]d op,op" -> "shld $1, op,op" aliases to the .td file.
...
llvm-svn: 118361
2010-11-06 22:25:39 +00:00
b884a8ee44
Return the base register of a register list for the "getReg()" method. This is
...
to satisfy the ClassifyOperand method of the Asm matcher without having to add a
RegList type to every back-end.
llvm-svn: 118360
2010-11-06 22:19:43 +00:00
d6746d5b46
pass literals like $$1 through to the asm matcher. This isn't right yet, but doesn't hurt.
...
llvm-svn: 118359
2010-11-06 22:06:03 +00:00
2abbeded98
work-in-progress
...
llvm-svn: 118358
2010-11-06 22:05:43 +00:00
ee7f1f9914
General cleanup:
...
- Make ARMOperand a class so that some things are internal to the class.
- Reformatting.
llvm-svn: 118357
2010-11-06 21:42:12 +00:00
ca7801e472
go to great lengths to work around a GAS bug my previous patch
...
exposed:
GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.
Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).
As such, switch the canonical form of this instruction to "pi" instead
of "ip". This makes the code generator and disassembler generate pi,
avoiding the gas bug.
llvm-svn: 118356
2010-11-06 21:37:06 +00:00
64f91b9825
rework the rotate-by-1 instructions to be defined like the
...
shift-by-1 instructions, where the asmstring doesn't contain
the implicit 1. It turns out that a bunch of these rotate
instructions were completely broken because they used 1
instead of $1.
This fixes assembly mismatches on "rclb $1, %bl" and friends,
where we used to generate the 3 byte form, we now generate the
proper 2-byte form.
llvm-svn: 118355
2010-11-06 21:23:40 +00:00
05031e7f1a
change the fp comparison instructions to not have %st0 explicitly
...
listed in its asm string, for consistency with the other similar
instructions.
llvm-svn: 118354
2010-11-06 20:55:09 +00:00
290199f8ee
move the plethora of fp stack aliases to the .td file.
...
llvm-svn: 118353
2010-11-06 20:47:38 +00:00
4869d346e3
add (and document) the ability for alias results to have
...
fixed physical registers. Start moving fp comparison
aliases to the .td file (which default to using %st1 if
nothing is specified).
llvm-svn: 118352
2010-11-06 19:57:21 +00:00
7cef447c14
Add a RegList (register list) object to ARMOperand. It will be used soon to hold
...
(surprise!) a list of registers. Register lists are consecutive, so we only need
to record the start register plus the number of registers.
llvm-svn: 118351
2010-11-06 19:56:04 +00:00
b6f8e8248d
generalize alias support to allow the result of an alias to
...
add fixed immediate values. Move the aad and aam aliases to
use this, and document it.
llvm-svn: 118350
2010-11-06 19:25:43 +00:00
161bf7de25
move fnstsw aliases to .td file, fix typo
...
llvm-svn: 118349
2010-11-06 18:58:32 +00:00
ec66010e80
move in/out aliases to the .td files.
...
llvm-svn: 118348
2010-11-06 18:52:40 +00:00
6881e175c3
move sldt, imul, and movabsq aliases from c++ to .td file.
...
llvm-svn: 118347
2010-11-06 18:44:26 +00:00
fab9413b01
correct suffix matching to search for s/l/t suffixes on
...
floating point stack instructions instead of looking for b/w/l/q.
This fixes issues where we'd accidentally match fistp to fistpl,
when it is in fact an ambiguous instruction.
This changes the behavior of llvm-mc to reject fstp, which was the
correct fix for rdar://8456389:
t.s:1:1: error: ambiguous instructions require an explicit suffix (could be 'fstps', 'fstpl', or 'fstpt')
fstp (%rax)
it also causes us to correctly reject fistp and fist, which addresses
PR8528:
t.s:2:1: error: ambiguous instructions require an explicit suffix (could be 'fistps', or 'fistpl')
fistp (%rax)
^
t.s:3:1: error: ambiguous instructions require an explicit suffix (could be 'fists', or 'fistl')
fist (%rax)
^
Thanks to Ismail Donmez for tracking down the issue here!
llvm-svn: 118346
2010-11-06 18:28:02 +00:00
63abc84630
Prune includes.
...
llvm-svn: 118342
2010-11-06 11:45:59 +00:00
8300d834c9
Fix grammar.
...
llvm-svn: 118341
2010-11-06 10:51:53 +00:00
4f4bce0682
Fix grammar.
...
llvm-svn: 118340
2010-11-06 10:48:18 +00:00
518e43c453
MatchRegisterName() returns 0 if it can't match the register.
...
llvm-svn: 118339
2010-11-06 10:45:34 +00:00
6d2eb737af
Use TryParseRegister() instead of MatchRegisterName(). The former returns -1
...
while the latter doesn't.
llvm-svn: 118338
2010-11-06 10:40:24 +00:00
8628e2a19c
Add a note.
...
llvm-svn: 118337
2010-11-06 10:37:16 +00:00
8b0a71fc31
document instalias.
...
llvm-svn: 118335
2010-11-06 08:30:26 +00:00
db6f90c61c
fix a bug where we had an implicit assumption that the
...
result instruction operand numbering matched the result pattern.
Fixing this allows us to move the xchg/test aliases to the .td file.
llvm-svn: 118334
2010-11-06 08:20:59 +00:00
89965d7091
Make sure we have movw on the target before using it.
...
Fixes 8559.
llvm-svn: 118333
2010-11-06 07:53:11 +00:00
aa7847df06
move the lcall/ljmp aliases to the .td file.
...
llvm-svn: 118332
2010-11-06 07:48:45 +00:00
9535f90abe
move the "movsd -> movsl" alias to the .td files,
...
tidy up the movsx and movzx aliases.
llvm-svn: 118331
2010-11-06 07:34:58 +00:00
8188fb264f
fix some bugs in the alias support, unblocking changing of "clr" aliases
...
from c++ hacks to proper .td InstAlias definitions. Change them!
llvm-svn: 118330
2010-11-06 07:31:43 +00:00
fecdad6237
Reimplement BuildResultOperands to be in terms of the result instruction's
...
operand list instead of the operand list redundantly declared on the alias
or instruction.
With this change, we finally remove the ins/outs list on the alias. Before:
def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX16rr8W GR16:$dst, GR8:$src)>;
After:
def : InstAlias<"movsx $src, $dst",
(MOVSX16rr8W GR16:$dst, GR8:$src)>;
This also makes the alias mechanism more general and powerful, which will
be exploited in subsequent patches.
llvm-svn: 118329
2010-11-06 07:14:44 +00:00
b625dd2d87
implement more checking to reject things like:
...
(someinst GR16:$foo, GR32:$foo)
Reimplement BuildAliasOperandReference to be correctly
based on the names of operands in the result pattern,
instead of on the instruction operand definitions.
llvm-svn: 118328
2010-11-06 07:06:09 +00:00
7603052d49
decode and validate instruction alias result definitions.
...
llvm-svn: 118327
2010-11-06 06:54:38 +00:00
23064cb4e5
simplify
...
llvm-svn: 118326
2010-11-06 06:45:08 +00:00
9f093815fa
fix another fixme, replacing a string with a semantic pointer.
...
llvm-svn: 118325
2010-11-06 06:43:11 +00:00
8ffd129950
disolve a hack, having CodeGenInstAlias decode the alias in the .td
...
file instead of the asmmatcher.
llvm-svn: 118324
2010-11-06 06:39:47 +00:00
2db0ea03ba
Hook up the '.code {16|32}' directive to the streamer.
...
llvm-svn: 118310
2010-11-05 22:40:53 +00:00
cbdf7efe1c
Add '.code 32' assembler directive to MC streamers.
...
llvm-svn: 118309
2010-11-05 22:40:09 +00:00
c6db8ce5da
Hook up the '.thumb_func' directive to the streamer.
...
llvm-svn: 118307
2010-11-05 22:33:53 +00:00
0fe92e3fea
Fix past-o.
...
llvm-svn: 118304
2010-11-05 22:11:33 +00:00
5a2c68d308
MC'ize the '.code 16' and '.thumb_func' ARM directives.
...
llvm-svn: 118301
2010-11-05 22:08:08 +00:00
a4076924d1
Disallow the certain NEON modified-immediate forms when generating vorr or vbic.
...
llvm-svn: 118300
2010-11-05 21:57:54 +00:00
45846666f1
Trailing whitespace.
...
llvm-svn: 118296
2010-11-05 20:41:12 +00:00
ff9e507d8e
MC'ize simple ARMConstantValue entry emission (with a FIXME).
...
llvm-svn: 118295
2010-11-05 20:34:24 +00:00
80bb80f5fc
Put class into an anonymous namespace.
...
llvm-svn: 118294
2010-11-05 19:56:38 +00:00
30c4892ea5
Add codegen and encoding support for the immediate form of vbic.
...
llvm-svn: 118291
2010-11-05 19:27:46 +00:00
2bab7570f5
Enable MachO writing for ARM/Darwin. Lots of stuff still doesn't work
...
(relocations, e.g.), but this will allow simple things to flow through.
llvm-svn: 118289
2010-11-05 18:50:35 +00:00
46c2acbcb4
Allow targets to specify the MachO CPUType/CPUSubtype information.
...
llvm-svn: 118288
2010-11-05 18:48:58 +00:00
c75bb744e1
syntaxunified directive is a no-op for MachO writing.
...
llvm-svn: 118287
2010-11-05 18:47:32 +00:00
b51745765a
Add v5 and v7 ARM CPU subtype values.
...
llvm-svn: 118281
2010-11-05 17:48:05 +00:00
1df82e67d1
Add FIXME.
...
llvm-svn: 118280
2010-11-05 17:37:13 +00:00
6c25ca4f2b
When passing a parameter using the 'byval' mechanism, inline code needs to be used
...
to perform the copy, which may be of lots of memory [*]. It would be good if the
fall-back code generated something reasonable, i.e. did the copy in a loop, rather
than vast numbers of loads and stores. Add a note about this. Currently target
specific code seems to always kick in so this is more of a theoretical issue rather
than a practical one now that X86 has been fixed.
[*] It's amazing how often people pass mega-byte long arrays by copy...
llvm-svn: 118275
2010-11-05 15:20:29 +00:00
f4d90ba9f5
CrashRecoveryContext: Add RunSafelyOnThread helper function.
...
llvm-svn: 118272
2010-11-05 07:19:09 +00:00
98512315f7
When passing a huge parameter using the byval mechanism, a long
...
sequence of loads and stores was being generated to perform the
copy on the x86 targets if the parameter was less than 4 byte
aligned, causing llc to use up vast amounts of memory and time.
Use a "rep movs" form instead. PR7170.
llvm-svn: 118260
2010-11-04 21:16:46 +00:00
ed8b7bf9ed
Use arrays instead of constant-sized SmallVectors.
...
llvm-svn: 118257
2010-11-04 18:45:27 +00:00
38d0756b88
Add 118023 back, but with proper spelling for .uleb128/.sleb128.
...
llvm-svn: 118254
2010-11-04 18:17:08 +00:00
bbc0ac2236
Revert previous patch. Some targets don't support uleb and say
...
they do :-(
llvm-svn: 118250
2010-11-04 17:04:24 +00:00
cfd6243940
MCize.
...
llvm-svn: 118249
2010-11-04 16:32:18 +00:00
57c5a20364
Introduce DIBuilder. It is intended to be a front-end friendly interface to emit debuggging information entries in LLVM IR.
...
To create debugging information for a pointer, using DIBUilder front-end just needs
DBuilder.CreatePointerType(Ty, Size);
instead of
DebugFactory.CreateDerivedType(llvm::dwarf::DW_TAG_pointer_type,
TheCU, "", getOrCreateMainFile(),
0, Size, 0, 0, 0, OCTy);
llvm-svn: 118248
2010-11-04 15:01:38 +00:00
a0148df273
Add getFile() to get DIFile of a DIType.
...
llvm-svn: 118247
2010-11-04 14:56:34 +00:00
71049f78ed
In the calling convention logic, ValVT is always a legal type,
...
and as such can be represented by an MVT - the more complicated
EVT is not needed. Use MVT for ValVT everywhere.
llvm-svn: 118245
2010-11-04 10:49:57 +00:00
21acf9fb38
Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immediate rw. There is currently no intrinsic that matches to pli.
...
llvm-svn: 118237
2010-11-04 05:19:35 +00:00
4efe13d8d4
partition operand processing between aliases and instructions.
...
Right now the code is partitioned but the behavior is the same.
This should be improved in the near future. This removes some
uses of TheOperandList.
llvm-svn: 118232
2010-11-04 02:11:18 +00:00
ccde463250
pull name slicing out of BuildInstructionOperandReference so
...
it doesn't do any lexical stuff anymore.
llvm-svn: 118230
2010-11-04 01:58:23 +00:00
897a140e2a
cleanups.
...
llvm-svn: 118228
2010-11-04 01:55:23 +00:00
7108dad130
replace SrcOpNum with SrcOpName, eliminating a numering dependency
...
on the incoming operand list. This also makes the code simpler.
llvm-svn: 118225
2010-11-04 01:42:59 +00:00
cdd4c5443e
System: Add llvm_execute_on_thread, which does what it says.
...
- Primarily useful for running some code with a specified stack size, when
pthreads are available.
llvm-svn: 118222
2010-11-04 01:26:25 +00:00
0fb841fd19
Add ARM fixup info for load/store label references. Probably will need a bit of
...
tweaking when we start using it for object file emission or JIT, but it's a
start.
llvm-svn: 118221
2010-11-04 01:12:30 +00:00
c002463ac4
Add encoding for VSTR.
...
llvm-svn: 118220
2010-11-04 00:59:42 +00:00
4779e3e94a
strength reduce some code, resolving a fixme.
...
llvm-svn: 118219
2010-11-04 00:57:06 +00:00
743081d097
take a big step to making aliases more general and less of a hack:
...
now matchables contain an explicit list of how to populate each
operand in the result instruction instead of having them somehow
magically be correlated to the input inst.
llvm-svn: 118217
2010-11-04 00:43:46 +00:00
a2e098df12
Disable fancy splitting during spilling unless -extra-spiller-splits is given.
...
This way, InlineSpiller does the same amount of splitting as the standard
spiller. Splitting should really be guided by the register allocator, and
doesn't belong in the spiller at all.
llvm-svn: 118216
2010-11-04 00:32:32 +00:00
2eed7a1310
Teach ARM Target to use the tblgen support for generating an MC'ized
...
CodeEmitter.
llvm-svn: 118209
2010-11-03 23:52:49 +00:00
cd536df63c
Add rule to build MC'ized CodeEmitter.
...
llvm-svn: 118207
2010-11-03 23:46:01 +00:00
e4e6bf49f3
Support generating an MC'ized CodeEmitter directly. Maintain a reference to the
...
Fixups list for the instruction so the operand encoders can add to it as
needed.
llvm-svn: 118206
2010-11-03 23:38:14 +00:00
bc9b31c493
Covert VORRIMM to be produced via early target-specific DAG combining, rather than legalization.
...
This is both the conceptually correct place for it, as well as allowing it to be more aggressive.
llvm-svn: 118204
2010-11-03 23:15:26 +00:00
0747307049
Add support for code generation of the one register with immediate form of vorr.
...
We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.
llvm-svn: 118201
2010-11-03 22:44:51 +00:00
49b0c45ecf
trailing whitespace
...
llvm-svn: 118199
2010-11-03 22:03:20 +00:00
c6418b105a
Just return undef for invalid masks or elts, and since we're doing that,
...
just do it earlier too.
llvm-svn: 118195
2010-11-03 20:44:42 +00:00
c913201259
Let RegAllocBasic require MachineDominators - they are already available and
...
splitting needs them.
llvm-svn: 118194
2010-11-03 20:39:26 +00:00
cbbd819248
Tag debug output as regalloc
...
llvm-svn: 118193
2010-11-03 20:39:23 +00:00
e4dd7378d0
Optimize generated code for integer materialization a bit.
...
llvm-svn: 118192
2010-11-03 20:21:17 +00:00
896cf04885
rename Operand -> AsmOperand for clarity.
...
llvm-svn: 118190
2010-11-03 19:47:34 +00:00
3ad8df65c5
Fix test.
...
llvm-svn: 118187
2010-11-03 18:21:33 +00:00
bb81f80af6
Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead,
...
all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.
llvm-svn: 118183
2010-11-03 18:16:27 +00:00
c7d82d58b5
This test assumes SSE is present; that is not the default
...
on non-X86 hosts. Hopefully fixes ppc-host buildbot.
llvm-svn: 118182
2010-11-03 18:08:41 +00:00
7d0ac84abd
Add codegen patterns for VST1-lane instructions. Radar 8599955.
...
llvm-svn: 118176
2010-11-03 16:24:53 +00:00
ceb49296ef
Check for extractelement with a variable operand for the element number.
...
For NEON we had been assuming this was always an immediate constant.
llvm-svn: 118175
2010-11-03 16:24:50 +00:00
b8211b80bc
Rename FindExecutable to PrependMainExecutablePath.
...
Makes it more clear that it is just a path manipulation function.
llvm-svn: 118174
2010-11-03 16:14:16 +00:00
189c6c687c
80-col violations, trailing whitespace.
...
llvm-svn: 118173
2010-11-03 16:14:07 +00:00
9d1fe4c40d
Rename PointsToLocalMemory to PointsToLocalOrConstantMemory to make
...
the code more self-documenting.
llvm-svn: 118171
2010-11-03 14:45:05 +00:00
1462777017
Simplify uses of MVT and EVT. An MVT can be compared directly
...
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.
llvm-svn: 118169
2010-11-03 12:17:33 +00:00
900edd4b54
Fix a comment typo.
...
llvm-svn: 118168
2010-11-03 11:55:03 +00:00
f5dda01f33
Inside the calling convention logic LocVT is always a simple
...
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
llvm-svn: 118167
2010-11-03 11:35:31 +00:00
fcc9e6848a
If we have an undef mask our Elt will be -1 for our access, handle
...
this by using an undef as a pointer.
Fixes rdar://8625016
llvm-svn: 118164
2010-11-03 09:36:40 +00:00
8eb254aed6
Fix typo, pointed out by Trevor Harmon.
...
llvm-svn: 118163
2010-11-03 08:16:50 +00:00
8740ee3637
Fix preload instruction isel. Only v7 supports pli, and only v7 with mp extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing.
...
llvm-svn: 118160
2010-11-03 06:34:55 +00:00
6f36042557
Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536.
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llvm-svn: 118152
2010-11-03 05:14:24 +00:00
6552a109bb
Put the PC encoding in the correct bit position.
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llvm-svn: 118151
2010-11-03 04:57:44 +00:00
c63d846ad6
Invert these branches by default, it makes assembly comparisons a little
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easier to read.
llvm-svn: 118148
2010-11-03 04:29:11 +00:00
e84eb99cbb
The MC code couldn't handle ARM LDR instructions with negative offsets:
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vldr.64 d1, [r0, #-32]
The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.
llvm-svn: 118144
2010-11-03 01:49:29 +00:00
68fb004616
Fix DAGCombiner to avoid going into an infinite loop when it
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encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff).
This fixes rdar://8606584.
llvm-svn: 118143
2010-11-03 01:47:46 +00:00
fd96701456
Remove unused function.
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llvm-svn: 118141
2010-11-03 01:35:15 +00:00
e7f7de95e0
Remove the no longer used 'Modifier' optional operand to the ARM
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printOperand() asm printer helper functions. rdar://8425198
llvm-svn: 118140
2010-11-03 01:11:15 +00:00
50ba3c09bf
Remove unused function.
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llvm-svn: 118139
2010-11-03 01:07:48 +00:00
c6af2b4066
Break ARM addrmode4 (load/store multiple base address) into its constituent
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parts. Represent the operation mode as an optional operand instead.
rdar://8614429
llvm-svn: 118137
2010-11-03 01:01:43 +00:00
debf9c502a
Two sets of changes. Sorry they are intermingled.
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1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
"optimize for latency". Call instructions don't have the right latency and
this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
not # of micro-ops since multi-latency instructions is completely executed
even when the predicate is false. Also, some instruction will be "slower"
when they are predicated due to the register def becoming implicit input.
rdar://8598427
llvm-svn: 118135
2010-11-03 00:45:17 +00:00
634ab6c2b7
Modify scheduling itineraries to correct instruction latencies (not operand
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latencies) of loads.
llvm-svn: 118134
2010-11-03 00:40:22 +00:00
edc76749b3
Factor code out of APInt to form a isUIntN helper function.
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llvm-svn: 118133
2010-11-03 00:38:40 +00:00
3e6c919469
fix typo, patch by Trevor Harmon (PR8537)
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llvm-svn: 118131
2010-11-03 00:30:29 +00:00
0baea2aa1b
Print an error as one big string instead of breaking it up.
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llvm-svn: 118130
2010-11-03 00:24:33 +00:00
a3bb142db6
Delete unused variables.
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llvm-svn: 118128
2010-11-03 00:09:12 +00:00
ecc4d73498
Remove several unhelpful checks for isValid from sys::Path.
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llvm-svn: 118127
2010-11-03 00:01:23 +00:00
1e43892e4b
Make sure we're only storing a single bit here.
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llvm-svn: 118126
2010-11-02 23:59:09 +00:00
9c9bfb6870
per a suggestion by Frits van Bommel, mark all MBlaze Pseudo
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instructions as isCodeGenOnly in the parent class instead of
sprinkling it throughout the .td files.
llvm-svn: 118125
2010-11-02 23:57:05 +00:00
11d21e8e78
chase owen.
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llvm-svn: 118124
2010-11-02 23:55:24 +00:00
d0502c1777
tweak this to pass.
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llvm-svn: 118122
2010-11-02 23:50:17 +00:00
0ebd1fd594
Revert r118097 to fix buildbots.
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llvm-svn: 118121
2010-11-02 23:47:29 +00:00
daf7a2a7de
temporarily xfail this.
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llvm-svn: 118120
2010-11-02 23:44:50 +00:00
cc5dce89d4
Completely reject instructions that have an operand in their
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ins/outs list that isn't specified by their asmstring. Previously
the asmmatcher would just force a 0 register into it, which clearly
isn't right. Mark a bunch of ARM instructions that use this as
isCodeGenOnly. Some of them are clearly pseudo instructions (like
t2TBB) others use a weird hasExtraSrcRegAllocReq thing that will
either need to be removed or the asmmatcher will need to be taught
about it (someday).
llvm-svn: 118119
2010-11-02 23:40:41 +00:00
1d73c0e462
Tweak the opt -O2 / opt -O3 inliner thresholds to be the same as llvm-gcc and
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clang are using.
llvm-svn: 118118
2010-11-02 23:40:28 +00:00
31a7eb40c1
Let the -inline-threshold command line argument take precedence over the
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threshold given to createFunctionInliningPass().
Both opt -O3 and clang would silently ignore the -inline-threshold option.
llvm-svn: 118117
2010-11-02 23:40:26 +00:00
c0a8bee4b0
Don't try to enforce MAXPATHLEN in sys::Path for Unix. OS's can check
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limits on their own.
llvm-svn: 118113
2010-11-02 23:19:55 +00:00
4d23eb2f0e
make MatchableInfo::Validate reject instructions (like LDR_PRE in ARM)
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that have complicated tying going on.
llvm-svn: 118112
2010-11-02 23:18:43 +00:00
a8b6315cd7
Simplify.
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llvm-svn: 118110
2010-11-02 23:16:26 +00:00
beffa5bef1
Inline asm mult-alt constraint tests.
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llvm-svn: 118107
2010-11-02 23:01:44 +00:00
6e05d6c218
Fix a copy+pasto.
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llvm-svn: 118106
2010-11-02 22:56:51 +00:00
a47bfef1bf
Avoid manipulating paths in fixed-sized arrays.
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llvm-svn: 118105
2010-11-02 22:55:34 +00:00
e032dbfd9e
rewrite EmitConvertToMCInst to iterate over the MCInst operands,
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filling them in one at a time. Previously this iterated over the
asmoperands, which left the problem of "holes". The new approach
simplifies things.
llvm-svn: 118104
2010-11-02 22:55:03 +00:00
f9eebb58b9
Obsessive formatting changes. No functionality impact.
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llvm-svn: 118103
2010-11-02 22:53:11 +00:00
32d51fa0b5
Simplify this code.
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llvm-svn: 118102
2010-11-02 22:50:10 +00:00
23436b6530
Omit unused parameter name.
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llvm-svn: 118099
2010-11-02 22:46:04 +00:00
91da9abbee
Simplify the EncodeInstruction method now that a lot of the special case stuff
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is handled with the MC encoder.
llvm-svn: 118098
2010-11-02 22:44:12 +00:00
7c30390277
Since these fields are not exactly equivalent to the encoded field, rename them to something with semantic meaning.
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llvm-svn: 118097
2010-11-02 22:41:42 +00:00
f6e13ceb2b
Use '\0' instead of 0 for nul character constants.
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llvm-svn: 118096
2010-11-02 22:41:19 +00:00
603bd8f54c
Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work
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with immediates up to 16-bits in size. The same logic is applied to other LDR
encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in
VLDR's case). Removing the "12" allows it to be more generic.
llvm-svn: 118094
2010-11-02 22:31:46 +00:00
a4b63e19d2
Rename encoder methods to match naming convention.
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llvm-svn: 118093
2010-11-02 22:28:01 +00:00
15977afb02
mark a few codegenonly instructions.
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llvm-svn: 118092
2010-11-02 22:26:33 +00:00
7282901079
appendSuffix: don't append a dot when the suffix is empty.
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Additionally, move the implementation of appendSuffix to Path.cpp: it is
platform-independent.
llvm-svn: 118089
2010-11-02 22:18:37 +00:00
4fb337560c
Revert r118057, this is better fixed in appendSuffix itself.
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llvm-svn: 118088
2010-11-02 22:18:28 +00:00
dec87e10fd
Provide correct encodings for the remaining vst variants that we currently generate.
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llvm-svn: 118087
2010-11-02 22:18:18 +00:00
44e24e5403
Eliminate some temporary std::strings.
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llvm-svn: 118086
2010-11-02 22:07:47 +00:00
adf88d4c5f
Tentative encodings for the "single element from one lane" variant of vst1.
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llvm-svn: 118084
2010-11-02 21:54:45 +00:00
5cf8a4a909
merge two large parallel loops in EmitConvertToMCInst, no change
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in the generated .inc files.
llvm-svn: 118083
2010-11-02 21:49:44 +00:00
b95618cfe0
Add correct encodings for basic variants for vst3 and vst4.
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llvm-svn: 118082
2010-11-02 21:47:03 +00:00
f8343f87e7
Do relaxations with FT_Org fragments. Fixes the FIXME:
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// FIXME: We should compute this sooner, we don't want to recurse here, and
// we would like to be more functional.
In MCAssembler::ComputeFragmentSize.
llvm-svn: 118080
2010-11-02 21:38:23 +00:00
64cb0eed22
Removed obsolete section about VC++ project files.
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llvm-svn: 118072
2010-11-02 21:34:19 +00:00
d80b29d6f7
Add NEON VST1-lane instructions. Partial fix for Radar 8599955.
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llvm-svn: 118069
2010-11-02 21:18:25 +00:00
fa08e1e277
Add correct encodings for the basic variants for vst2.
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llvm-svn: 118068
2010-11-02 21:16:58 +00:00
87c62e54e6
Add correct encodings for the basic form of vst1.
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llvm-svn: 118067
2010-11-02 21:06:06 +00:00
Jakob Stoklund Olesen