Evan Cheng
7b3f7feaea
Avoid doing something dumb like rewriting using a 64-bit iv in 32-bit mode.
...
llvm-svn: 43446
2007-10-29 07:57:50 +00:00
Chris Lattner
909a54ccd4
add a note.
...
llvm-svn: 43444
2007-10-29 06:19:48 +00:00
Chris Lattner
5e99fd8c0d
Add support for the x86-64 'q' regigster modifier, and add support for the
...
b/h/w/k/q inline asm memory modifiers, which are just ignored. This fixes
PR1748 and CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
llvm-svn: 43430
2007-10-29 03:09:07 +00:00
Evan Cheng
c826ac533b
New entry.
...
llvm-svn: 43420
2007-10-28 04:01:09 +00:00
Anton Korobeynikov
d07d6a411c
Fix off-by-one stack offset computations (dwarf information) for callee-saved
...
registers in case, when FP pointer was eliminated. This should fixes misc. random
EH-related crahses, when stuff is compiled with -fomit-frame-pointer.
Thanks Duncan for nailing this bug!
llvm-svn: 43381
2007-10-26 09:13:24 +00:00
Evan Cheng
7f3d02471d
Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free.
...
e.g.
Turns this loop:
LBB1_1: # entry.bb_crit_edge
xorl %ecx, %ecx
xorw %dx, %dx
movw %dx, %si
LBB1_2: # bb
movl L_X$non_lazy_ptr, %edi
movw %si, (%edi)
movl L_Y$non_lazy_ptr, %edi
movw %dx, (%edi)
addw $4, %dx
incw %si
incl %ecx
cmpl %eax, %ecx
jne LBB1_2 # bb
into
LBB1_1: # entry.bb_crit_edge
xorl %ecx, %ecx
xorw %dx, %dx
LBB1_2: # bb
movl L_X$non_lazy_ptr, %esi
movw %cx, (%esi)
movl L_Y$non_lazy_ptr, %esi
movw %dx, (%esi)
addw $4, %dx
incl %ecx
cmpl %eax, %ecx
jne LBB1_2 # bb
llvm-svn: 43375
2007-10-26 01:56:11 +00:00
Dan Gohman
bf474959a3
Fix the folding of multiplication into addresses on x86, which was broken
...
by the recent {U,S}MUL_LOHI changes.
llvm-svn: 43230
2007-10-22 20:22:24 +00:00
Evan Cheng
c92446af1f
Fix an unfolding bug.
...
llvm-svn: 43212
2007-10-22 03:03:20 +00:00
Dale Johannesen
8ee70112ea
Allow for copysign having f80 second argument.
...
Fixes 5550319.
llvm-svn: 43205
2007-10-21 01:07:44 +00:00
Evan Cheng
45e096c77e
Resolve unfold tables ambiguity.
...
llvm-svn: 43194
2007-10-19 23:50:58 +00:00
Evan Cheng
35ff79370b
Local spiller optimization:
...
Turn a store folding instruction into a load folding instruction. e.g.
xorl %edi, %eax
movl %eax, -32(%ebp)
movl -36(%ebp), %eax
orl %eax, -32(%ebp)
=>
xorl %edi, %eax
orl -36(%ebp), %eax
mov %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.
llvm-svn: 43192
2007-10-19 21:23:22 +00:00
Rafael Espindola
846c19dd70
Add support for byval function whose argument is not 32 bit aligned.
...
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset. I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)
llvm-svn: 43172
2007-10-19 10:41:11 +00:00
Evan Cheng
463e2ab0ac
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
...
- Fix some copy+paste bugs.
llvm-svn: 43153
2007-10-18 22:40:57 +00:00
Evan Cheng
aa9a225699
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
...
llvm-svn: 43150
2007-10-18 21:29:24 +00:00
Christopher Lamb
7f68cf0d57
Fix a typo
...
llvm-svn: 43144
2007-10-18 19:28:55 +00:00
Chris Lattner
12d5da49d3
Change fp to sint legalization on x86-32 to do 2 x i32
...
loads instead of 1 x i64 loads. This doesn't change any functionality yet.
llvm-svn: 43068
2007-10-17 06:17:29 +00:00
Chris Lattner
693cbeadff
fix some funny indentation, add comments.
...
llvm-svn: 43066
2007-10-17 06:02:13 +00:00
Dale Johannesen
e5530a35d4
Check for invalid cc's in f80 select.
...
llvm-svn: 43033
2007-10-16 18:09:08 +00:00
Arnold Schwaighofer
b3d58b98d0
Correction to tail call optimization code. The new return address
...
was stored to the acutal stack slot before the parameters were
lowered to their stack slot. This could cause arguments to be
overwritten by the return address if the called function had less
parameters than the caller function. The update should remove the
last failing test case of llc-beta: SPASS.
llvm-svn: 43027
2007-10-16 09:05:00 +00:00
Evan Cheng
7bcfd8f880
LowerFP_TO_SINT must not create a stack object if it's not needed.
...
llvm-svn: 43004
2007-10-15 20:11:21 +00:00
Evan Cheng
4099f4f91a
Unbreak x86-64.
...
llvm-svn: 42962
2007-10-14 10:09:39 +00:00
Evan Cheng
cdf3609130
Revert 42908 for now.
...
llvm-svn: 42960
2007-10-14 05:57:21 +00:00
Duncan Sands
29af26f147
Clarify that fastcc has a problem with nested function
...
trampolines, rather than with nested functions themselves.
llvm-svn: 42955
2007-10-13 07:38:37 +00:00
Evan Cheng
7082dcf605
Change unfoldMemoryOperand(). User is now responsible for passing in the
...
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.
llvm-svn: 42946
2007-10-13 02:35:06 +00:00
Arnold Schwaighofer
e8d0bf2669
Correcting the corrections. Bad bad baaad emacs!
...
llvm-svn: 42935
2007-10-12 21:53:12 +00:00
Arnold Schwaighofer
1f0da1fefb
Corrected many typing errors. And removed 'nest' parameter handling
...
for fastcc from X86CallingConv.td. This means that nested functions
are not supported for calling convention 'fastcc'.
llvm-svn: 42934
2007-10-12 21:30:57 +00:00
Duncan Sands
a6286bd502
Due to the new tail call optimization, trampolines can no
...
longer be created for fastcc functions.
llvm-svn: 42925
2007-10-12 19:37:31 +00:00
Evan Cheng
409fa443fc
Update.
...
llvm-svn: 42922
2007-10-12 18:22:55 +00:00
Dan Gohman
dc35bd79ca
Change the names used for internal labels to use the current
...
function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
llvm-svn: 42908
2007-10-12 14:53:36 +00:00
Dan Gohman
8d978da3b0
Mark vector ctpop, cttz, and ctlz as Expand on x86.
...
llvm-svn: 42905
2007-10-12 14:09:42 +00:00
Evan Cheng
09c0fe0a7f
Fold load / store into MOV32to32_ and MOV16to16_.
...
llvm-svn: 42895
2007-10-12 08:38:01 +00:00
Evan Cheng
f8c23f074b
Flag MOV32to32_ with EXTRACT_SUBREG. They should not be scheduled apart.
...
llvm-svn: 42894
2007-10-12 07:55:53 +00:00
Dan Gohman
482732af9d
Set ISD::FPOW to Expand.
...
llvm-svn: 42881
2007-10-11 23:21:31 +00:00
Dale Johannesen
62f65edc32
Add missing argument to PALIGNR
...
llvm-svn: 42874
2007-10-11 20:58:37 +00:00
Arnold Schwaighofer
9ccea99165
Added tail call optimization to the x86 back end. It can be
...
enabled by passing -tailcallopt to llc. The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
elf/pic enabled + callee is in module + callee has
visibility protected or hidden
llvm-svn: 42870
2007-10-11 19:40:01 +00:00
Dan Gohman
e8c8ef5234
LowerIntegerDivOrRem no longer exists.
...
llvm-svn: 42787
2007-10-09 15:45:13 +00:00
Dan Gohman
51554bf30e
Fix grammar in a comment.
...
llvm-svn: 42786
2007-10-09 15:44:37 +00:00
Dan Gohman
6d28778bfd
This is done.
...
llvm-svn: 42785
2007-10-09 15:42:21 +00:00
Evan Cheng
82bc90ac60
Under 64-bit mode use LEA64_32r instead of LEA64r to save a byte.
...
llvm-svn: 42783
2007-10-09 07:14:53 +00:00
Evan Cheng
f5ec10b64c
Bug fix. X86 was emitting redundant setcc and test instructions before a conditional move.
...
llvm-svn: 42774
2007-10-08 22:16:29 +00:00
Dan Gohman
a160361c85
Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
...
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.
llvm-svn: 42762
2007-10-08 18:33:35 +00:00
Evan Cheng
18109c88c3
Allow x86 compare to be commutable by default.
...
llvm-svn: 42761
2007-10-08 18:27:46 +00:00
Chris Lattner
b20757d578
disable this entirely: it is causing use of invalidated iterators and infinite looping.
...
llvm-svn: 42739
2007-10-07 22:00:31 +00:00
Chris Lattner
8dd66ab3b2
Fix many regressions on x86 by avoiding dereferencing the end iterator.
...
llvm-svn: 42738
2007-10-07 21:53:12 +00:00
Anton Korobeynikov
67ac2de8bf
Oops, I really wanted to commit this part also :)
...
llvm-svn: 42700
2007-10-06 16:39:43 +00:00
Anton Korobeynikov
c59496f737
Move merge code into new helper function.
...
llvm-svn: 42699
2007-10-06 16:17:49 +00:00
Evan Cheng
f4b5d491df
Added DAG xforms. e.g.
...
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr)
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.
llvm-svn: 42677
2007-10-06 02:46:29 +00:00
Evan Cheng
1151ffde70
Commute x86 cmove instructions by swapping the operands and change the condition
...
to its inverse.
Testing this as llcbeta
llvm-svn: 42661
2007-10-05 23:13:21 +00:00
Evan Cheng
42a13757de
This is done.
...
llvm-svn: 42656
2007-10-05 22:34:59 +00:00
Evan Cheng
484cab7a2f
Enable convertToThreeAddress for X86 by default.
...
llvm-svn: 42655
2007-10-05 22:31:10 +00:00