Commit Graph

411273 Commits

Author SHA1 Message Date
Denys Shabalin edcac733dc [mlir] Fix reference to out of date CMake function
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D117222
2022-01-13 15:26:36 +01:00
David Spickett cf7bfd6d05 [lldb][AArch64] Remove armv8.3-a flag from tagged memory read test
This was left over from when I had used some pointer authentication
instructions to sign the pointer. Then I realised that simply setting
the top byte is enough to prove the ABI plugin is being called.

Top byte ignore is a feature of the armv8-a architecure and doesn't
need any extra compiler flags.
2022-01-13 14:25:18 +00:00
Eugene Zhulenev 764e52f0d4 [DebugInfo][InstrRef] Short-circuit unnecessary preferred location map construction
Reviewed By: cota

Differential Revision: https://reviews.llvm.org/D117162
2022-01-13 06:24:52 -08:00
Sam McCall fc7a9f36a9 [clangd] Ignore cvr-qualifiers in selection.
The AST doesn't track their locations, and the default behavior of attributing
them to the lexically-enclosing node is sloppy and often inaccurate.

Also add a couple of passing test cases for declarators that weren't obvious.

Differential Revision: https://reviews.llvm.org/D117185
2022-01-13 15:08:50 +01:00
Jon Chesterfield 4395608939 [openmp] Mark used variables as retain as well
D97446 changed the behaviour of 'used'. Compensate.

Reviewed By: ronlieb

Differential Revision: https://reviews.llvm.org/D117211
2022-01-13 13:57:32 +00:00
Nikita Popov aba7c3c033 [ConstantFold] Check uniform value in ConstantFoldLoadFromConst()
This case is automatically handled if ConstantFoldLoadFromConstPtr()
is used. Make sure that ConstantFoldLoadFromConst() also handles it.
2022-01-13 14:40:19 +01:00
Petar Avramovic 235886e174 AMDGPU/GlobalISel: Fix custom legalizatation for fceil 2022-01-13 14:29:30 +01:00
Petar Avramovic 1919d2c931 AMDGPU/GlobalISel: Regenerate fceil test (NFC) 2022-01-13 14:29:29 +01:00
Sander de Smalen b92102a6d7 [AArch64] Add native CPU detection for Neoverse-V1.
Map Main ID part number 0xd40 to neoverse-v1, as described in the
Neoverse-V1 Technical Reference Manual:

https://developer.arm.com/documentation/101427/0101/Register-descriptions/AArch64-system-registers/MIDR-EL1--Main-ID-Register--EL1

Differential Revision: https://reviews.llvm.org/D117207
2022-01-13 12:58:54 +00:00
Sam McCall 2b2dbe6126 [clangd] Selection: Prune gtest TEST()s earlier
When searching for AST nodes that may overlap the selection, mayHit() was only
attempting to prune nodes whose begin/end are both in the main file.

While failing to prune never gives wrong results, it hurts performance.
In GTest unit-tests, `TEST()` macros at the top level declare classes.
These were never pruned and we traversed *every* such class for any selection.

We fix this by reasoning about what tokens such a node might claim.
They must lie within its ultimate macro expansion range, so if this doesn't
overlap with the selection, we can prune the node.

Differential Revision: https://reviews.llvm.org/D116978
2022-01-13 13:58:42 +01:00
Kirill Bobyrev a9bf32763d [clangd] Fix build after D115243
The api for loadIndex changed but was not updated everywhere due to
differences in the build configuration.
2022-01-13 13:44:19 +01:00
Simon Pilgrim 57a551a8df [X86][AVX] lowerShuffleAsLanePermuteAndShuffle - don't split element rotate patterns
Partial element rotate patterns (e.g. for element insertion on Issue #53124) were being split if every lane wasn't crossing, but really there's a good repeated mask hiding in there.
2022-01-13 11:59:08 +00:00
Evgeny Mandrikov 971bd6f834 Fix build failure with MSVC in C++20 mode
Without this patch when using CMAKE_CXX_STANDARD=20
and MSVC 19.30.30705.0 compilation fails with

clang\lib\Tooling\Syntax\Tree.cpp(347): error C2666: 'clang::syntax::Tree::ChildIteratorBase<clang::syntax::Tree::ChildIterator,clang::syntax::Node>::operator ==': 4 overloads have similar conversions
clang\lib\Tooling\Syntax\Tree.cpp(392): error C2666: 'clang::syntax::Tree::ChildIteratorBase<clang::syntax::Tree::ChildIterator,clang::syntax::Node>::operator ==': 4 overloads have similar conversions

Note that removed comment that
"iterator_facade_base requires == to be a member"
was made obsolete by change https://reviews.llvm.org/D78938

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D116904
2022-01-13 12:55:16 +01:00
David Green 61888d97f6 [AArch64] Basic demand elements for some intrinsics
A lot of neon intrinsics work lane-wise, meaning that non-demanded
elements in and not demanded out. This teaches that to
AArch64TTIImpl::simplifyDemandedVectorEltsIntrinsic for some simple
single-input truncate intrinsics, which can help remove unnecessary
instructions.

Differential Revision: https://reviews.llvm.org/D117097
2022-01-13 11:53:12 +00:00
Simon Pilgrim 4f19bb6f28 [X86][AVX] Add v8f32/v8i32 01289abc test case
Blend Insertion + Element Rotation pattern similar to Issue #53124
2022-01-13 11:37:49 +00:00
Javier Setoain 7c56458616 [mlir] Fix scalable type translation in splat element attr
LLVM Dialect Constant Op translations assume that if the attribute is a
vector, it's a fixed length one, generating an invalid translation for
constant scalable vector initializations.

Differential Revision: https://reviews.llvm.org/D117125
2022-01-13 11:14:41 +00:00
Alex Bradbury 36a5491832 [llvm-objdump][test] Add RISC-V objdump test case
This test case captures the current state of support for printing branch
targets.

Differential Revision: https://reviews.llvm.org/D116676
2022-01-13 11:13:51 +00:00
Florian Hahn 3f2fb767e3
[VPlan] Make IV operand explicit for VPWidenCanonicalIVRecipe (NFC).
This makes the def-use relationship between VPCanonicalIVPHIRecipe and
VPWidenCanonicalIVRecipe explicit. Needed for D117140.
2022-01-13 11:13:05 +00:00
Simon Pilgrim a5507d2e25 Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFC. 2022-01-13 11:10:50 +00:00
Simon Pilgrim 4f414af6a7 Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFC. 2022-01-13 11:10:50 +00:00
Simon Pilgrim 37ebec68a8 [MIPS] Mips16DAGToDAGISel::selectAddr - Use cast<> instead of dyn_cast<> to avoid dereference of nullptr
The pointer is always dereferenced immediately below, so assert the cast is correct instead of returning nullptr
2022-01-13 11:10:49 +00:00
Hans Wennborg 2bc57d85eb Don't override __attribute__((no_stack_protector)) by inlining (PR52886)
Since 26c6a3e736, LLVM's inliner will "upgrade" the caller's stack protector
attribute based on the callee. This lead to surprising results with Clang's
no_stack_protector attribute added in 4fbf84c173 (D46300). Consider the
following code compiled with clang -fstack-protector-strong -Os
(https://godbolt.org/z/7s3rW7a1q).

  extern void h(int* p);

  inline __attribute__((always_inline)) int g() {
    return 0;
  }

  int __attribute__((__no_stack_protector__)) f() {
    int a[1];
    h(a);
    return g();
  }

LLVM will inline g() into f(), and f() would get a stack protector, against the
users explicit wishes, potentially breaking the program e.g. if h() changes the
value of the stack cookie. That's a miscompile.

More recently, bc044a88ee (D91816) addressed this problem by preventing
inlining when the stack protector is disabled in the caller and enabled in the
callee or vice versa. However, the problem remained if the callee is marked
always_inline as in the example above. This affected users, see e.g.
http://crbug.com/1274129 and http://llvm.org/pr52886.

One way to fix this would be to prevent inlining also in the always_inline
case. Despite the name, always_inline does not guarantee inlining, so this
would be legal but potentially surprising to users.

However, I think the better fix is to not enable the stack protector in a
caller based on the callee. The motivation for the old behaviour is unclear, it
seems counter-intuitive, and causes real problems as we've seen.

This commit implements that fix, which means in the example above, g() gets
inlined into f() (also without always_inline), and f() is emitted without stack
protector. I think that matches most developers' expectations, and that's also
what GCC does.

Another effect of this change is that a no_stack_protector function can now be
inlined into a stack protected function, e.g. (https://godbolt.org/z/hafP6W856):

  extern void h(int* p);

  inline int __attribute__((__no_stack_protector__)) __attribute__((always_inline)) g() {
    return 0;
  }

  int f() {
    int a[1];
    h(a);
    return g();
  }

I think that's fine. Such code would be unusual since no_stack_protector is
normally applied to a program entry point which sets up the stack canary. And
even if such code exists, inlining doesn't change the semantics: there is still
no stack cookie setup/check around entry/exit of the g() code region, but there
may be in the surrounding context, as there was before inlining. This also
matches GCC.

See also the discussion at https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94722

Differential revision: https://reviews.llvm.org/D116589
2022-01-13 12:04:49 +01:00
Sebastian Neubauer f4139440f1 [Docs] Fix IR and TableGen grammar inconsistencies
IR:
- globals (and functions, ifuncs, aliases) can have a partition
- catchret has a `to` before the label
- the sint/int types do not exist
- signext comes after the type
- a variable was missing its type

TableGen:
- The second value after a `#` concatenation is optional
  See e.g. llvm/lib/Target/X86/X86InstrAVX512.td:L3351
- IncludeDirective and PreprocessorDirective were never referenced in
  the grammar
- Add some missing ;
- Parent classes of multiclasses can have generic arguments.
  Reuse the `ParentClassList` that is already used in other places.

MIR:
- liveins only allows physical registers, which start with a $

Differential Revision: https://reviews.llvm.org/D116674
2022-01-13 11:55:13 +01:00
Ivan Butygin b65f21a498 [mlir] Provide getMixedOffsets/sizes/strides as free functions
* This is useful when you need to build mixed array from external static/dynamic arrays (e.g. from adaptor during dialect conversion)
* Also, to reduce C++ code in td and generated files

Differential Revision: https://reviews.llvm.org/D117106
2022-01-13 13:46:31 +03:00
David Green dca3321c73 [AArch64] Add a demand bits intrinsic test for instcombine of AArch64 intrinsics. NFC 2022-01-13 10:46:00 +00:00
Ties Stuij 7c70f96a91 [ARM] fix bug causing shrinkwrapping not always being off using PAC
If you want to check for all uses of PAC, the SpillsLR argument to
shouldSignReturnAddress should be true instead of false, as that value will be
returned from the function if the other checks fall through.

Reviewed By: miyuki

Differential Revision: https://reviews.llvm.org/D116213
2022-01-13 10:37:00 +00:00
Hans Wennborg 2eb7d8d749 Simplify llvm/test/Transforms/Inline/inline_ssp.ll (NFC)
The nounwind and uwtable attributes were just cluttering up the test.
Using regexes to give symbolic names to the attribute lists make the
test more readable.

This is pre-committing parts of D116589.
2022-01-13 11:34:30 +01:00
Andrzej Warzynski ea5ce2fc55 [flang][nfc] Update README.md
With https://reviews.llvm.org/D116731 merged, installing Clang, MLIR or
LLVM is no longer required for standalone builds. For consistency sake,
remove "installation" from the build instrucitons.

Differential Revision: https://reviews.llvm.org/D117100
2022-01-13 10:28:41 +00:00
Michał Górny 1e74e5e9e3 [lldb] [llgs] Implement qXfer:siginfo:read
Implement the qXfer:siginfo:read that is used to read the siginfo_t
(extended signal information) for the current thread.  This is currently
implemented on FreeBSD and Linux.

Differential Revision: https://reviews.llvm.org/D117113
2022-01-13 11:24:36 +01:00
Nikita Popov 1cbb456123 [GlobalOpt] Fix global to select transform under opaque pointers
We need to check that the load/store type is also the same, as this
is no longer implicitly checked through the pointer type.
2022-01-13 11:13:06 +01:00
Paulo Matos 97ef15ad76 [WebAssembly] Fix reftype load/store match with idx from call
Implement support for matching an index from a WebAssembly CALL
instruction. Add test.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D115327
2022-01-13 11:04:22 +01:00
Jay Foad 821dd3b0e5 [FileCheck] Allow literal '['s before "[[var...]]"
Change FileCheck to accept patterns like "[[[var...]]" and treat the
excess open brackets at the start as literals.

This makes the patterns for matching assembler output with literal
brackets much cleaner. For example an AMDGPU pattern that used to be
written like:

  buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}

can now be:

  buffer_store_dwordx2 v[[[LO]]:[[HI]]]

(Even before this patch the final close bracket did not need to be
wrapped in {{}}, but people tended to do it anyway for symmetry.)

This does not introduce any ambiguity since "[[" was always followed by
an identifier or '@' or '#', so "[[[" was always an error.

I've included a few test updates in this patch just for illustration and
testing. There are a couple of hundred tests that could be updated as a
follow up, mostly in test/CodeGen/.

Differential Revision: https://reviews.llvm.org/D117117

Change-Id: Ia6bc6f65cb69734821c911f54a43fe1c673bcca7
2022-01-13 09:47:37 +00:00
David Sherwood 31009f0b5a [CodeGen][AArch64] Ensure isSExtCheaperThanZExt returns true for negative constants
When we know the value we're extending is a negative constant then it
makes sense to use SIGN_EXTEND because this may improve code quality in
some cases, particularly when doing a constant splat of an unpacked vector
type. For example, for SVE when splatting the value -1 into all elements
of a vector of type <vscale x 2 x i32> the element type will get promoted
from i32 -> i64. In this case we want the splat value to sign-extend from
(i32 -1) -> (i64 -1), whereas currently it zero-extends from
(i32 -1) -> (i64 0xFFFFFFFF). Sign-extending the constant means we can use
a single mov immediate instruction.

New tests added here:

  CodeGen/AArch64/sve-vector-splat.ll

I believe we see some code quality improvements in these existing
tests too:

  CodeGen/AArch64/dag-numsignbits.ll
  CodeGen/AArch64/reduce-and.ll
  CodeGen/AArch64/unfold-masked-merge-vector-variablemask.ll

The apparent regressions in CodeGen/AArch64/fast-isel-cmp-vec.ll only
occur because the test disables codegen prepare and branch folding.

Differential Revision: https://reviews.llvm.org/D114357
2022-01-13 09:43:07 +00:00
Florian Hahn 7ce48be0fd
[LV] Inline CreateSplatIV call for scalar VFs (NFC).
This is a NFC change split off from D116123, as suggested there.
D116123 will remove the last user of CreateSplatIV.
2022-01-13 09:34:31 +00:00
Kévin Petit ec0a880d54 libclc: Add clspv64 target
Add a variant of the clspv target that is built using spir64.
This is a pre-requisite to supporting spir64 in clspv which is
required to take advantage of SPV_KHR_physical_storage_buffer which
in turn enables more OpenCL C programs to be compiled with clspv.

https://reviews.llvm.org/D116668
2022-01-13 09:28:19 +00:00
David Sherwood ef1ca4d3e9 [AArch64] Fix incorrect use of MVT::getVectorNumElements in AArch64TTIImpl::getVectorInstrCost
If we are inserting into or extracting from a scalable vector we do
not know the number of elements at runtime, so we can only let the
index wrap for fixed-length vectors.

Tests added here:

  Analysis/CostModel/AArch64/sve-insert-extract.ll

Differential Revision: https://reviews.llvm.org/D117099
2022-01-13 09:27:14 +00:00
Sam McCall 54eb70886c [clangd] Remove --inlay-hints flag
Differential Revision: https://reviews.llvm.org/D117036
2022-01-13 10:02:28 +01:00
Vladislav Khmelevsky 6b22c370c8 RuntimeDyldELF: Don't abort on R_AARCH64_NONE relocation
Do nothing on R_AARCH64_NONE relocation. The relocation is used by BOLT when re-linking the final binary. It is used as a dummy relocation hack in order to stop the RuntimeDyld to skip the allocation of the section.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D117066
2022-01-13 11:54:48 +03:00
David Sherwood ea9394c43c [NFC][AArch64][CodeGen] Add fixed-width vector tests for get.active.lane.mask
In practice we don't expect to see the get.active.lane.mask intrinsic
being used for fixed-width vectors, but we should at least be able
to generate code for it. This patch simply adds some fixed-width tests
to an existing file:

  CodeGen/AArch64/active_lane_mask.ll

Differential Revision: https://reviews.llvm.org/D116644
2022-01-13 08:52:56 +00:00
Adrian Kuegel 159898d568 [mlir] Add missing const to cloneWith method. 2022-01-13 09:40:29 +01:00
luxufan 0ef5aa69e7 [JITLink] Add fixup value range check
This patch makes jitlink to report an out of range error when the fixup value out of range

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D107328
2022-01-13 16:32:49 +08:00
mydeveloperday 7ee4236789 [clang-format] clang-format eats space in front of attributes for operator delete
https://github.com/llvm/llvm-project/issues/27037

Sorry its taken so long to get to this issue! (got it before it hit its 6th birthday!)

```
void operator delete(void *foo)ATTRIB;
```

(void *foo) is incorrectly determined to be a C-Style Cast resulting in the space being removed after the ) and before the attrib, due to the detection of

```
delete (A* )a;
```

The following was previously unaffected

```
void operator new(void *foo) ATTRIB;
```

Fixes #27037

Reviewed By: curdeius, HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D116920
2022-01-13 07:57:45 +00:00
Jim Lin bb13036483 [M68k][NFC] Use Register instead of unsigned int 2022-01-13 15:49:39 +08:00
Christian Sigg cc1b9acf55 [NVPTX] Lower fp16 fminnum, fmaxnum to native on sm_80.
Reviewed By: bkramer, tra

Differential Revision: https://reviews.llvm.org/D117122
2022-01-13 08:52:31 +01:00
Sam McCall 9c9119ab36 [clangd] Extend SymbolOrigin, stop serializing it
New values:
- Split Dynamic into Open/Preamble
- Add Background (previously was just Unknown)
- Soon: stdlib index

This requires extending to 16 bits, which fits within the padding of Symbol.
Unfortunately we're also *serializing* SymbolOrigin as a fixed 8 bits.

Stop serializing SymbolOrigin:
- conceptually, the source is whoever indexes or *deserializes* a symbol
- deserialization takes SymbolOrigin as a parameter and stamps it on each sym
- this is a breaking format change

Differential Revision: https://reviews.llvm.org/D115243
2022-01-13 08:26:12 +01:00
Sam McCall d8716cd7d3 [CodeCompletion] (mostly) fix completion in incomplete C++ ctor initializers.
C++ member function bodies (including ctor initializers) are first captured
into a buffer and then parsed after the class is complete. (This allows
members to be referenced even if declared later).

When the boundary of the function body cannot be established, its buffer is
discarded and late-parsing never happens (it would surely fail).
For code completion this is the wrong tradeoff: the point of the parse is to
generate completions as a side-effect.
Today, when the ctor body wasn't typed yet there are no init list completions.
With this patch we parse such an init-list if it contains the completion point.

There's one caveat: the parser has to decide where to resume parsing members
after a broken init list. Often the first clear recovery point is *after* the
next member, so that member is missing from completion/signature help etc. e.g.
  struct S {
    S() m  //<- completion here
    int maaa;
    int mbbb;
  }
Here "int maaa;" is treated as part of the init list, so "maaa" is not available
as a completion. Maybe in future indentation can be used to recognize that
this is a separate member, not part of the init list.

Differential Revision: https://reviews.llvm.org/D116294
2022-01-13 08:06:35 +01:00
Kazu Hirata cb7f806a3a [clang] Remove redundant member initialization (NFC)
Identified with readability-redundant-member-init.
2022-01-12 22:12:01 -08:00
Kazu Hirata 728c77dbb3 [Sema] Fix a bugprone argument comment (NFC)
Identified with bugprone-argument-comment.
2022-01-12 22:11:59 -08:00
Kazu Hirata cd772844d8 [CSKY] Ensure a newline at the end of a file (NFC) 2022-01-12 22:11:57 -08:00
Igor Kudrin e00ac48df3 [ELF] Use tombstone values for discarded symbols in relocatable output
This extends D81784. Sections can be discarded when linking a
relocatable output. Before the patch, LLD did not update the content
of debug sections and only replaced the corresponding relocations with
R_*_NONE, which could break the debug information.

Differential Revision: https://reviews.llvm.org/D116946
2022-01-13 11:38:26 +07:00