Commit Graph

10679 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen 535e8e5f60 Let's just declare that it is impossible to construct a std::pair from a null
pointer and work around that.

llvm-svn: 113788
2010-09-13 21:29:45 +00:00
Benjamin Kramer 65550d7cea Fix linux/msvc build, move include.
llvm-svn: 113776
2010-09-13 20:04:49 +00:00
Eric Christopher 79127ab3f5 Silence more warnings. Two more unused variables.
llvm-svn: 113771
2010-09-13 18:30:57 +00:00
John Thompson 1094c80281 Added skeleton for inline asm multiple alternative constraint support.
llvm-svn: 113766
2010-09-13 18:15:37 +00:00
Bill Wendling 27dddd1fd1 Rename ConvertToSetZeroFlag to something more general.
llvm-svn: 113670
2010-09-11 00:13:50 +00:00
Bill Wendling d0a5f4e238 No need to recompute the SrcReg and CmpValue.
llvm-svn: 113666
2010-09-10 23:46:12 +00:00
Bill Wendling 041230014c Move some of the decision logic for converting an instruction into one that sets
the 'zero' bit down into the back-end. There are other cases where this logic
isn't sufficient, so they should be handled separately.

llvm-svn: 113665
2010-09-10 23:34:19 +00:00
Bob Wilson f3ecfd0e53 Fix a comment typo.
llvm-svn: 113653
2010-09-10 22:42:21 +00:00
Bill Wendling aee679bf35 Modify the comparison optimizations in the peephole optimizer to update the
iterator when an optimization took place. This allows us to do more insane
things with the code than just remove an instruction or two.

llvm-svn: 113640
2010-09-10 21:55:43 +00:00
Michael J. Spencer dc38d36ccb CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally.
llvm-svn: 113632
2010-09-10 21:14:25 +00:00
Devang Patel 6095d818e5 Add DEBUG message.
llvm-svn: 113614
2010-09-10 20:32:09 +00:00
Evan Cheng bf4070756f Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.

llvm-svn: 113570
2010-09-10 01:29:16 +00:00
Jakob Stoklund Olesen 79e838b0a8 Remove dead code.
llvm-svn: 113386
2010-09-08 18:50:24 +00:00
Jakob Stoklund Olesen 4d19d2651d Don't add <imp-def> operands during register rewriting.
LiveIntervals already adds <imp-def> operands for super-registers when a subreg
def defines the whole register. Thus, it is not necessary to do it again when
rewriting.

In fact, the super-register imp-defs caused miscompilations because the late
scheduler couldn't see that the super-register was read.

We still add super-reg <imp-use,kill> operands when rewriting virtuals to
physicals.

llvm-svn: 113299
2010-09-07 22:38:45 +00:00
Chris Lattner 419d0aa0ed add a comment about where this should eventually move.
llvm-svn: 113117
2010-09-05 20:33:40 +00:00
Lang Hames 64a4a13617 Added initialisers for reduction rule counters.
llvm-svn: 113108
2010-09-05 13:42:32 +00:00
Chris Lattner eeba0c73e5 implement rdar://6653118 - fastisel should fold loads where possible.
Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:

int foo(int x, int y, int z) {
  return x+y+z;
}

used to compile into:

_foo:                                   ## @foo
	subq	$12, %rsp
	movl	%edi, 8(%rsp)
	movl	%esi, 4(%rsp)
	movl	%edx, (%rsp)
	movl	8(%rsp), %edx
	movl	4(%rsp), %esi
	addl	%edx, %esi
	movl	(%rsp), %edx
	addl	%esi, %edx
	movl	%edx, %eax
	addq	$12, %rsp
	ret

Now we produce:

_foo:                                   ## @foo
	subq	$12, %rsp
	movl	%edi, 8(%rsp)
	movl	%esi, 4(%rsp)
	movl	%edx, (%rsp)
	movl	8(%rsp), %edx
	addl	4(%rsp), %edx    ## Folded load
	addl	(%rsp), %edx     ## Folded load
	movl	%edx, %eax
	addq	$12, %rsp
	ret

Fewer instructions and less register use = faster compiles.

llvm-svn: 113102
2010-09-05 02:18:34 +00:00
Jakob Stoklund Olesen 313358fef9 Remove dead code.
Clobber ranges are no longer used when joining physical registers.
Instead, all aliases are checked for interference.

llvm-svn: 113084
2010-09-04 21:09:33 +00:00
Chris Lattner 65b48b5dfc zap dead code.
llvm-svn: 113073
2010-09-04 18:12:00 +00:00
Jim Grosbach 005155e236 previous patch was a little too tricky for its own good. Don't try to
overload UserInInstr. Explicitly check Allocatable. The early exit in the
condition will mean the performance impact of the extra test should be
minimal.

llvm-svn: 113016
2010-09-03 21:45:15 +00:00
Bob Wilson 3626a8c136 Add a missing check when legalizing a vector extending load. This doesn't
solve the root problem, but it corrects the bug in the code I added to
support legalizing in the case where the non-extended type is also legal.

llvm-svn: 112997
2010-09-03 19:20:37 +00:00
Jakob Stoklund Olesen 662fecd654 VirtRegRewriter checks for early clobbers before it reuses an available stack
slot.

Teach it to also check for early clobbered aliases, and early clobber operands
following the current operand.

This fixes the miscompilation in PR8044 where EC registers eax and ecx were
being used for inputs.

llvm-svn: 112988
2010-09-03 18:36:56 +00:00
Duncan Sands bc42c906bb Reapply commit 112702 which was speculatively reverted by echristo.
Original commit message:
Use the SSAUpdator to turn calls to eh.exception that are not in a
landing pad into uses of registers rather than loads from a stack
slot.  Doesn't touch the 'orrible hack code - Bill needs to persuade
me harder :)

llvm-svn: 112952
2010-09-03 08:31:48 +00:00
Devang Patel 854ad26ae2 There is no need to use .set here.
Thanks Chris!

llvm-svn: 112900
2010-09-02 23:01:10 +00:00
Devang Patel 3bffd52d78 Detect undef value early and save unnecessary NodeMap query.
llvm-svn: 112864
2010-09-02 21:29:42 +00:00
Dan Gohman 3c9b5f394b Don't narrow the load and store in a load+twiddle+store sequence unless
there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.

This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.

llvm-svn: 112861
2010-09-02 21:18:42 +00:00
Devang Patel 98d3edfe2a Tidy up.
llvm-svn: 112858
2010-09-02 21:02:27 +00:00
Jim Grosbach 35f3252036 The scavenger should just use getAllocatableSet() rather than reinventing it
locally.

llvm-svn: 112845
2010-09-02 18:29:04 +00:00
Jim Grosbach 944aece38a Anti-dependency breaking needs to be careful not to use reserved regs
llvm-svn: 112832
2010-09-02 17:12:55 +00:00
Devang Patel da3ef85460 Fix .debug_range for linux. Patch by Krister Wombell.
llvm-svn: 112830
2010-09-02 16:43:44 +00:00
Lang Hames 9a6f8ee32c Added support for register allocators to record which intervals are spill intervals, and where the uses and defs of the original intervals were in the original code.
Spill intervals can be hidden using the "-rmf-intervals=virt-nospills*" option.

llvm-svn: 112811
2010-09-02 08:27:00 +00:00
Chandler Carruth d30f8ec11e Silence an ambiguous else warning from GCC.
llvm-svn: 112809
2010-09-02 07:08:05 +00:00
Lang Hames b59620f519 Added counters for PBQP reduction rules.
llvm-svn: 112807
2010-09-02 05:37:52 +00:00
Jim Grosbach 64df92a9b2 Add a bit of debug output for register scavenging
llvm-svn: 112787
2010-09-02 00:51:37 +00:00
Jim Grosbach 63a8eaf559 Tweak to ignoring reserved regs. The allocator was occasionally still looking
at them since they'd end up in the register weights list. Tell it to stop
doing that.

llvm-svn: 112756
2010-09-01 22:48:34 +00:00
Jakob Stoklund Olesen 4b6fd48bba Teach RemoveCopyByCommutingDef to check all aliases, not just subregisters.
This caused a miscompilation in WebKit where %RAX had conflicting defs when
RemoveCopyByCommutingDef was commuting a %EAX use.

llvm-svn: 112751
2010-09-01 22:15:35 +00:00
Jim Grosbach d5e72a1e84 tidy up trailing whitespace and an 80 column violation.
llvm-svn: 112746
2010-09-01 21:48:06 +00:00
Jim Grosbach 9dce31438d cleanup per feedback. use a helper function for getting the first non-reserved
physical register in a register class. Make sure to assert if the register
class is empty.

llvm-svn: 112743
2010-09-01 21:34:41 +00:00
Jim Grosbach b070ddf6b4 The register allocator shouldn't consider allocating reserved registers. PBQP version.
llvm-svn: 112742
2010-09-01 21:23:03 +00:00
Jim Grosbach 5ccf18c2fc The register allocator shouldn't consider allocating reserved registers.
r112728 did this for fast regalloc.

llvm-svn: 112741
2010-09-01 21:04:27 +00:00
Jim Grosbach df6b67bf85 The register allocator shouldn't consider allocating reserved registers.
llvm-svn: 112728
2010-09-01 19:28:41 +00:00
Jim Grosbach cb2e56fa82 tidy up a few 80-column and trailing whitespace bits.
llvm-svn: 112726
2010-09-01 19:16:29 +00:00
Eric Christopher a5d315c665 Speculatively revert 112699 and 112702, they seem to be causing
self host errors on clang-x86-64.

llvm-svn: 112719
2010-09-01 17:29:10 +00:00
Duncan Sands 4d51e3fd17 Use the SSAUpdator to turn calls to eh.exception that are not in a
landing pad into uses of registers rather than loads from a stack
slot.  Doesn't touch the 'orrible hack code - Bill needs to persuade
me harder :)

llvm-svn: 112702
2010-09-01 14:07:47 +00:00
Devang Patel ea63639da5 Use absolute label for DW_AT_stmt_list if a target does not prefer offset here.
This patch was developed on top of original patch by Artur Pietrek.

llvm-svn: 112678
2010-08-31 23:50:19 +00:00
Devang Patel 86ec8b3a3f Reapply r112623. Included additional check for unused byval argument.
llvm-svn: 112659
2010-08-31 22:22:42 +00:00
Jakob Stoklund Olesen 7993dae7bd Track liveness of unallocatable, unreserved registers in machine DCE.
Reserved registers are unpredictable, and are treated as always live by machine
DCE.

Allocatable registers are never reserved, and can be used for virtual registers.

Unreserved, unallocatable registers can not be used for virtual registers, but
otherwise behave like a normal allocatable register. Most targets only have
the flag register in this set.

llvm-svn: 112649
2010-08-31 21:51:05 +00:00
Jakob Stoklund Olesen 2c325dc907 Ignore unallocatable registers in RegAllocFast.
llvm-svn: 112632
2010-08-31 19:54:25 +00:00
Devang Patel 529f248eb4 Revert r112623. It is causing self host build failures.
llvm-svn: 112631
2010-08-31 19:41:03 +00:00
Devang Patel 8559932d36 Remember byval argument's frame index during argument lowering and use this info to emit debug info.
Fixes Radar 8367011.

llvm-svn: 112623
2010-08-31 18:50:09 +00:00
Jim Grosbach 365e931f7b Improve virtual frame base register allocation heuristics.
1. Allocate them in the entry block of the function to enable function-wide
     re-use. The instructions to create them should be re-materializable, so
     there shouldn't be additional cost compared to creating them local
     to the basic blocks where they are used.
  2. Collect all of the frame index references for the function and sort them
     by the local offset referenced. Iterate over the sorted list to
     allocate the virtual base registers. This enables creation of base
     registers optimized for positive-offset access of frame references.
     (Note: This may be appropriate to later be a target hook to do the
     sorting in a target appropriate manner. For now it's done here for
     simplicity.)

llvm-svn: 112609
2010-08-31 17:58:19 +00:00
Duncan Sands bb8a3f9f6d Stop using the dom frontier in DwarfEHPrepare by not promoting alloca's
any more.  I plan to reimplement alloca promotion using SSAUpdater later.
It looks like Bill's URoR logic really always needs domtree, so the pass
now always asks for domtree info.

llvm-svn: 112597
2010-08-31 09:05:06 +00:00
Devang Patel 417d72823a Offset is not always unsigned number.
llvm-svn: 112584
2010-08-31 06:12:08 +00:00
Devang Patel 2cfc3af181 Simplify.
llvm-svn: 112583
2010-08-31 06:11:28 +00:00
Bruno Cardoso Lopes d9ef4a1a24 zap unused method. x86 is the only user and already has a more powerfull version
llvm-svn: 112571
2010-08-31 02:36:20 +00:00
Jakob Stoklund Olesen 9c39690edf Add experimental -disable-physical-join command line option.
Eventually, we want to disable physreg coalescing completely, and let the
register allocator do its job using hints.

This option makes it possible to measure the impact of disabling physreg
coalescing.

llvm-svn: 112567
2010-08-31 01:27:49 +00:00
Chris Lattner 34bfab0ad5 two changes:
1) nuke ConstDataCoalSection, which is dead.
2) revise my previous patch for rdar://8018335,
  which was completely wrong.  Specifically, it doesn't 
  make sense to mark __TEXT,__const_coal as PURE_INSTRUCTIONS,
  because it is for readonly data.  templates (it turns out)
  go to const_coal_nt.  The real fix for rdar://8018335 was
  to give ConstTextCoalSection a section kind of ReadOnly 
  instead of Text.

llvm-svn: 112496
2010-08-30 18:12:35 +00:00
Bill Wendling f824489a1d Revert r112461. It was failing on PPC...
llvm-svn: 112463
2010-08-30 04:36:50 +00:00
Bill Wendling 938f299fa9 When adding a register, we should mark it as "def" if it can optionally define
said (physical) register.

llvm-svn: 112461
2010-08-30 01:36:05 +00:00
Chris Lattner ea05bf2259 revert 112457, it looks like it broke selfhost.
llvm-svn: 112459
2010-08-29 22:28:18 +00:00
Chris Lattner c843fca2fd rewrite DwarfEHPrepare to use SSAUpdater to promote its allocas
instead of PromoteMemToReg.  This allows it to stop using DF and DT,
eliminating a computation of DT and DF from clang -O3.  Clang is now
down to 2 runs of DomFrontier.

llvm-svn: 112457
2010-08-29 19:54:28 +00:00
Chris Lattner d94a7c3dc1 inline function into its only caller.
llvm-svn: 112455
2010-08-29 19:28:28 +00:00
Chris Lattner 13ee795c42 remove unions from LLVM IR. They are severely buggy and not
being actively maintained, improved, or extended.

llvm-svn: 112356
2010-08-28 04:09:24 +00:00
Chris Lattner a5217a19a4 remove dead proto
llvm-svn: 112354
2010-08-28 03:45:03 +00:00
Dan Gohman e06905d1f0 Completely disable tail calls when fast-isel is enabled, as fast-isel
doesn't currently support dealing with this.

llvm-svn: 112341
2010-08-28 00:51:03 +00:00
Dan Gohman 1e06dbf881 Trim a #include.
llvm-svn: 112340
2010-08-28 00:49:13 +00:00
Devang Patel f2855b147f Simplify.
llvm-svn: 112305
2010-08-27 22:25:51 +00:00
Bill Wendling 6628431a91 Remove now unneeded command line flag that enables 'optimize compares.'
llvm-svn: 112287
2010-08-27 20:39:09 +00:00
Devang Patel b12ff5999e Revert r112213. It is not needed.
llvm-svn: 112242
2010-08-26 23:35:15 +00:00
Jim Grosbach 6a77066913 Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
to try to re-use scavenged frame index reference registers. rdar://8277890

llvm-svn: 112241
2010-08-26 23:32:16 +00:00
Devang Patel ea134f56b1 If node is not available then use FuncInfo.ValueMap to emit debug info for byval parameter.
llvm-svn: 112238
2010-08-26 22:53:27 +00:00
Jim Grosbach 2a1915d04b Remove the now obsolete frame index virtual re-use algorithm from PEI. Pre-RA
virtual base registers handle this function, and more. A bit more cleanup
to do on the interface to eliminateFrameIndex() after this.

llvm-svn: 112237
2010-08-26 22:42:12 +00:00
Devang Patel 42b4ac7ed3 Speculatively revert r112207.
llvm-svn: 112216
2010-08-26 20:33:42 +00:00
Devang Patel 977057f481 80 col.
llvm-svn: 112215
2010-08-26 20:32:32 +00:00
Devang Patel 384fa91deb Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also.
llvm-svn: 112213
2010-08-26 20:06:46 +00:00
Devang Patel ab596a637c Donot forget to resolve dangling debug info in a case where virtual register, used for a value, is initialized after a dbg intrinsic is seen.
llvm-svn: 112207
2010-08-26 18:36:14 +00:00
Chris Lattner af23e9a798 Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2.
llvm-svn: 112175
2010-08-26 06:57:07 +00:00
Chris Lattner eb2cc0ce0e implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.
llvm-svn: 112171
2010-08-26 05:51:22 +00:00
Chris Lattner f6418b804e zap dead code.
llvm-svn: 112155
2010-08-26 02:57:35 +00:00
Chris Lattner 8df99b523e remove some llvmcontext arguments that are now dead post-refactoring.
llvm-svn: 112104
2010-08-25 23:00:45 +00:00
Chris Lattner 75ff053497 Change handling of illegal vector types to widen when possible instead of
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats.  This
affects two places in the code: handling cross block values and handling
function return and arguments.  Since vectors are already widened by 
legalizetypes, this gives us much better code and unblocks x86-64 abi
and SPU abi work.

For example, this (which is a silly example of a cross-block value):
define <4 x float> @test2(<4 x float> %A) nounwind {
 %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
 %C = fadd <2 x float> %B, %B
  br label %BB
BB:
 %D = fadd <2 x float> %C, %C
 %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
 ret <4 x float> %E
}

Now compiles into:

_test2:                                 ## @test2
## BB#0:
 addps %xmm0, %xmm0
 addps %xmm0, %xmm0
 ret

previously it compiled into:

_test2:                                 ## @test2
## BB#0:
 addps %xmm0, %xmm0
 pshufd $1, %xmm0, %xmm1
                                        ## kill: XMM0<def> XMM0<kill> XMM0<def>
 insertps $0, %xmm0, %xmm0
 insertps $16, %xmm1, %xmm0
 addps %xmm0, %xmm0
 ret

This implements rdar://8230384

llvm-svn: 112101
2010-08-25 22:49:25 +00:00
Devang Patel 32a72ab072 Fix comment.
llvm-svn: 112086
2010-08-25 20:41:24 +00:00
Devang Patel 3f53d6e56a Remove dead argument.
llvm-svn: 112085
2010-08-25 20:39:26 +00:00
Jim Grosbach 7c1b421ae6 Add some statistics for PEI register scavenging
llvm-svn: 112084
2010-08-25 20:34:28 +00:00
Chris Lattner 05bcb488b5 split the vector case of getCopyFromParts out to its own function,
no functionality change.

llvm-svn: 111994
2010-08-24 23:20:40 +00:00
Chris Lattner 96a77ebd7c split the vector case out of getCopyToParts into its own function. No
functionality change.

llvm-svn: 111990
2010-08-24 23:10:06 +00:00
Chris Lattner 5b8967f8a2 tidy up, reduce indentation
llvm-svn: 111982
2010-08-24 22:43:11 +00:00
Jim Grosbach 2eedb7949e Add ARM heuristic for when to allocate a virtual base register for stack
access. rdar://8277890&7352504

llvm-svn: 111968
2010-08-24 21:19:33 +00:00
Jim Grosbach b77d67f318 Move enabling the local stack allocation pass into the target where it belongs.
For now it's still a command line option, but the interface to the generic
code doesn't need to know that.

llvm-svn: 111942
2010-08-24 19:05:43 +00:00
Devang Patel 4a213870db Revert r107202. It is not adding any value.
llvm-svn: 111870
2010-08-24 00:06:12 +00:00
Jim Grosbach 616bc356e9 Remove the MFI storage of the local allocation block size. It's not needed.
llvm-svn: 111847
2010-08-23 21:29:29 +00:00
Jim Grosbach 754f8e600e Better handling of local offsets for downwards growing stacks. This corrects
relative offsets when there are offsets encoded in the instructions and
simplifies final allocation in PEI. rdar://8277890

llvm-svn: 111836
2010-08-23 20:40:38 +00:00
Devang Patel a8652674e0 Handle qualified constants that are directly folded by FE.
PR 7920.

llvm-svn: 111820
2010-08-23 18:25:56 +00:00
Owen Anderson d31d82d75c Now that PassInfo and Pass::ID have been separated, move the rest of the passes over to the new registration API.
llvm-svn: 111815
2010-08-23 17:52:01 +00:00
Chandler Carruth 191c4f73b2 Fix some GCC warnings by providing a virtual destructor in the base of a class
hierarchy with virtual methods and using llvm_unreachable to properly indicate
unreachable states which would otherwise leave variables uninitialized.

llvm-svn: 111803
2010-08-23 08:25:07 +00:00
Eli Friedman ac305d2024 Delete dead comment.
llvm-svn: 111744
2010-08-21 20:19:51 +00:00
Bill Wendling 578ee4070c Create the new linker type "linker_private_weak_def_auto".
It's similar to "linker_private_weak", but it's known that the address of the
object is not taken. For instance, functions that had an inline definition, but
the compiler decided not to inline it. Note, unlike linker_private and
linker_private_weak, linker_private_weak_def_auto may have only default
visibility.  The symbols are removed by the linker from the final linked image
(executable or dynamic library).

llvm-svn: 111684
2010-08-20 22:05:50 +00:00
Jim Grosbach 7648a21152 Downwards growing stack allocation order reverses relative offsets
llvm-svn: 111673
2010-08-20 20:25:31 +00:00
Jim Grosbach 7110941d68 Add more dbg output
llvm-svn: 111670
2010-08-20 19:04:43 +00:00
Jim Grosbach 0600691fe6 properly check for whether base regs were inserted
llvm-svn: 111646
2010-08-20 16:48:30 +00:00
Bob Wilson c56fef4eac If the target says that an extending load is not legal, regardless of whether
it involves specific floating-point types, legalize should expand an
extending load to a non-extending load followed by a separate extend operation.
For example, we currently expand SEXTLOAD to EXTLOAD+SIGN_EXTEND_INREG (and
assert that EXTLOAD should always be supported).  Now we can expand that to
LOAD+SIGN_EXTEND.  This is needed to allow vector SIGN_EXTEND and ZERO_EXTEND
to be used for NEON.

llvm-svn: 111586
2010-08-19 23:52:39 +00:00
Jim Grosbach 56e56323c8 Better handling of offsets on frame index references. rdar://8277890
llvm-svn: 111585
2010-08-19 23:52:25 +00:00
Evan Cheng e5af930156 Update debug logs.
llvm-svn: 111575
2010-08-19 23:33:02 +00:00
Evan Cheng 63a868457b Properly update MachineDominators when splitting critical edge.
llvm-svn: 111574
2010-08-19 23:32:47 +00:00
Bill Wendling 68caaaf282 Correct header.
llvm-svn: 111540
2010-08-19 18:52:17 +00:00
Evan Cheng 361b9be7c6 It's possible to sink a def if its local uses are PHI's.
llvm-svn: 111537
2010-08-19 18:33:29 +00:00
Michael J. Spencer abca173494 Fix the msvc 2010 build.
The Microsoft (R) 32-bit C/C++ Optimizing Compiler Version 16.00.30319.01
implements parts of C++0x based on the draft standard. An old version of
the draft had a bug that makes std::pair<T1*, T2*>(something, 0) fail to
compile. This is because the template<class U, class V> pair(U&& x, V&& y)
constructor is selected, even though it later fails to implicitly convert
U and V to frist_type and second_type.

This has been fixed in n3090, but it seems that Microsoft is not going to
update msvc.

llvm-svn: 111535
2010-08-19 18:16:39 +00:00
Evan Cheng 681d0c25f9 Remove disabled assertion.
llvm-svn: 111531
2010-08-19 17:33:48 +00:00
Evan Cheng ae9939c839 Teach machine-sink to break critical edges when appropriate. Work in progress.
llvm-svn: 111530
2010-08-19 17:33:11 +00:00
Jim Grosbach 743d7c80e4 Update local stack block allocation to let PEI do the allocs if no additional
base registers were required. This will allow for slightly better packing
of the locals when alignment padding is necessary after callee saved registers.

llvm-svn: 111508
2010-08-19 02:47:08 +00:00
Jim Grosbach 3ac059369b Add a newline to debug output
llvm-svn: 111453
2010-08-18 23:14:02 +00:00
Evan Cheng 25b6068b8f If any def of a machine-sink candidate has local uses, it's obviously not safe to sink it to a successor block. This bug has been hidden because a later check for critical-edge disable these illegal optimizations. This patch should significantly reduce the amount of time spent on checking dominator information for obviously unsafe sinking.
llvm-svn: 111450
2010-08-18 23:09:25 +00:00
Jim Grosbach dbfc2ce95d Enable ARM base register reuse to local stack slot allocation. Whenever a new
frame index reference to an object in the local block is seen, check if
it's near enough to any previously allocaated base register to re-use.

rdar://8277890

llvm-svn: 111443
2010-08-18 22:44:49 +00:00
Jakob Stoklund Olesen e98030ad58 Thinking about it, we don't need MachineDominatorTree after all. The DomValue
map discovers the iterated dominance frontier for free.

llvm-svn: 111400
2010-08-18 20:29:53 +00:00
Jakob Stoklund Olesen f4088b022a Revert r111394. It was too aggressive.
We must complete the DFS, otherwise we might miss needed phi-defs, and
prematurely color live ranges with a non-dominating value.

This is not a big deal since we get to color more of the CFG and the next
mapValue call will be faster.

llvm-svn: 111397
2010-08-18 20:06:05 +00:00
Jakob Stoklund Olesen 5b4cb08471 Aggressively prune the DFS when inserting phi-defs.
llvm-svn: 111394
2010-08-18 19:00:11 +00:00
Jakob Stoklund Olesen ce6f055b4d Add the LiveIntervalMap class. Don't hook it up yet.
LiveIntervalMap maps values from a parent LiveInterval to a child interval that
is a strict subset. It will create phi-def values as needed to preserve the
VNInfo SSA form in the child interval.

This leads to an algorithm very similar to the one in SSAUpdaterImpl.h, but with
enough differences that the code can't be reused:

- We don't need to manipulate PHI instructions.
- LiveIntervals have kills.
- We have MachineDominatorTree.
- We can use df_iterator.

llvm-svn: 111393
2010-08-18 19:00:08 +00:00
Bill Wendling 0d323aef46 Improve whitespace.
llvm-svn: 111384
2010-08-18 18:41:13 +00:00
Jim Grosbach e0e9b3013f Add hook for re-using virtual base registers for local stack slot access.
Nothing fancy, just ask the target if any currently available base reg
is in range for the instruction under consideration and use the first one
that is. Placeholder ARM implementation simply returns false for now.

ongoing saga of rdar://8277890

llvm-svn: 111374
2010-08-18 17:57:37 +00:00
Jakob Stoklund Olesen 952a621d93 Preserve subregs on PHI source operands. Patch by Krister Wombell!
llvm-svn: 111366
2010-08-18 16:09:47 +00:00
Jim Grosbach 3cf08661f4 Add materialization of virtual base registers for frame indices allocated into
the local block. Resolve references to those indices to a new base register.
For simplification and testing purposes, a new virtual base register is
allocated for each frame index being resolved. The result is truly horrible,
but correct, code that's good for exercising the new code paths.

Next up is adding thumb1 support, which should be very simple. Following that
will be adding base register re-use and implementing a reasonable ARM
heuristic for when a virtual base register should be generated at all.

llvm-svn: 111315
2010-08-17 22:41:55 +00:00
Dale Johannesen 16f96445c3 Make fast scheduler handle asm clobbers correctly.
PR 7882.  Follows suggestion by Amaury Pouly, thanks.

llvm-svn: 111306
2010-08-17 22:17:24 +00:00
Evan Cheng 16bfe5b0f5 PHI elimination shouldn't require machineloopinfo since it's used at -O0. Move the requirement to LiveIntervalAnalysis instead. Note this does not change the number of times machineloopinfo is computed.
llvm-svn: 111285
2010-08-17 21:00:37 +00:00
Evan Cheng e0db9d01d9 Machine CSE preserves CFG. Pass manager was freeing machineloopinfo after machine cse before.
llvm-svn: 111281
2010-08-17 20:57:42 +00:00
Jim Grosbach 1a58ce7646 silence warning
llvm-svn: 111274
2010-08-17 20:21:30 +00:00
Jim Grosbach c252ee2375 Add hook to examine an instruction referencing a frame index to determine
whether to allocate a virtual frame base register to resolve the frame
index reference in it. Implement a simple version for ARM to aid debugging.

In LocalStackSlotAllocation, scan the function for frame index references
to local frame indices and ask the target whether to allocate virtual
frame base registers for any it encounters. Purely infrastructural for
debug output. Next step is to actually allocate base registers, then add
intelligent re-use of them.

rdar://8277890

llvm-svn: 111262
2010-08-17 18:13:53 +00:00
Evan Cheng 647c559172 Move the decision logic whether it's a good idea to split a critical edge to clients. Also fixed an erroneous check. An edge is only a back edge when the from and to blocks are in the same loop.
llvm-svn: 111256
2010-08-17 17:43:50 +00:00
Evan Cheng a6848249ee Fix debug message.
llvm-svn: 111250
2010-08-17 17:15:14 +00:00
Eric Christopher 541f8012d9 Fix typo.
llvm-svn: 111223
2010-08-17 01:30:33 +00:00
Evan Cheng f259efde47 PHI elimination should not break back edge. It can cause some significant code placement issues. rdar://8263994
good:
LBB0_2:
  mov     r2, r0
  . . .
  mov     r1, r2
  bne     LBB0_2

bad:
LBB0_2:
  mov     r2, r0
  . . .
@ BB#3:
  mov     r1, r2
  b       LBB0_2

llvm-svn: 111221
2010-08-17 01:20:36 +00:00
Jim Grosbach a7c562d664 tidy up. remove unused local.
llvm-svn: 111206
2010-08-16 23:26:09 +00:00
Jim Grosbach 36d5ec383e Better handle alignment requirements for local objects in pre-regalloc frame
mapping. Have the local block track its alignment requirement, and then
apply that when the block itself is allocated. Previously, offsets could
get adjusted in PEI to be different, relative to one another, than the
block allocation thought they would be, which defeats the point of doing
the allocation this way. Continuing rdar://8277890

llvm-svn: 111197
2010-08-16 22:30:41 +00:00
Eli Friedman 7e2f4ce439 Until uleb/sleb are MC-ized, add a hack to make them work with ELF object
emission.

llvm-svn: 111177
2010-08-16 20:08:40 +00:00
Jim Grosbach 8be0196afe track local frame size in MFI, not local to the pass, since PEI needs it.
llvm-svn: 111164
2010-08-16 18:06:15 +00:00
Jakob Stoklund Olesen 5f72a04ba7 Remove unused functions.
llvm-svn: 111156
2010-08-16 17:18:20 +00:00
Ted Kremenek da2eba58ed Update CMake build.
llvm-svn: 111063
2010-08-14 01:55:09 +00:00
Jim Grosbach a030fa5297 Add a local stack object block allocation pass. This is still an
experimental pass that allocates locals relative to one another before
register allocation and then assigns them to actual stack slots as a block
later in PEI. This will eventually allow targets with limited index offset
range to allocate additional base registers (not just FP and SP) to
more efficiently reference locals, as well as handle situations where
locals cannot be referenced via SP or FP at all (dynamic stack realignment
together with variable sized objects, for example). It's currently
incomplete and almost certainly buggy. Work in progress.

Disabled by default and gated via the -enable-local-stack-alloc command
line option.

rdar://8277890

llvm-svn: 111059
2010-08-14 00:15:52 +00:00
Jakob Stoklund Olesen 27e1f26534 Clean up the Spiller.h interface.
The earliestStart argument is entirely specific to linear scan allocation, and
can be easily calculated by RegAllocLinearScan.

Replace std::vector with SmallVector.

llvm-svn: 111055
2010-08-13 22:56:53 +00:00
Jakob Stoklund Olesen d1191ee43c Implement splitting inside a single block.
When a live range is contained a single block, we can split it around
instruction clusters. The current approach is very primitive, splitting before
and after the largest gap between uses.

llvm-svn: 111043
2010-08-13 21:18:48 +00:00
Jim Grosbach d1f4465df0 tidy up whitespace a bit
llvm-svn: 111019
2010-08-13 16:55:08 +00:00
Jakob Stoklund Olesen 3d1027e7a1 Let LiveInterval::addRange extend existing ranges, it will verify that value
numbers match. The old check could accidentally leave holes in openli.

Also let useIntv add all ranges for the phi-def value inserted by
enterIntvAtEnd. This works as long at the value mapping is established in
enterIntvAtEnd.

llvm-svn: 110995
2010-08-13 01:05:26 +00:00
Jakob Stoklund Olesen 840b81a19e Remember to actually update SplitAnalysis statistics now that we have a fancy
function to do it.

llvm-svn: 110994
2010-08-13 01:05:23 +00:00
Jakob Stoklund Olesen 991e4ee860 Handle an empty dupli.
This can happen if the original interval has been broken into two disconnected
parts. Ideally, we should be able to detect when the graph is disconnected and
create separate intervals, but that code is not implemented yet.

Example:

Two basic blocks are both branching to a loop header. Our interval is defined in
both basic blocks, and live into the loop along both edges.

We decide to split the interval around the loop. The interval is split into an
inside part and an outside part. The outside part now has two disconnected
segments, one in each basic block.

If we later decide to split the outside interval into single blocks, we get one
interval per basic block and an empty dupli for the remainder.

llvm-svn: 110976
2010-08-12 23:02:57 +00:00
Jakob Stoklund Olesen 32c181c444 Update the SplitAnalysis statistics as uses are moved from curli to the new
split intervals. THis means the analysis can be used for multiple splits as long
as curli doesn't shrink.

llvm-svn: 110975
2010-08-12 23:02:55 +00:00
Jakob Stoklund Olesen 0910689353 Also recompute HasPHIKill flags in LiveInterval::RenumberValues.
If a phi-def value were removed from the interval, the phi-kill flags are no
longer valid.

llvm-svn: 110949
2010-08-12 20:38:03 +00:00
Jakob Stoklund Olesen 073cd8004a Remove trailing whitespace.
llvm-svn: 110944
2010-08-12 20:01:23 +00:00
Jakob Stoklund Olesen fa3ea11ae6 Clean up debug output.
llvm-svn: 110940
2010-08-12 18:50:55 +00:00
Jakob Stoklund Olesen 622848b262 Implement single block splitting.
Before spilling a live range, we split it into a separate range for each basic
block where it is used. That way we only get one reload per basic block if the
new smaller ranges can allocate to a register.

This type of splitting is already present in the standard spiller.

llvm-svn: 110934
2010-08-12 17:07:14 +00:00
Jakob Stoklund Olesen 852a2c19dd Fix a FIXME. The SlotIndex::Slot enum should be private.
llvm-svn: 110826
2010-08-11 16:50:17 +00:00
Bill Wendling 0757820f8f Turn optimize compares back on with fix. We needed to test that a machine op was
a register before checking if it was defined.

llvm-svn: 110733
2010-08-10 21:38:11 +00:00
Jakob Stoklund Olesen 57f3db6e2e Give up on register class recalculation when the register is used with subreg
operands. We don't currently have a hook to provide "the largest super class of
A where all registers' getSubReg(subidx) is valid and in B".

llvm-svn: 110730
2010-08-10 21:16:16 +00:00
Dan Gohman a53f4e23e4 Revert r110718; it broke clang-i386-darwin9.
llvm-svn: 110726
2010-08-10 20:49:33 +00:00
Jakob Stoklund Olesen 3b870f045f Avoid editing the current live interval during remat.
The live interval may be used for a spill slot as well, and that spill slot
could be shared by split registers. We cannot shrink it, even if we know the
current register won't need the spill slot in that range.

llvm-svn: 110721
2010-08-10 20:45:07 +00:00
Jakob Stoklund Olesen 62e721478b More debug spew
llvm-svn: 110720
2010-08-10 20:45:01 +00:00
Bill Wendling 558f822bc7 Turn optimize cmps on by default so that we can get some testing by the nightly
ARM testers.

llvm-svn: 110718
2010-08-10 20:23:02 +00:00
Devang Patel 8e06a5eb47 Do not forget debug info for enums. Use named mdnode to keep track of these types.
llvm-svn: 110712
2010-08-10 20:01:20 +00:00
Jakob Stoklund Olesen 53c5022040 Implement register class inflation.
When splitting a live range, the new registers have fewer uses and the
permissible register class may be less constrained. Recompute the register class
constraint from the uses of new registers created for a split. This may let them
be allocated from a larger set, possibly avoiding a spill.

llvm-svn: 110703
2010-08-10 18:37:40 +00:00
Jakob Stoklund Olesen 284c2dbfd7 Recalculate the spill weight and allocation hint for virtual registers created
during live range splitting.

llvm-svn: 110686
2010-08-10 17:07:22 +00:00
Devang Patel b219746c80 Handle TAG_constant for integers.
llvm-svn: 110656
2010-08-10 07:11:13 +00:00
Bill Wendling 884514066e Update CMake...sorry for the breakage.
llvm-svn: 110654
2010-08-10 05:16:06 +00:00
Devang Patel 18ba0b4ac3 Simplify.
llvm-svn: 110653
2010-08-10 04:12:17 +00:00
Devang Patel b1e07b3f2a Drop "const". It does not add value here.
llvm-svn: 110652
2010-08-10 04:09:06 +00:00
Evan Cheng 23ef829096 Add missing null check reported by Amaury Pouly.
llvm-svn: 110649
2010-08-10 02:39:45 +00:00
Devang Patel 469c12d254 Do not include file static variable in pubnames list.
Refactor and simplify code to avoid redundant checks.

llvm-svn: 110642
2010-08-10 01:37:23 +00:00
Jakob Stoklund Olesen e00c49da11 Transpose the calculation of spill weights such that we are calculating one
register at a time. This turns out to be slightly faster than iterating over
instructions, but more importantly, it allows us to compute spill weights for
new registers created after the spill weight pass has run.

Also compute the allocation hint at the same time as the spill weight. This
allows us to use the spill weight as a cost metric for copies, and choose the
most profitable hint if there is more than one possibility.

The new hints provide a very small (< 0.1%) but universal code size improvement.

llvm-svn: 110631
2010-08-10 00:02:26 +00:00
Bill Wendling ca67835eaa Merge the OptimizeExts and OptimizeCmps passes into one PeepholeOptimizer
pass. This pass should expand with all of the small, fine-grained optimization
passes to reduce compile time and increase happiment.

llvm-svn: 110627
2010-08-09 23:59:04 +00:00
Devang Patel 394a69ed52 Undo accidental commit.
llvm-svn: 110623
2010-08-09 23:28:52 +00:00
Devang Patel 4eda9abddb Simplify. Avoid redundant checks.
llvm-svn: 110621
2010-08-09 23:26:06 +00:00
Devang Patel c7cf14f5f6 Refactor.
llvm-svn: 110607
2010-08-09 21:39:24 +00:00
Devang Patel 6d9f9feb2b Refactoring. Update DbgVarible to handle queries itself.
llvm-svn: 110600
2010-08-09 21:01:39 +00:00
Devang Patel b6511a36b4 It is ok, and convenient, to pass descriptors by value.
llvm-svn: 110590
2010-08-09 20:20:05 +00:00
Jakob Stoklund Olesen 3fa110f227 A REG_SEQUENCE instruction may use the same register twice.
If we are emitting COPY instructions for the REG_SEQUENCE, make sure the kill
flag goes on the last COPY. Otherwise we may be using a killed register.

<rdar://problem/8287792>

llvm-svn: 110589
2010-08-09 20:19:16 +00:00
Devang Patel 406798a17d Rename a method.
llvm-svn: 110586
2010-08-09 18:51:29 +00:00
Bill Wendling 798617b1ab Use the "isCompare" machine instruction attribute instead of calling the
relatively expensive comparison analyzer on each instruction. Also rename the
comparison analyzer method to something more in line with what it actually does.

This pass is will eventually be folded into the Machine CSE pass.

llvm-svn: 110539
2010-08-08 05:04:59 +00:00
Dan Gohman 093b42fc7c Tidy some #includes and forward-declarations, and move the C binding code
out of PassManager.cpp and into Core.cpp with the rest of the C binding code.

llvm-svn: 110494
2010-08-07 00:43:20 +00:00
Jakob Stoklund Olesen 45e07c8fc5 Lazily defer duplicating the live interval we are splitting until we know it is
necessary.

Sometimes, live range splitting doesn't shrink the current interval, but simply
changes some instructions to use a new interval. That makes the original more
suitable for spilling. In this case, we don't need to duplicate the original.

llvm-svn: 110481
2010-08-06 22:17:33 +00:00
Jim Grosbach da27eb246d Cleanup comment wording
llvm-svn: 110466
2010-08-06 18:59:07 +00:00
Jakob Stoklund Olesen 1dfca4e4bb Keep the MachiuneFunctionPass pointer around. It is useful for verification.
llvm-svn: 110464
2010-08-06 18:47:06 +00:00
Jakob Stoklund Olesen 8c0f693150 Add LiveInterval::RenumberValues - Garbage collection for VNInfos.
After heavy editing of a live interval, it is much easier to simply renumber the
live values instead of trying to keep track of the unused ones.

llvm-svn: 110463
2010-08-06 18:46:59 +00:00
Owen Anderson a7aed18624 Reapply r110396, with fixes to appease the Linux buildbot gods.
llvm-svn: 110460
2010-08-06 18:33:48 +00:00
Jakob Stoklund Olesen 8147d7a6b9 Add more verification of LiveIntervals.
llvm-svn: 110454
2010-08-06 18:04:19 +00:00
Jakob Stoklund Olesen 7e0de5ef8e Fix swapped COPY operands.
llvm-svn: 110453
2010-08-06 18:04:17 +00:00
Jakob Stoklund Olesen 0e7752407c Don't try to verify LiveIntervals for physical registers.
When a physical register is in use, some alias of that register has a live
interval with a relevant live range. That is the sad state of intervals after
physreg coalescing of subregs, and it is good enough for correct register
allocation.

llvm-svn: 110452
2010-08-06 18:04:14 +00:00
Ted Kremenek 26177d2c24 Update CMake build.
llvm-svn: 110429
2010-08-06 04:05:21 +00:00
Bill Wendling 7de9d52c13 Add the Optimize Compares pass (disabled by default).
This pass tries to remove comparison instructions when possible. For instance,
if you have this code:

   sub r1, 1
   cmp r1, 0
   bz  L1

and "sub" either sets the same flag as the "cmp" instruction or could be
converted to set the same flag, then we can eliminate the "cmp" instruction all
together. This is a important for ARM where the ALU instructions could set the
CPSR flag, but need a special suffix ('s') to do so.

llvm-svn: 110423
2010-08-06 01:32:48 +00:00
Devang Patel 8a18aee421 While emitting DBG_VALUE for registers spilled at the end of a block do not use location of MBB->end(). If a block does not have terminator then incoming iterator points to end().
llvm-svn: 110411
2010-08-06 00:26:18 +00:00
Owen Anderson bda59bd247 Revert r110396 to fix buildbots.
llvm-svn: 110410
2010-08-06 00:23:35 +00:00
Jakob Stoklund Olesen 01a81b01bc Be more aggressive about removing joined physreg copies.
When a joined COPY changes subreg liveness, we keep it around as a KILL,
otherwise it is safe to delete.

llvm-svn: 110403
2010-08-05 23:51:28 +00:00
Jakob Stoklund Olesen b4ef4a961d Don't verify LiveVariables if LiveIntervals is available.
LiveVariables becomes horribly wrong while the coalescer is running, but the
analysis is not zapped until after the coalescer pass has run. This causes tons
of false reports when calling verify form the coalescer.

llvm-svn: 110402
2010-08-05 23:51:26 +00:00
Owen Anderson 755aceb5d0 Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396
2010-08-05 23:42:04 +00:00
Jakob Stoklund Olesen e7709ebb64 Add basic verification of LiveIntervals.
We verify that the LiveInterval is live at uses and defs, and that all
instructions have a SlotIndex.

Stuff we don't check yet:

- Is the LiveInterval minimal?
- Do all defs correspond to instructions or phis?
- Do all defs dominate all their live ranges?
- Are all live ranges continually reachable from their def?

llvm-svn: 110386
2010-08-05 22:32:21 +00:00
Jakob Stoklund Olesen 4583355a78 Remove double-def checking from MachineVerifier, so a register does not have to
be killed before being redefined.

These checks are usually disabled, and usually fail when enabled. We de facto
allow live registers to be redefined without a kill, the corresponding
assertions in RegScavenger were removed long ago.

llvm-svn: 110362
2010-08-05 18:59:59 +00:00
Jakob Stoklund Olesen d9572619e2 Avoid using a live std::multimap iterator while editing the map. It looks like
we sometimes compare singular iterators, reported by ENABLE_EXPENSIVE_CHECKS.
This fixes PR7825.

llvm-svn: 110355
2010-08-05 18:12:19 +00:00
Bill Wendling ca1cb13646 The lower invoke pass needs to have unreachable code elimination run after it
because it could create such things. This fixes a MingW buildbot test failure.

llvm-svn: 110279
2010-08-04 23:36:02 +00:00
Jakob Stoklund Olesen 7fd4905f08 Coalesce stack slot accesses that arise when spilling both sides of a COPY.
This helps avoid silly code:

    %R0<def = LOAD <fi#5>
    STORE <fi#5>, %R0<kill>

llvm-svn: 110266
2010-08-04 22:35:11 +00:00
Jakob Stoklund Olesen dc96e28d70 Checkpoint SplitKit progress.
We are now at a point where we can split around simple single-entry, single-exit
loops, although still with some bugs.

llvm-svn: 110257
2010-08-04 22:08:39 +00:00
Devang Patel 6c378ac473 Use location entry only of the location described by DBG_VALUE is valid.
llvm-svn: 110255
2010-08-04 22:07:27 +00:00
Bill Wendling b87f3e5a7d The EH prepare passes really want to be the last passes run before code-gen.
llvm-svn: 110248
2010-08-04 21:44:13 +00:00
Devang Patel 6d21f61b3f Fix typo in comment.
llvm-svn: 110244
2010-08-04 20:32:36 +00:00
Dan Gohman 2392287306 Change this llvm_unreachable to report_fatal_error, since it can
be triggered by valid, if dubious, IR.

llvm-svn: 110240
2010-08-04 18:51:09 +00:00