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Author SHA1 Message Date
Chandler Carruth c58f2166ab Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Summary:
First, we need to explain the core of the vulnerability. Note that this
is a very incomplete description, please see the Project Zero blog post
for details:
https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html

The basis for branch target injection is to direct speculative execution
of the processor to some "gadget" of executable code by poisoning the
prediction of indirect branches with the address of that gadget. The
gadget in turn contains an operation that provides a side channel for
reading data. Most commonly, this will look like a load of secret data
followed by a branch on the loaded value and then a load of some
predictable cache line. The attacker then uses timing of the processors
cache to determine which direction the branch took *in the speculative
execution*, and in turn what one bit of the loaded value was. Due to the
nature of these timing side channels and the branch predictor on Intel
processors, this allows an attacker to leak data only accessible to
a privileged domain (like the kernel) back into an unprivileged domain.

The goal is simple: avoid generating code which contains an indirect
branch that could have its prediction poisoned by an attacker. In many
cases, the compiler can simply use directed conditional branches and
a small search tree. LLVM already has support for lowering switches in
this way and the first step of this patch is to disable jump-table
lowering of switches and introduce a pass to rewrite explicit indirectbr
sequences into a switch over integers.

However, there is no fully general alternative to indirect calls. We
introduce a new construct we call a "retpoline" to implement indirect
calls in a non-speculatable way. It can be thought of loosely as
a trampoline for indirect calls which uses the RET instruction on x86.
Further, we arrange for a specific call->ret sequence which ensures the
processor predicts the return to go to a controlled, known location. The
retpoline then "smashes" the return address pushed onto the stack by the
call with the desired target of the original indirect call. The result
is a predicted return to the next instruction after a call (which can be
used to trap speculative execution within an infinite loop) and an
actual indirect branch to an arbitrary address.

On 64-bit x86 ABIs, this is especially easily done in the compiler by
using a guaranteed scratch register to pass the target into this device.
For 32-bit ABIs there isn't a guaranteed scratch register and so several
different retpoline variants are introduced to use a scratch register if
one is available in the calling convention and to otherwise use direct
stack push/pop sequences to pass the target address.

This "retpoline" mitigation is fully described in the following blog
post: https://support.google.com/faqs/answer/7625886

We also support a target feature that disables emission of the retpoline
thunk by the compiler to allow for custom thunks if users want them.
These are particularly useful in environments like kernels that
routinely do hot-patching on boot and want to hot-patch their thunk to
different code sequences. They can write this custom thunk and use
`-mretpoline-external-thunk` *in addition* to `-mretpoline`. In this
case, on x86-64 thu thunk names must be:
```
  __llvm_external_retpoline_r11
```
or on 32-bit:
```
  __llvm_external_retpoline_eax
  __llvm_external_retpoline_ecx
  __llvm_external_retpoline_edx
  __llvm_external_retpoline_push
```
And the target of the retpoline is passed in the named register, or in
the case of the `push` suffix on the top of the stack via a `pushl`
instruction.

There is one other important source of indirect branches in x86 ELF
binaries: the PLT. These patches also include support for LLD to
generate PLT entries that perform a retpoline-style indirection.

The only other indirect branches remaining that we are aware of are from
precompiled runtimes (such as crt0.o and similar). The ones we have
found are not really attackable, and so we have not focused on them
here, but eventually these runtimes should also be replicated for
retpoline-ed configurations for completeness.

For kernels or other freestanding or fully static executables, the
compiler switch `-mretpoline` is sufficient to fully mitigate this
particular attack. For dynamic executables, you must compile *all*
libraries with `-mretpoline` and additionally link the dynamic
executable and all shared libraries with LLD and pass `-z retpolineplt`
(or use similar functionality from some other linker). We strongly
recommend also using `-z now` as non-lazy binding allows the
retpoline-mitigated PLT to be substantially smaller.

When manually apply similar transformations to `-mretpoline` to the
Linux kernel we observed very small performance hits to applications
running typical workloads, and relatively minor hits (approximately 2%)
even for extremely syscall-heavy applications. This is largely due to
the small number of indirect branches that occur in performance
sensitive paths of the kernel.

When using these patches on statically linked applications, especially
C++ applications, you should expect to see a much more dramatic
performance hit. For microbenchmarks that are switch, indirect-, or
virtual-call heavy we have seen overheads ranging from 10% to 50%.

However, real-world workloads exhibit substantially lower performance
impact. Notably, techniques such as PGO and ThinLTO dramatically reduce
the impact of hot indirect calls (by speculatively promoting them to
direct calls) and allow optimized search trees to be used to lower
switches. If you need to deploy these techniques in C++ applications, we
*strongly* recommend that you ensure all hot call targets are statically
linked (avoiding PLT indirection) and use both PGO and ThinLTO. Well
tuned servers using all of these techniques saw 5% - 10% overhead from
the use of retpoline.

We will add detailed documentation covering these components in
subsequent patches, but wanted to make the core functionality available
as soon as possible. Happy for more code review, but we'd really like to
get these patches landed and backported ASAP for obvious reasons. We're
planning to backport this to both 6.0 and 5.0 release streams and get
a 5.0 release with just this cherry picked ASAP for distros and vendors.

This patch is the work of a number of people over the past month: Eric, Reid,
Rui, and myself. I'm mailing it out as a single commit due to the time
sensitive nature of landing this and the need to backport it. Huge thanks to
everyone who helped out here, and everyone at Intel who helped out in
discussions about how to craft this. Also, credit goes to Paul Turner (at
Google, but not an LLVM contributor) for much of the underlying retpoline
design.

Reviewers: echristo, rnk, ruiu, craig.topper, DavidKreitzer

Subscribers: sanjoy, emaste, mcrosier, mgorny, mehdi_amini, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D41723

llvm-svn: 323155
2018-01-22 22:05:25 +00:00
Craig Topper 8cdb94901d [X86] Add rdpid command line option and intrinsics.
Summary: This patch adds -mrdpid/-mno-rdpid and the rdpid intrinsic. The corresponding LLVM commit has already been made.

Reviewers: RKSimon, spatel, zvi, AndreiGrischenko

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42272

llvm-svn: 323047
2018-01-20 18:36:52 +00:00
Craig Topper 66d0023d86 [X86] Add goldmont to test/Driver/x86-march.c
llvm-svn: 322982
2018-01-19 19:43:36 +00:00
Petr Hosek d3b520f6cf [Fuchsia] Tests for the Fuzzer support in Fuchsia driver
This adds driver tests for the Fuzzer support.

Differential Revision: https://reviews.llvm.org/D42283

llvm-svn: 322922
2018-01-19 04:08:06 +00:00
Hiroshi Inoue a646fed6ed Revert rC322769: [RISCV] Propagate -mabi and -march values to GNU assembler.
Temporarily revert rC322769 due to buildbot failurs.

llvm-svn: 322816
2018-01-18 06:13:25 +00:00
Ana Pazos f4b1c002d1 [RISCV] Propagate -mabi and -march values to GNU assembler.
When using -fno-integrated-as flag, the gnu assembler produces code
with some default march/mabi which later causes linker failure due
to incompatible mabi/march.

In this patch we explicitly propagate -mabi and -march flags to the
GNU assembler.

In this patch we explicitly propagate -mabi and -march flags to the GNU assembler.

Differential Revision: https://reviews.llvm.org/D41271

llvm-svn: 322769
2018-01-17 22:09:58 +00:00
Nico Weber 2c6fe505b1 Attempt to fix test/Driver/masm.c on the ARM bots.
llvm-svn: 322674
2018-01-17 16:03:08 +00:00
Nico Weber e3712cf5c4 [clang-cl] Let /FA output use intel assembly.
cl's assembly output is in intel syntax, so clang-cl's should be too, PR35031.
https://reviews.llvm.org/D42157

llvm-svn: 322652
2018-01-17 13:34:20 +00:00
Brian Gesiak 28db314c82 [Driver] Suggest valid integrated tools
Summary:
There are only two valid integrated Clang driver tools: `-cc1` and
`-cc1as`. If a user asks for an unknown tool, such as `-cc1asphalt`,
an error message is displayed to indicate that there is no such tool,
but the message doesn't indicate what the valid options are.

Include the valid options in the error message.

Test Plan: `check-clang`

Reviewers: sepavloff, bkramer, phosek

Reviewed By: bkramer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42004

llvm-svn: 322517
2018-01-15 21:05:40 +00:00
Alex Bradbury 8cbdd4892f [RISCV] Implement RISCV ABI lowering
RISCVABIInfo is implemented in terms of XLen, supporting both RV32 and RV64. 
Unfortunately we need to count argument registers in the frontend in order to 
determine when to emit signext and zeroext attributes. Integer scalars are 
extended according to their type up to 32-bits and then sign-extended to XLen 
when passed in registers, but are anyext when passed on the stack. This patch 
only implements the base integer (soft float) ABIs.

For more information on the RISC-V ABI, see [the ABI 
doc](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md), 
my [golden model](https://github.com/lowRISC/riscv-calling-conv-model), and 
the [LLVM RISC-V calling convention 
patch](https://reviews.llvm.org/D39898#2d1595b4) (specifically the comment 
documenting frontend expectations).

Differential Revision: https://reviews.llvm.org/D40023

llvm-svn: 322494
2018-01-15 17:54:52 +00:00
Petr Hosek 84d036a0d1 Reland "[Driver] Update default sanitizer blacklist location"
This is related to moving the sanitizer blacklists to share/
subdirectory.

Differential Revision: https://reviews.llvm.org/D41706

llvm-svn: 322452
2018-01-14 03:43:17 +00:00
Brian Gesiak ceb987f082 [Driver] Add "did you mean?" suggestions to -cc1as
Summary:
In https://reviews.llvm.org/D41733, the driver was modified such that,
when a user provided a mispelled option such as `-hel`, it would
suggest a valid option with a nearby edit distance: "did you mean
'-help'?".

Add these suggestions to invocations of `clang -cc1as` as well.

Test Plan: `check-clang`

Reviewers: v.g.vassilev, bruno

Reviewed By: v.g.vassilev

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42001

llvm-svn: 322445
2018-01-13 17:09:11 +00:00
Alex Bradbury e0f80ddad1 Fix test/Driver/riscv32-toolchain.c for builds setting CLANG_DEFAULT_LINKER
Petr Hosek reported an external buildbot was failing on riscv32-toolchain.c, 
seemingly as it set CLANG_DEFAULT_LINKER to lld. Address this by explicitly 
setting -fuse-ld=ld in the tests.

llvm-svn: 322435
2018-01-13 09:21:11 +00:00
Douglas Yung 0d29aaf628 Fix test on Windows that was added in r322382.
The test was using "%clang++" which on Windows became "clang.exe++". Use %clangxx instead.

Reviewed by Paul Robinson

llvm-svn: 322417
2018-01-12 22:32:01 +00:00
Sam Clegg ffbfc0f827 [WebAssembly] Support -stdlib=libc++ switch
Referenced implementation from Fuchsia and Darwin Toolchain.
Still only support CST_Libcxx.  Now checks that the argument
is really '-stdlib=libc++', and display error.

Also, now will pass -lc++ and -lc++abi to the linker.

Patch by Patrick Cheng!

Differential Revision: https://reviews.llvm.org/D41937

llvm-svn: 322382
2018-01-12 17:54:49 +00:00
Sam Clegg 9bbca8c240 [WebAssembly] Remove `-allow-undefined-file wasm.syms` from linker args
See: https://github.com/WebAssembly/tool-conventions/issues/35

Differential Revision: https://reviews.llvm.org/D41923

llvm-svn: 322321
2018-01-11 22:33:50 +00:00
Alex Bradbury f067a2f769 [Driver][RISCV] Another Windows file separator fix for riscv32-toolchain.c test
I've checking the failure log, this _should_ be the last one. Sorry for not 
spotting this additional case first time round.

llvm-svn: 322294
2018-01-11 17:06:32 +00:00
Alex Bradbury 0acf13f659 [Driver][RISCV] Fix r322276 for Windows (path separator issue)
We were seeing test failures of riscv32-toolchain.c on windows due to the \ 
path separator being used for the linker. Add {{/|\\\\}} pattern (made 
horrible due to escaping), just like introduced in r214931.

llvm-svn: 322286
2018-01-11 15:38:01 +00:00
Alex Bradbury d53ce4a8b5 [Driver][RISCV] Fix r322276 by adding missing dummy crtbegin.o files to test input
The dummy crtbegin.o files were left out in r322276 (as they were ignored by 
svn add of test/Driver/Inputs/multilib_riscv_linux_sdk) and are necessary for 
the driver test to work.

llvm-svn: 322277
2018-01-11 13:51:06 +00:00
Alex Bradbury 71f45455e1 [RISCV] Add the RISCV target and compiler driver
As RV64 codegen has not yet been upstreamed into LLVM, we focus on RV32 driver 
support (RV64 to follow).

Differential Revision: https://reviews.llvm.org/D39963

llvm-svn: 322276
2018-01-11 13:36:56 +00:00
Petr Hosek 605d3b9225 Revert "[Driver] Update default sanitizer blacklist location"
This reverts commit r322258: broke the dfsan build.

llvm-svn: 322260
2018-01-11 07:05:38 +00:00
Petr Hosek bb9c6fc3bc Reland "[Driver] Update default sanitizer blacklist location"
This is related to moving the sanitizer blacklists to share/
subdirectory.

Differential Revision: https://reviews.llvm.org/D41706

llvm-svn: 322258
2018-01-11 06:42:12 +00:00
Petr Hosek aaf4da6c10 Revert "[Driver] Update default sanitizer blacklist location"
This reverts commit r322233: this is breaking dfsan tests.

llvm-svn: 322242
2018-01-11 00:12:02 +00:00
Petr Hosek 7e48abc764 Reland "[Driver] Update default sanitizer blacklist location"
This is related to moving the sanitizer blacklists to share/
subdirectory.

Differential Revision: https://reviews.llvm.org/D41706

llvm-svn: 322233
2018-01-10 22:59:00 +00:00
Matt Morehouse f113deaa3c [MSan] Enable use-after-dtor instrumentation by default.
Summary:
Enable the compile-time flag -fsanitize-memory-use-after-dtor by
default. Note that the run-time option MSAN_OPTIONS=poison_in_dtor=1
still needs to be enabled for destructors to be poisoned.

Reviewers: eugenis, vitalybuka, kcc

Reviewed By: eugenis, vitalybuka

Subscribers: cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D37860

llvm-svn: 322221
2018-01-10 20:27:48 +00:00
Brian Gesiak 5b60198795 [Driver] Test for correct '--version' suggestion
Summary:
The `llvm::OptTable::findNearest` bug fixed in
https://reviews.llvm.org/D41873 manifested itself as the following
erroneous message when invoking Clang:

```
clang -version
clang-6.0: error: unknown argument '-version', did you mean 'version'?
```

Add a test to catch any future regressions to the now correct behavior,
which asks "did you mean '--version'?".

Test Plan: `check-clang`

Reviewers: v.g.vassilev, teemperor, ruiu, jroelofs, yamaguchi

Reviewed By: v.g.vassilev

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D41912

llvm-svn: 322220
2018-01-10 20:23:45 +00:00
Petr Hosek 1747f3572e Revert "[Driver] Update default sanitizer blacklist location"
This reverts commit r322154 because it broke sanitizer bots.

llvm-svn: 322155
2018-01-10 02:24:09 +00:00
Petr Hosek b931670ae6 [Driver] Update default sanitizer blacklist location
This is related to moving the sanitizer blacklists to share/
subdirectory.

Differential Revision: https://reviews.llvm.org/D41706

llvm-svn: 322154
2018-01-10 02:12:24 +00:00
Ed Schouten c94f3eb0cf ananas: Add shared library support
The Ananas Operating System (https://github.com/zhmu/ananas) has shared
library support as of commit 57739c0b6ece56dd4872aedf30264ed4b9412c77.

This change adds the necessary settings to clang so that shared
executables and libraries can be build correctly.

Submitted by:	Rink Springer
Differential Revision:	https://reviews.llvm.org/D41500

llvm-svn: 322064
2018-01-09 09:18:14 +00:00
Oren Ben Simhon 57cc1a5d77 Added Control Flow Protection Flag
Cf-protection is a target independent flag that instructs the back-end to instrument control flow mechanisms like: Branch, Return, etc.
For example in X86 this flag will be used to instrument Indirect Branch Tracking instructions.

Differential Revision: https://reviews.llvm.org/D40478

Change-Id: I5126e766c0e6b84118cae0ee8a20fe78cc373dea
llvm-svn: 322063
2018-01-09 08:53:59 +00:00
Walter Lee 215284d089 [Myriad] Remove invalidated -elf flag for MoviAsm
Summary:
The flag has been deprecated, and is becoming invalid in the latest
MDK.

Reviewers: jyknight

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D41713

llvm-svn: 322023
2018-01-08 20:36:08 +00:00
Sean Eveson 5110d4f5c0 [Driver] Add flag enabling the function stack size section that was added in r319430
Adds the -fstack-size-section flag to enable the .stack_sizes section. The flag defaults to on for the PS4 triple.

Differential Revision: https://reviews.llvm.org/D40712

llvm-svn: 321992
2018-01-08 13:42:26 +00:00
Brian Gesiak 24910765e2 [Driver] Suggest correctly spelled driver options
Summary:
Depends on https://reviews.llvm.org/D41732.

Utilities such as `opt`, when invoked with arguments that are very
nearly spelled correctly, suggest the correctly spelled options:

```
bin/opt -hel
opt: Unknown command line argument '-hel'.  Try: 'bin/opt -help'
opt: Did you mean '-help'?
```

Clang, on the other hand, prior to this commit, does not:

```
bin/clang -hel
clang-6.0: error: unknown argument: '-hel'
```

This commit makes use of the new libLLVMOption API from
https://reviews.llvm.org/D41732 in order to provide correct suggestions:

```
bin/clang -hel
clang-6.0: error: unknown argument: '-hel', did you mean '-help'?
```

Test Plan: `check-clang`

Reviewers: yamaguchi, v.g.vassilev, teemperor, ruiu, bruno

Reviewed By: bruno

Subscribers: bruno, jroelofs, cfe-commits

Differential Revision: https://reviews.llvm.org/D41733

llvm-svn: 321917
2018-01-06 00:25:40 +00:00
Douglas Yung ba53ef4c46 Fix test to use -S instead of -c so it doesn't unnecessarily run the assembler.
Reviewed by Paul Robinson

llvm-svn: 321776
2018-01-04 00:16:57 +00:00
Sam McCall 296d8327a9 [Driver] Fix unused variables and test-writing-into-workdir after r321621
llvm-svn: 321639
2018-01-02 09:35:10 +00:00
Serge Pavlov 208ac6547c Enable configuration files in clang
Clang is inherently a cross compiler and can generate code for any target
enabled during build. It however requires to specify many parameters in the
invocation, which could be hardcoded during configuration process in the
case of single-target compiler. The purpose of configuration files is to
make specifying clang arguments easier.

A configuration file is a collection of driver options, which are inserted
into command line before other options specified in the clang invocation.
It groups related options together and allows specifying them in simpler,
more flexible and less error prone way than just listing the options
somewhere in build scripts. Configuration file may be thought as a "macro"
that names an option set and is expanded when the driver is called.

Use of configuration files is described in `UserManual.rst`.

Differential Revision: https://reviews.llvm.org/D24933

llvm-svn: 321621
2018-01-01 13:27:01 +00:00
Serge Pavlov 55b0747372 Reverted 321587: Enable configuration files in clang
Need to check targets in tests more carefully.

llvm-svn: 321588
2017-12-30 18:38:44 +00:00
Serge Pavlov c92ca91472 Enable configuration files in clang
Clang is inherently a cross compiler and can generate code for any target
enabled during build. It however requires to specify many parameters in the
invocation, which could be hardcoded during configuration process in the
case of single-target compiler. The purpose of configuration files is to
make specifying clang arguments easier.

A configuration file is a collection of driver options, which are inserted
into command line before other options specified in the clang invocation.
It groups related options together and allows specifying them in simpler,
more flexible and less error prone way than just listing the options
somewhere in build scripts. Configuration file may be thought as a "macro"
that names an option set and is expanded when the driver is called.

Use of configuration files is described in `UserManual.rst`.

Differential Revision: https://reviews.llvm.org/D24933

llvm-svn: 321587
2017-12-30 17:59:26 +00:00
Alex Lorenz 78df5da53d [driver][darwin] Take the OS version from -m<os>-version-min argument when
-target has no OS version

This ensures that Clang won't warn about redundant -m<os>-version-min
argument for an invocation like
`-target x86_64-apple-macos -mmacos-version-min=10.11`

llvm-svn: 321559
2017-12-29 17:42:40 +00:00
Coby Tayree a09663a5c1 [x86][icelake][vbmi2]
added vbmi2 feature recognition
added intrinsics support for vbmi2 instructions
_mm[128,256,512]_mask[z]_compress_epi[16,32]
_mm[128,256,512]_mask_compressstoreu_epi[16,32]
_mm[128,256,512]_mask[z]_expand_epi[16,32]
_mm[128,256,512]_mask[z]_expandloadu_epi[16,32]
_mm[128,256,512]_mask[z]_sh[l,r]di_epi[16,32,64]
_mm[128,256,512]_mask_sh[l,r]dv_epi[16,32,64]
matching a similar work on the backend (D40206)
Differential Revision: https://reviews.llvm.org/D41557

llvm-svn: 321487
2017-12-27 11:25:07 +00:00
Coby Tayree 3d9c88cfec [x86][icelake][vnni]
added vnni feature recognition
added intrinsics support for VNNI instructions
_mm256_mask_dpbusd_epi32
_mm256_maskz_dpbusd_epi32
_mm256_dpbusd_epi32
_mm256_mask_dpbusds_epi32
_mm256_maskz_dpbusds_epi32
_mm256_dpbusds_epi32
_mm256_mask_dpwssd_epi32
_mm256_maskz_dpwssd_epi32
_mm256_dpwssd_epi32
_mm256_mask_dpwssds_epi32
_mm256_maskz_dpwssds_epi32
_mm256_dpwssds_epi32
_mm128_mask_dpbusd_epi32
_mm128_maskz_dpbusd_epi32
_mm128_dpbusd_epi32
_mm128_mask_dpbusds_epi32
_mm128_maskz_dpbusds_epi32
_mm128_dpbusds_epi32
_mm128_mask_dpwssd_epi32
_mm128_maskz_dpwssd_epi32
_mm128_dpwssd_epi32
_mm128_mask_dpwssds_epi32
_mm128_maskz_dpwssds_epi32
_mm128_dpwssds_epi32
_mm512_mask_dpbusd_epi32
_mm512_maskz_dpbusd_epi32
_mm512_dpbusd_epi32
_mm512_mask_dpbusds_epi32
_mm512_maskz_dpbusds_epi32
_mm512_dpbusds_epi32
_mm512_mask_dpwssd_epi32
_mm512_maskz_dpwssd_epi32
_mm512_dpwssd_epi32
_mm512_mask_dpwssds_epi32
_mm512_maskz_dpwssds_epi32
_mm512_dpwssds_epi32
matching a similar work on the backend (D40208)
Differential Revision: https://reviews.llvm.org/D41558

llvm-svn: 321484
2017-12-27 10:37:51 +00:00
Coby Tayree 2268576fa0 [x86][icelake][bitalg]
added bitalg feature recognition
added intrinsics support for bitalg instructions
_mm512_popcnt_epi16
_mm512_mask_popcnt_epi16
_mm512_maskz_popcnt_epi16
_mm512_popcnt_epi8
_mm512_mask_popcnt_epi8
_mm512_maskz_popcnt_epi8
_mm512_mask_bitshuffle_epi64_mask
_mm512_bitshuffle_epi64_mask
_mm256_popcnt_epi16
_mm256_mask_popcnt_epi16
_mm256_maskz_popcnt_epi16
_mm128_popcnt_epi16
_mm128_mask_popcnt_epi16
_mm128_maskz_popcnt_epi16
_mm256_popcnt_epi8
_mm256_mask_popcnt_epi8
_mm256_maskz_popcnt_epi8
_mm128_popcnt_epi8
_mm128_mask_popcnt_epi8
_mm128_maskz_popcnt_epi8
_mm256_mask_bitshuffle_epi32_mask
_mm256_bitshuffle_epi32_mask
_mm128_mask_bitshuffle_epi16_mask
_mm128_bitshuffle_epi16_mask
matching a similar work on the backend (D40222)
Differential Revision: https://reviews.llvm.org/D41564

llvm-svn: 321483
2017-12-27 10:01:00 +00:00
Coby Tayree f72630bb9b [hotfix]
fixinig test failures as seen here:
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/22791/steps/test/logs/stdio
which resulted by rL321480

llvm-svn: 321482
2017-12-27 09:22:34 +00:00
Coby Tayree cf96c876c6 [x86][icelake][vpclmulqdq]
added vpclmulqdq feature recognition
added intrinsics support for vpclmulqdq instructions
  _mm256_clmulepi64_epi128
  _mm512_clmulepi64_epi128
matching a similar work on the backend (D40101)
Differential Revision: https://reviews.llvm.org/D41573

llvm-svn: 321480
2017-12-27 09:00:31 +00:00
Coby Tayree f4811ebc39 [x86][icelake][gfni]
added gfni feature recognition
added intrinsics support for gfni instructions
  _mm_gf2p8affineinv_epi64_epi8
  _mm_mask_gf2p8affineinv_epi64_epi8
  _mm_maskz_gf2p8affineinv_epi64_epi8
  _mm256_gf2p8affineinv_epi64_epi8
  _mm256_mask_gf2p8affineinv_epi64_epi8
  _mm256_maskz_gf2p8affineinv_epi64_epi8
  _mm512_gf2p8affineinv_epi64_epi8
  _mm512_mask_gf2p8affineinv_epi64_epi8
  _mm512_maskz_gf2p8affineinv_epi64_epi8
  _mm_gf2p8affine_epi64_epi8
  _mm_mask_gf2p8affine_epi64_epi8
  _mm_maskz_gf2p8affine_epi64_epi8
  _mm256_gf2p8affine_epi64_epi8
  _mm256_mask_gf2p8affine_epi64_epi8
  _mm256_maskz_gf2p8affine_epi64_epi8
  _mm512_gf2p8affine_epi64_epi8
  _mm512_mask_gf2p8affine_epi64_epi8
  _mm512_maskz_gf2p8affine_epi64_epi8
  _mm_gf2p8mul_epi8
  _mm_mask_gf2p8mul_epi8
  _mm_maskz_gf2p8mul_epi8
  _mm256_gf2p8mul_epi8
  _mm256_mask_gf2p8mul_epi8
  _mm256_maskz_gf2p8mul_epi8
  _mm512_gf2p8mul_epi8
  _mm512_mask_gf2p8mul_epi8
  _mm512_maskz_gf2p8mul_epi8
matching a similar work on the backend (D40373)
Differential Revision: https://reviews.llvm.org/D41582

llvm-svn: 321477
2017-12-27 08:37:47 +00:00
Coby Tayree a1e5f0c339 [x86][icelake][vaes]
added vaes feature recognition
added intrinsics support for vaes instructions, matching a similar work on the backend (D40078)
  _mm256_aesenc_epi128
  _mm512_aesenc_epi128
  _mm256_aesenclast_epi128
  _mm512_aesenclast_epi128
  _mm256_aesdec_epi128
  _mm512_aesdec_epi128
  _mm256_aesdeclast_epi128
  _mm512_aesdeclast_epi128

llvm-svn: 321474
2017-12-27 08:16:54 +00:00
Petr Hosek 37ae5afb25 [scudo] Add -fsanitize=scudo option to Fuchsia
Apparently the -fsanitize flag hadn't been added for Scudo upstream yet.

Patch By: flowerhack

Reviewers: cryptoad, alekseyshl, mcgrathr, phosek

Reviewed By: mcgrathr, phosek

Differential Revision: https://reviews.llvm.org/D41413

llvm-svn: 321314
2017-12-21 22:04:31 +00:00
Vedant Kumar fae4f7c681 [Driver] Ensure no overlap between trapping & recoverable sanitizers. NFC.
This is NFC because in EmitCheck(), -fsanitize-trap=X overrides
-fsanitize-recover=X.

llvm-svn: 321230
2017-12-21 00:10:24 +00:00
Alex Lorenz cdb5240287 [darwin][driver] Warn about mismatching -<os>-version-min rather than
superfluous -<os>-version-min compiler option

rdar://35813850

Differential Revision: https://reviews.llvm.org/D41425

llvm-svn: 321145
2017-12-20 02:31:30 +00:00
Alex Lorenz 91f9cfcde9 [driver][darwin] Set the 'simulator' environment when it's specified
in '-target'

rdar://35742458

Differential Revision: https://reviews.llvm.org/D41076

llvm-svn: 321102
2017-12-19 19:56:14 +00:00