Commit Graph

416698 Commits

Author SHA1 Message Date
Aaron Ballman 2ceee2f884 Add -Wno-strict-prototypes to C tests; NFC
This patch adds -Wno-strict-prototypes to all of the test cases that
use functions without prototypes, but not as the primary concern of the
test. e.g., attributes testing whether they can/cannot be applied to a
function without a prototype, etc.

This is done in preparation for enabling -Wstrict-prototypes by
default.
2022-02-24 15:30:30 -05:00
Aaron Ballman 1c2558021c Use functions with prototypes when appropriate; NFC
A significant number of our tests in C accidentally use functions
without prototypes. This patch converts the function signatures to have
a prototype for the situations where the test is not specific to K&R C
declarations. e.g.,

  void func();

becomes

  void func(void);

This is the final batch of tests being updated to add prototypes,
hopefully.
2022-02-24 15:30:13 -05:00
Valentin Clement f9704f0cfb
[flang] Simple array assignment lowering
This patch handles lowering of simple array assignment.

```
a(:) = 10
```

or

```
a(1) = 1
```

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: PeteSteinfeld, schweitz

Differential Revision: https://reviews.llvm.org/D120501

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2022-02-24 21:23:30 +01:00
Jay Foad 05d79e3562 [AMDGPU] Divergence-driven instruction selection for bitreverse
Differential Revision: https://reviews.llvm.org/D119702
2022-02-24 20:21:59 +00:00
Fangrui Song 15617cdb55 [ELF] Simplify --fortran-common. NFC 2022-02-24 12:21:40 -08:00
Fangrui Song 4129890dd8 [ELF] De-template Symbol::resolveLazy. NFC 2022-02-24 12:20:05 -08:00
Damian Rouson f3c9a52519 [flang] add semantics tests for sync team
Test a range of acceptable forms of SYNC TEAM statements,
including combinations with and without the stat-variable
and errmsg-variable present.  Also test that several invalid
forms of SYNC TEAM call generate the correct error messages.

Differential Revision: https://reviews.llvm.org/D120099
2022-02-24 12:11:49 -08:00
Alexey Bataev ca6fa71b7e Revert "[OPENMP]Fix PR50347: Mapping of global scope deep object fails."
This reverts commit 638938117a. Need to
fix reported fail https://lab.llvm.org/buildbot/#/builders/193/builds/7496
2022-02-24 12:04:39 -08:00
Alexey Bataev 638938117a [OPENMP]Fix PR50347: Mapping of global scope deep object fails.
Changed the we handle llvm::Constants in sizes arrays. ConstExprs and
GlobalValues cannot be used as initializers, need to put them at the
runtime, otherwise there wight be the compilation errors.

Differential Revision: https://reviews.llvm.org/D105297
2022-02-24 11:49:14 -08:00
Yuanfang Chen 140c13d318 [CMake][WinMsvc] Replace MSVC_BASE/WINSDK_BASE with LLVM_WINSYSROOT
- Using LLVM_WINSYSROOT would pick up DIA SDK path automatically,
  otherwise llvm-pdbutil has no DIA support.
- Add MSVC_VER to specify VC tools version.
- Make MSVC_VER/WINSDK_VER optional. If not specified, use the highest
  version number like the driver does.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D117852
2022-02-24 11:47:22 -08:00
Simon Pilgrim 370ebc9d9a [DAG] Attempt to fold bswap(shl(x,c)) -> zext(bswap(trunc(shl(x,c-bw/2))))
If the shl is at least half the bitwidth (i.e. the lower half of the bswap source is zero), then we can reduce the shift and perform the bswap at half the bitwidth and just zero extend.

Based off PR51391 + PR53867

Differential Revision: https://reviews.llvm.org/D120192
2022-02-24 19:33:51 +00:00
David Green b3e9fdd170 [AArch64] Regenerate dp1.ll test, NFC
The old check lines were not showing enough congtext to show issues.
Regenerate the test with theua auto-check lines to be clearer.
2022-02-24 19:33:45 +00:00
Fangrui Song 5bc4e15c6e [ELF] Set config->exportDynamic to true if config->shared. NFC 2022-02-24 11:31:58 -08:00
Stanislav Mekhanoshin 3279e44063 [AMDGPU] Extend SILoadStoreOptimizer to handle global stores
TODO: merge flat load/stores.
TODO: merge flat with global promoting to flat.

Differential Revision: https://reviews.llvm.org/D120346
2022-02-24 11:09:51 -08:00
Damian Rouson 95fd0dbaf0 [flang] add semantics test for sync memory
Test a range of acceptable forms of SYNC MEMORY statements,
including combinations with and without the stat-variable
and errmsg-variable present.  Also test that several invalid
forms of SYNC MEMORY call generate the correct error messages.

Differential Revision: https://reviews.llvm.org/D120097
2022-02-24 11:04:00 -08:00
Momchil Velikov 17e85cd410 [AArch64] Async unwind - Always place the first LDP at the end when ReverseCSRRestoreSeq is true
This patch is in preparation for the async unwind CFI.

Put the first `LDP` the end, so that the load-store optimizer can run
and merge the `LDP` and the `ADD` into a post-index `LDP`.

Do this always and as early as at the time of the initial creation of
the CSR restore instructions, even if that `LDP` is not guaranteed to
be mergeable with a subsequent `SP` increment.

This greatly simplifies the CFI generation for prologue, as otherwise
we have to take extra steps to ensure reordering does not cross CFI
instructions.

Reviewed By: danielkiss

Differential Revision: https://reviews.llvm.org/D112328
2022-02-24 18:48:07 +00:00
Stanislav Mekhanoshin cefa1c5ca9 [AMDGPU] Fix combined MMO in load-store merge
Loads and stores can be out of order in the SILoadStoreOptimizer.
When combining MachineMemOperands of two instructions operands are
sent in the IR order into the combineKnownAdjacentMMOs. At the
moment it picks the first operand and just replaces its offset and
size. This essentially loses alignment information and may generally
result in an incorrect base pointer to be used.

Use a base pointer in memory addresses order instead and only adjust
size.

Differential Revision: https://reviews.llvm.org/D120370
2022-02-24 10:47:57 -08:00
Amir Ayupov e38fc14c43 [X86] Introduce x86-cmov-converter-force-all
Introduce an option to expand all CMOV groups into hammocks, matching GCC's
`-fno-if-conversion2` flag. The motivation is to leave CMOV conversion
opportunities to a binary optimizer that can make the decision based on branch
misprediction rate (available e.g. in Intel's LBR).

Reviewed By: MaskRay, skan

Differential Revision: https://reviews.llvm.org/D119777
2022-02-24 10:47:22 -08:00
Benjamin Kramer dc7a624e38 [tblgen] Compress CompositeSequences to 1/8th of its size. NFCI. 2022-02-24 19:31:33 +01:00
Craig Topper 2aa1c6fca1 [RISCV] Add Zbb RUN lines to neg-abs.ll. 2022-02-24 10:21:10 -08:00
Momchil Velikov 25e92920c9 [AArch64] Async unwind - helper functions to decide on CFI emission
Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D112327
2022-02-24 18:16:50 +00:00
Fangrui Song ecff9b65b5 [analyzer] Just use default capture after 7fd60ee6e0 2022-02-24 10:06:11 -08:00
Thomas Raoux b1357fe618 [mlir][memref] Add transformation to do loop multi-buffering
This transformation is useful to break dependency between consecutive loop
iterations by increasing the size of a temporary buffer. This is usually
combined with heavy software pipelining.

Differential Revision: https://reviews.llvm.org/D119406
2022-02-24 09:41:21 -08:00
Craig Topper f69078b77f [RISCV] Update some tests to use floating point ABI where it makes sense.
Trying to reduce the diffs from D118333 for cases where it makes
more sense to use an FP ABI.

Reviewed By: asb, kito-cheng

Differential Revision: https://reviews.llvm.org/D120447
2022-02-24 09:27:57 -08:00
Momchil Velikov fd7e59f0e7 [AArch64] Async unwind - do not schedule frame setup/destroy
The PostRA scheduler can reorder non-CFI instructions in a way that
makes the unwind info not instruction precise.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D112326
2022-02-24 17:24:04 +00:00
Craig Topper a975ca97c3 [RISCV] Fold (sext_inreg (fmv_x_anyexth X), i16) -> (fmv_x_signexth X).
Add a new ISD opcode to represent the sign extending behavior of
vmv.x.h. Keep the previous anyext opcode to allow the existing
(fmv_x_anyexth (fmv_h_x X)) combine to keep working without needing
to generate a sign extend.

For fmv.x.w we are able to match the sext_inreg in an isel pattern,
but a 16-bit sext_inreg is lowered to a shift pair before isel. This
seemed like a larger match than we should do in isel.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D118974
2022-02-24 09:19:01 -08:00
Valentin Clement 2a59ead118
[flang] Lower allocatable assignment for scalar
Add lowering for simple assignement on allocatable
scalars.

This patch is part of the upstreaming effort from fir-dev branch.

Depends on D120483

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D120488

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
2022-02-24 18:13:18 +01:00
Stanislav Gatev baa0f221d6 [clang][dataflow] Update StructValue child when assigning a value
When assigning a value to a storage location of a struct member we
need to also update the value in the corresponding `StructValue`.

This is part of the implementation of the dataflow analysis framework.
See "[RFC] A dataflow analysis framework for Clang AST" on cfe-dev.

Reviewed-by: ymandel, xazax.hun

Differential Revision: https://reviews.llvm.org/D120414
2022-02-24 16:41:48 +00:00
Sven van Haastregt ba18c360b2 [clang-tidy] Remove opencl-c.h inclusion from tests
After D120254 some clang-tidy tests started failing on release builds.

clang-tidy has been using the `-fdeclare-opencl-builtins` functionality
since this became the default in clang, so there is no need to include
`opencl-c.h`.

Differential Revision: https://reviews.llvm.org/D120470
2022-02-24 16:28:52 +00:00
Sanjay Patel 4a3708cd6b [SDAG] remove shift that is redundant with part of funnel shift
This is the SDAG translation of D120253 :
https://alive2.llvm.org/ce/z/qHpmNn

The SDAG nodes can have different operand types than the result value.
We can see an example of that with AArch64 - the funnel shift amount
is an i64 rather than i32.

We may need to make that match even more flexible to handle
post-legalization nodes, but I have not stepped into that yet.

Differential Revision: https://reviews.llvm.org/D120264
2022-02-24 11:25:46 -05:00
Valentin Clement 914061bbcf
[flang] Handle allocatable dummy arguments
This patch handles allocatable dummy argument lowering
in function and subroutines.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D120483

Co-authored-by: Jean Perier <jperier@nvidia.com>
2022-02-24 17:16:55 +01:00
Anton Korobeynikov 64cc8b2756 Disable Mailgun click tracking 2022-02-24 19:03:43 +03:00
Aaron Ballman 003924963f Remove useless RUN lines in the middle of the file and pipe to FileCheck; NFC 2022-02-24 11:01:33 -05:00
Joseph Huber 7aef8b3754 [OpenMP] Make section variable external to prevent collisions
Summary:
We use a section to embed offloading code into the host for later
linking. This is normally unique to the translation unit as it is thrown
away during linking. However, if the user performs a relocatable link
the sections will be merged and we won't be able to access the files
stored inside. This patch changes the section variables to have external
linkage and a name defined by the section name, so if two sections are
combined during linking we get an error.
2022-02-24 10:57:09 -05:00
Sanjay Patel 5379f76e63 [InstCombine] try harder to preserve 'nsz' in fneg-of-select transform
The corner case where 'nsz' needs to be removed is very narrow
as discussed here:
https://reviews.llvm.org/rG3cdd05e519dd

If the select condition is not undef, there's no problem with
propagating 'nsz':
https://alive2.llvm.org/ce/z/4GWJdq
2022-02-24 10:43:53 -05:00
Sanjay Patel 788b08a58c [InstCombine] add test for fneg of select with FMF; NFC 2022-02-24 10:42:25 -05:00
Jay Foad 719bac55df [MIRParser] Diagnose too large align values in MachineMemOperands
When parsing MachineMemOperands, MIRParser treated the "align" keyword
the same as "basealign". Really "basealign" should specify the
alignment of the MachinePointerInfo base value, and "align" should
specify the alignment of that base value plus the offset.

This worked OK when the specified alignment was no larger than the
alignment of the offset, but in cases like this it just caused
confusion:

    STW killed %18, 4, %stack.1.ap2.i.i :: (store (s32) into %stack.1.ap2.i.i + 4, align 8)

MIRPrinter would never have printed this, with an offset of 4 but an
align of 8, so it must have been written by hand. MIRParser would
interpret "align 8" as "basealign 8", but I think it is better to give
an error and force the user to write "basealign 8" if that is what they
really meant.

Differential Revision: https://reviews.llvm.org/D120400

Change-Id: I7eeeefc55c2df3554ba8d89f8809a2f45ada32d8
2022-02-24 15:32:08 +00:00
Marius Brehler 1fa1251116 [mlir][emitc] Add a variable op
This adds a variable op, emitted as C/C++ locale variable, which can be
used if the `emitc.constant` op is not sufficient.

As an example, the canonicalization pass would transform
```mlir
%0 = "emitc.constant"() {value = 0 : i32} : () -> i32
%1 = "emitc.constant"() {value = 0 : i32} : () -> i32
%2 = emitc.apply "&"(%0) : (i32) -> !emitc.ptr<i32>
%3 = emitc.apply "&"(%1) : (i32) -> !emitc.ptr<i32>
emitc.call "write"(%2, %3) : (!emitc.ptr<i32>, !emitc.ptr<i32>) -> ()
```
into
```mlir
%0 = "emitc.constant"() {value = 0 : i32} : () -> i32
%1 = emitc.apply "&"(%0) : (i32) -> !emitc.ptr<i32>
%2 = emitc.apply "&"(%0) : (i32) -> !emitc.ptr<i32>
emitc.call "write"(%1, %2) : (!emitc.ptr<i32>, !emitc.ptr<i32>) -> ()
```
resulting in pointer aliasing, as %1 and %2 point to the same address.
In such a case, the `emitc.variable` operation can be used instead.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D120098
2022-02-24 15:25:21 +00:00
Corentin Jabot 70b1f6de53 [clang] Warn on unqualified calls to std::move and std::forward
This adds a diagnostic when an unqualified call is resolved
to std::move or std::forward.

This follows some C++ committee discussions where some
people where concerns that this might be an usual anti pattern
particularly britle worth warning about - both because move
is a common name and because these functions accept any values.

This warns inconditionnally of whether the current context is in
std:: or not, as implementations probably want to always qualify
these calls too, to avoid triggering adl accidentally.

Differential Revision: https://reviews.llvm.org/D119670
2022-02-24 07:23:39 -08:00
Sven van Haastregt 28cdcf8e3c [OpenCL] Handle TypeExtensions in OpenCLBuiltinFileEmitter
Until now, any types that had TypeExtensions attached to them were not
guarded with those extensions.  Extend the OpenCLBuiltinFileEmitter
such that all required extensions are emitted for the types of a
builtin function.

The `clang-tblgen -gen-clang-opencl-builtin-tests` emitter will now
produce e.g.:

  #if defined(cl_khr_fp16) && defined(cl_khr_fp64)
  half8 test11802_convert_half8_rtp(double8 arg1) {
    return convert_half8_rtp(arg1);
  }
  #endif // TypeExtension

Differential Revision: https://reviews.llvm.org/D120262
2022-02-24 15:17:24 +00:00
Florian Hahn 5910150140
[AArch64] Simplify and extend tests added in 0c5ea01b20. 2022-02-24 14:51:43 +00:00
Simon Pilgrim a636801a36 [X86] LowerRotate - enable v8i16 ROTL/ROTR on all pre-SSE41 targets
We're still better off expanding this once we have PMOVZX
2022-02-24 14:14:08 +00:00
Simon Pilgrim 0ea50bee83 [X86] SimplifyDemandedVectorEltsForTargetNode - add X86ISD::ANDNP handling 2022-02-24 13:51:51 +00:00
Shraiysh Vaishay f9fbaabe0f [mlir][OpenMP][NFC] Remove unused binary operator enum
This patch removes binary operator enum which was introduced with `omp.atomic.update`. Now the update operation handles update in a region so this is no longer required.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D120458
2022-02-24 19:06:10 +05:30
Benjamin Kramer 1e396affca [Symbolizer] Move ctor/dtor into .cpp file
On some standard library configurations these have a dependency on the
complete type of SymbolizableModule. They also do a lot of
copying/freeing so no point in inlining them.
2022-02-24 14:20:15 +01:00
Alex Zinenko 5146067578 [mlir] Document creation of Python bindings for a dialect
Documentation exists about the details of the API but is missing a
description of the overall structure per dialect.

Reviewed By: shabalin

Differential Revision: https://reviews.llvm.org/D117002
2022-02-24 14:18:56 +01:00
Benjamin Kramer 92cf9f1481 [mlir][linalg] Cast back to the original type after making linalg.generic outputs more static
This codepath was entirely untested.

Differential Revision: https://reviews.llvm.org/D120473
2022-02-24 13:35:54 +01:00
Roman Lebedev 67388b0013
[NFC][SROA] Update tests for D113520 2022-02-24 15:31:12 +03:00
serge-sans-paille fc97efa409 Cleanup includes: ProfileData
Estimation of the impact on preprocessor output:

before: 1067349756
after: 1065940348

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D120434
2022-02-24 13:25:11 +01:00
serge-sans-paille db29f4374d Cleanup include: DebugInfo/Symbolize
Estimation of the impact on preprocessor output
after: 1067349756
before:1067487786

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D120433
2022-02-24 13:25:11 +01:00