maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
233,156 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

3 Commits

Author SHA1 Message Date
Amjad Aboud f29608265d Fixed the callee saved registers list for X86 AllRegs calling convention. 
32-bit AllRegs:
SSE: xmm0-xmm7
AVX: ymm0-ymm7
AVX512: zmm0-zmm7 + k0-k7

64-bit AllRegs:
SSE: xmm0-xmm15
AVX: ymm0-ymm15
AVX512: zmm0-zmm31 + k0-k7

Differential Revision: http://reviews.llvm.org/D20142

llvm-svn: 269337
 2016-05-12 19:58:32 +00:00
Craig Topper 3fef1de785 [X86] Update X86_INTR calling convention to save ZMM registers instead of YMM registers when AVX512 is enabled. 
llvm-svn: 269017
 2016-05-10 05:27:56 +00:00
Quentin Colombet ee5f36bd54 [X86][AVX512] Use the proper load/store for AVX512 registers. 
When loading or storing AVX512 registers we were not using the AVX512
variant of the load and store for VR128 and VR256 like registers.
Thus, we ended up with the wrong encoding and actually were dropping the
high bits of the instruction. The result was that we load or store the
wrong register. The effect is visible only when we emit the object file
directly and disassemble it. Then, the output of the disassembler does
not match the assembly input.

This is related to llvm.org/PR27481.

llvm-svn: 269001
 2016-05-10 01:09:14 +00:00