Commit Graph

162432 Commits

Author SHA1 Message Date
Andrea Di Biagio efc3f39f02 [documentation][llvm-mca] Update the documentation.
Scheduling models can now describe processor register files and retire control
units. This updates the existing documentation and the README file.

llvm-svn: 329311
2018-04-05 16:42:32 +00:00
Craig Topper 6ecdb03f16 [X86] Use WriteFShuffle256 for VEXTRACTF128 to be consistent with VEXTRACTI128 which uses WriteShuffle256.
llvm-svn: 329310
2018-04-05 16:32:48 +00:00
Philip Pfaffe 7b7637b9eb Fix r329293: Add a missing CMake dependency
The unittest plugin indirectly includes Attributes.gen, so make sure its
target depends on the appropriate tablegen target.

llvm-svn: 329308
2018-04-05 15:58:27 +00:00
Andrea Di Biagio 9730bb8dd8 Fix the buildbots after r329304.
llvm-svn: 329306
2018-04-05 15:53:31 +00:00
Andrea Di Biagio c74ad502ce [MC][Tablegen] Allow models to describe the retire control unit for llvm-mca.
This patch adds the ability to describe properties of the hardware retire
control unit.

Tablegen class RetireControlUnit has been added for this purpose (see
TargetSchedule.td).

A RetireControlUnit specifies the size of the reorder buffer, as well as the
maximum number of opcodes that can be retired every cycle.

A zero (or negative) value for the reorder buffer size means: "the size is
unknown". If the size is unknown, then llvm-mca defaults it to the value of
field SchedMachineModel::MicroOpBufferSize.  A zero or negative number of
opcodes retired per cycle means: "there is no restriction on the number of
instructions that can be retired every cycle".

Models can optionally specify an instance of RetireControlUnit. There can only
be up-to one RetireControlUnit definition per scheduling model.

Information related to the RCU (RetireControlUnit) is stored in (two new fields
of) MCExtraProcessorInfo.  llvm-mca loads that information when it initializes
the DispatchUnit / RetireControlUnit (see Dispatch.h/Dispatch.cpp).

This patch fixes PR36661.

Differential Revision: https://reviews.llvm.org/D45259

llvm-svn: 329304
2018-04-05 15:41:41 +00:00
Sanjay Patel 2204520e49 [PatternMatch] define m_FNeg using m_FSub
Using cstfp_pred_ty in the definition allows us to match vectors with undef elements.

This replicates the change for m_Not from D44076 / rL326823 and continues
towards making all pattern matchers allow undef elements in vectors.

llvm-svn: 329303
2018-04-05 15:36:55 +00:00
Hiroshi Inoue bbf98aea83 [PowerPC] fix assertion failure due to missing instruction in P9InstrResources.td
This patch adds L(W|H|B)ZXTLS_32 instructions introduced by https://reviews.llvm.org/rL327635 in P9InstrResources.td.

llvm-svn: 329299
2018-04-05 15:27:06 +00:00
Sanjay Patel 2eaa2a43f8 [InstCombine] add vector and vector undef tests for FP folds; NFC
llvm-svn: 329294
2018-04-05 15:07:35 +00:00
Philip Pfaffe 131fb978b0 Re-land r329273: [Plugins] Add a slim plugin API to work together with the new PM
Fix unittest: Do not link LLVM into the test plugin.
Additionally, remove an unrelated change that slipped in in r329273.

llvm-svn: 329293
2018-04-05 15:04:13 +00:00
Pavel Labath 510725c2d6 [Testing/Support]: Better matching of Error failure states
Summary:
The existing Failed() matcher only allowed asserting that the operation
failed, but it was not possible to verify any details of the returned
error.

This patch adds two new matchers, which make this possible:
- Failed<InfoT>() verifies that the operation failed with a single error
  of a given type.
- Failed<InfoT>(M) additionally check that the contained error info
  object is matched by the nested matcher M.

To make these work, I've changed the implementation of the ErrorHolder
class. Now, instead of just storing the string representation of the
Error, it fetches the ErrorInfo objects and stores then as a list of
shared pointers. This way, ErrorHolder remains copyable, while still
retaining the full information contained in the Error object.

In case the Error object contains two or more errors, the new matchers
will fail to match, instead of trying to match all (or any) of the
individual ErrorInfo objects. This seemed to be the most sensible
behavior for when one wants to match exact error details, but I could be
convinced otherwise...

Reviewers: zturner, lhames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44925

llvm-svn: 329288
2018-04-05 14:32:10 +00:00
Tim Northover b30388bf11 ARM: Do not spill CSR to stack on entry to noreturn functions
A noreturn nounwind function can be expected to never return in any way, and by
never returning it will also never have to restore any callee-saved registers
for its caller. This makes it possible to skip spills of those registers during
function entry, saving some stack space and time in the process. This is rather
useful for embedded targets with limited stack space.

Should fix PR9970.

Patch by myeisha (pmb).

llvm-svn: 329287
2018-04-05 14:26:06 +00:00
Krzysztof Parzyszek 62c4805c1f [Hexagon] Remove default values from lambda parameters
llvm-svn: 329286
2018-04-05 14:25:52 +00:00
Brian Gesiak 0629107305 [Lexicon] Add "ICE", internal compiler error
Test Plan:
1. `ninja docs-llvm-html`
2. Confirm that the rendered docs HTML contains the new "ICE" entry

llvm-svn: 329285
2018-04-05 14:08:16 +00:00
Andrea Di Biagio 8fd4be3ecc [MC] Fix spaces between values printed by EmitRegisterFileInfo.
llvm-svn: 329284
2018-04-05 13:59:52 +00:00
Sam Parker 0e7deb8104 [DAGCombine] Revert r329160
Again, broke the big endian stage 2 builders.

llvm-svn: 329283
2018-04-05 13:46:17 +00:00
Sanjay Patel 236442e063 [InstCombine] cleanup; NFC
llvm-svn: 329282
2018-04-05 13:24:26 +00:00
Simon Pilgrim 1d793b8ac5 [SchedModel] Complete models shouldn't match against itineraries when they don't use them (PR35639)
For schedule models that don't use itineraries, checkCompleteness still checks that an instruction has a matching itinerary instead of skipping and going straight to matching the InstRWs. That doesn't seem to match what happens in TargetSchedule.cpp

This patch causes problems for a number of models that had been incorrectly flagged as complete.

Differential Revision: https://reviews.llvm.org/D43235

llvm-svn: 329280
2018-04-05 13:11:36 +00:00
Florian Hahn 8eda4b0dc0 [LoopInterchange] Require asserts for test using -stats (NFC)
This fixes a buildbot failure.

llvm-svn: 329279
2018-04-05 13:07:39 +00:00
Alexander Kornienko 94d9c391b6 Minor fix in docs.
llvm-svn: 329277
2018-04-05 12:48:22 +00:00
Philip Pfaffe e6b49ef286 Revert "[Plugins] Add a slim plugin API to work together with the new PM"
This reverts commit ecf3ba1ab45edb1b0fadce716a7facf50dca4fbb/r329273.

llvm-svn: 329276
2018-04-05 12:42:12 +00:00
Andrea Di Biagio 020ba253d8 [llvm-mca] Remove flag -max-retire-per-cycle, and update the docs.
This is done in preparation for D45259.
With D45259, models can specify the size of the reorder buffer, and the retire
throughput directly via tablegen.

llvm-svn: 329274
2018-04-05 11:36:50 +00:00
Philip Pfaffe e8f3ae9da0 [Plugins] Add a slim plugin API to work together with the new PM
Summary:
Add a new plugin API. This closes the gap between pass registration and out-of-tree passes for the new PassManager.

Unlike with the existing API, interaction with a plugin is always
initiated from the tools perspective. I.e., when a plugin is loaded, it
resolves and calls a well-known symbol `llvmGetPassPluginInfo` to obtain
details about the plugin. The fundamental motivation is to get rid of as
many global constructors as possible.  The API exposed by the plugin
info is kept intentionally minimal.

Reviewers: chandlerc

Reviewed By: chandlerc

Subscribers: bollu, grosser, lksbhm, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D35258

llvm-svn: 329273
2018-04-05 11:29:37 +00:00
Simon Pilgrim 8296229826 [UpdateTestChecks] Moved core functionality of add_asm_checks into add_checks
As discussed on D45272

llvm-svn: 329270
2018-04-05 10:48:38 +00:00
Florian Hahn 6e0043365b [LoopInterchange] Add stats counter for number of interchanged loops.
Reviewers: samparker, karthikthecool, blitz.opensource

Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D45209

llvm-svn: 329269
2018-04-05 10:39:23 +00:00
Simon Dardis 47e66335ec [mips] Regenerate test before posting patch for constant multiplication (NFC)
llvm-svn: 329268
2018-04-05 10:30:17 +00:00
Fedor Sergeev d29884c7e6 allow custom OptBisect classes set to LLVMContext
This patch introduces a way to set custom OptPassGate instances to LLVMContext.
A new instance field OptBisector and a new method setOptBisect() are added
to the LLVMContext classes. These changes allow to set a custom OptBisect class
that can make its own decisions on skipping optional passes.

Another important feature of this change is ability to set different instances
of OptPassGate to different LLVMContexts. So the different contexts can be used
independently in several compiling threads of one process.

One unit test is added.

Patch by Yevgeny Rouban.

Reviewers: andrew.w.kaylor, fedor.sergeev, vsk, dberlin, Eugene.Zelenko, reames, skatkov
Reviewed By: andrew.w.kaylor, fedor.sergeev
Differential Revision: https://reviews.llvm.org/D44464

llvm-svn: 329267
2018-04-05 10:29:37 +00:00
Simon Pilgrim 978502f475 [UpdateTestChecks] Split core functionality of add_ir_checks into add_checks
Cherry picked from D45272, also added some setup for add_asm_checks to use add_checks as well.

llvm-svn: 329266
2018-04-05 10:26:13 +00:00
Simon Pilgrim 702ec04fee [UpdateTestChecks] Make add_asm_checks more like add_ir_checks
Towards merging them as mentioned on D45272

llvm-svn: 329265
2018-04-05 09:50:58 +00:00
Florian Hahn 831a757728 [LoopInterchange] Preserve LoopInfo after interchanging.
LoopInterchange relies on LoopInfo being up-to-date, so we should
preserve it after interchanging. This patch updates restructureLoops to
move the BBs of the interchanged loops to the right place.

Reviewers: davide, efriedma, karthikthecool, mcrosier

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D45278

llvm-svn: 329264
2018-04-05 09:48:45 +00:00
Simon Pilgrim abba04886e [UpdateTestChecks] Remove unnecessary return from add_ir_checks
llvm-svn: 329262
2018-04-05 09:30:42 +00:00
Clement Courbet 47acf31e67 [llvm-exegesis] Check for libpfm headers.
HAVE_LIBPFM is only defined if the libpfm headers are present.

llvm-svn: 329261
2018-04-05 07:35:28 +00:00
Puyan Lotfi 8afc99363b [MIR-Canon] Fixing warnings in Non-assert builds.
llvm-svn: 329258
2018-04-05 06:56:44 +00:00
Clement Courbet 2ed9a35b20 [llvm-exegesis] Suppress a warning.
llvm-svn: 329257
2018-04-05 05:57:23 +00:00
Craig Topper 15303dda0d [X86] Revert r329251-329254
It's failing on the bots and I'm not sure why.

This reverts:

[X86] Synchronize the SchedRW on some EVEX instructions with their VEX equivalents.
[X86] Use WriteFShuffle256 for VEXTRACTF128 to be consistent with VEXTRACTI128 which uses WriteShuffle256.
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
[X86] Auto-generate complete checks. NFC

llvm-svn: 329256
2018-04-05 05:19:36 +00:00
Craig Topper 25c7110a37 [X86] Synchronize the SchedRW on some EVEX instructions with their VEX equivalents.
Mostly vector load, store, and move instructions.

llvm-svn: 329254
2018-04-05 04:42:03 +00:00
Craig Topper 4b1fdd4921 [X86] Use WriteFShuffle256 for VEXTRACTF128 to be consistent with VEXTRACTI128 which uses WriteShuffle256.
llvm-svn: 329253
2018-04-05 04:42:02 +00:00
Craig Topper 6c4e08c835 [X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
We were forcing the latency of these instructions to 5 cycles, but every other scheduler model had them as 1 cycle. I'm sure I didn't get everything, but this gets a big portion.

llvm-svn: 329252
2018-04-05 04:42:01 +00:00
Craig Topper 5c36557426 [X86] Auto-generate complete checks. NFC
llvm-svn: 329251
2018-04-05 04:41:59 +00:00
Taewook Oh e0db533feb [CallSiteSplitting] Do not perform callsite splitting inside landing pad
Summary:
If the callsite is inside landing pad, do not perform callsite splitting.

Callsite splitting uses utility function llvm::DuplicateInstructionsInSplitBetween, which eventually calls llvm::SplitEdge. llvm::SplitEdge calls llvm::SplitCriticalEdge with an assumption that the function returns nullptr only when the target edge is not a critical edge (and further assumes that if the return value was not nullptr, the predecessor of the original target edge always has a single successor because critical edge splitting was successful). However, this assumtion is not true because SplitCriticalEdge returns nullptr if the destination block is a landing pad. This invalid assumption results assertion failure.

Fundamental solution might be fixing llvm::SplitEdge to not to rely on the invalid assumption. However, it'll involve a lot of work because current API assumes that llvm::SplitEdge never fails. Instead, this patch makes callsite splitting to not to attempt splitting if the callsite is in a landing pad.

Attached test case will crash with assertion failure without the fix.

Reviewers: fhahn, junbuml, dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45130

llvm-svn: 329250
2018-04-05 04:16:23 +00:00
Teresa Johnson 70565e4cac [gold] Add debug-pass-manager option, and use it to test new-pass-manager
Summary: Follow up from r314963.

Reviewers: pcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45293

llvm-svn: 329249
2018-04-05 03:16:57 +00:00
Gerolf Hoflehner f41aa4fd85 [IR] Upgrade comment token in objc retain release marker
Older compiler issued '#' instead of ';'

llvm-svn: 329248
2018-04-05 02:44:46 +00:00
Puyan Lotfi d6f7313c8f [MIR-Canon] Improving performance by switching to named vregs.
No more skipping thounsands of vregs. Much faster running time.

llvm-svn: 329246
2018-04-05 00:27:15 +00:00
Puyan Lotfi 26c504fe1e [MIR-Canon] Adding support for multi-def -> user distance reduction.
llvm-svn: 329243
2018-04-05 00:08:15 +00:00
Sam Clegg 685c5e838a [WebAssembly] Only write 32-bits for WebAssembly::OPERAND_OFFSET32
A bug was found where an offset of -1 would generate an encoding
of max int64 which is invalid in the binary format.

Differential Revision: https://reviews.llvm.org/D45280

llvm-svn: 329238
2018-04-04 22:27:58 +00:00
Peter Collingbourne f11eb3ebe7 AArch64: Implement support for the shadowcallstack attribute.
The implementation of shadow call stack on aarch64 is quite different to
the implementation on x86_64. Instead of reserving a segment register for
the shadow call stack, we reserve the platform register, x18. Any function
that spills lr to sp also spills it to the shadow call stack, a pointer to
which is stored in x18.

Differential Revision: https://reviews.llvm.org/D45239

llvm-svn: 329236
2018-04-04 21:55:44 +00:00
Vitaly Buka 4296ea72ff Don't inline @llvm.icall.branch.funnel
Summary: @llvm.icall.branch.funnel is musttail with variable number of
arguments. After inlining current backend can't separate call targets from call
arguments.

Reviewers: pcc

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D45116

llvm-svn: 329235
2018-04-04 21:46:27 +00:00
Zhaoshi Zheng a5531f287a [MemorySSA] Fix spelling errors in MemorySSA.cpp. NFC
llvm-svn: 329230
2018-04-04 21:08:11 +00:00
Evgeniy Stepanov 1f1a7a719d hwasan: add -hwasan-match-all-tag flag
Sometimes instead of storing addresses as is, the kernel stores the address of
a page and an offset within that page, and then computes the actual address
when it needs to make an access. Because of this the pointer tag gets lost
(gets set to 0xff). The solution is to ignore all accesses tagged with 0xff.

This patch adds a -hwasan-match-all-tag flag to hwasan, which allows to ignore
accesses through pointers with a particular pointer tag value for validity.

Patch by Andrey Konovalov.

Differential Revision: https://reviews.llvm.org/D44827

llvm-svn: 329228
2018-04-04 20:44:59 +00:00
Jessica Paquette bccd18b816 [MachineOutliner] Add `useMachineOutliner` target hook
The MachineOutliner has a bunch of target hooks that will call llvm_unreachable
if the target doesn't implement them. Therefore, if you enable the outliner on
such a target, it'll just crash. It'd be much better if it'd just *not* run
the outliner at all in this case.

This commit adds a hook to TargetInstrInfo that returns false by default.
Targets that implement the hook make it return true. The outliner checks the
return value of this hook to decide whether or not to continue.

llvm-svn: 329220
2018-04-04 19:13:31 +00:00
Eric Fiselier 96bbec79b4 [Analysis] Support aligned new/delete functions.
Summary:
Clang's __builtin_operator_new/delete was recently taught about the aligned allocation overloads (r328134). This patch makes LLVM aware of them as well.
This allows the compiler to perform certain optimizations including eliding new/delete calls.

Reviewers: rsmith, majnemer, dblaikie, vsk, bkramer

Reviewed By: bkramer

Subscribers: ckennelly, llvm-commits

Differential Revision: https://reviews.llvm.org/D44769

llvm-svn: 329218
2018-04-04 19:01:51 +00:00