a10fff51d9
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
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that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
2007-12-31 04:13:23 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
31a2c3948e
Fix unintented change from last commit
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llvm-svn: 45282
2007-12-21 12:22:29 +00:00
80c741e160
Enable EH for linux/ppc32 targets
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llvm-svn: 45281
2007-12-21 12:19:44 +00:00
f6a8156e4f
implement __builtin_return_addr(0) on ppc.
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llvm-svn: 44700
2007-12-08 06:59:59 +00:00
57ee7c6630
Implement ExpandOperationResult for ppc i64 fp->int, which fixes
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CodeGen/Generic/fp_to_int.ll among others. Its unclear why this
just started failing...
llvm-svn: 44407
2007-11-28 18:44:47 +00:00
f359fed9f9
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
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adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
llvm-svn: 44037
2007-11-13 00:44:25 +00:00
10f4152471
Disable a couple more things for ppcf128.
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llvm-svn: 43267
2007-10-23 23:20:14 +00:00
bdbed66333
Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64.
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llvm-svn: 43228
2007-10-22 19:46:19 +00:00
b193576bc6
comment fixes
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llvm-svn: 43168
2007-10-19 04:08:28 +00:00
10432e5a67
More ppcf128 issues (maybe the last)?
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llvm-svn: 43160
2007-10-19 00:59:18 +00:00
06a4954e6e
Change LowerFP_TO_SINT to create the specific code it needs instead of
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unconditionally creating an i64 bitcast. With the future legalizer
design, operation legalization can't introduce new nodes with illegal
types.
This fixes the rest of olden on ppc32.
llvm-svn: 43005
2007-10-15 20:14:52 +00:00
2f6b6d6fb0
Fix type mismatch error in PPC Altivec (only causes
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a problem when asserts are on). From vecLib.
llvm-svn: 42959
2007-10-14 01:58:32 +00:00
9013eaff9a
Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC.
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llvm-svn: 42904
2007-10-12 14:08:57 +00:00
482732af9d
Set ISD::FPOW to Expand.
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llvm-svn: 42881
2007-10-11 23:21:31 +00:00
666323eacd
Next PPC long double bits: ppcf128->i32 conversion.
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Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).
llvm-svn: 42822
2007-10-10 01:01:31 +00:00
71f0d7d76e
When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in
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target-indepenent lowering, don't use them on PowerPC.
llvm-svn: 42755
2007-10-08 17:28:24 +00:00
f864ac96d8
Next powerpc long double bits. Comparisons work,
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although not well, and shortening FP converts.
llvm-svn: 42672
2007-10-06 01:24:11 +00:00
c0154c06d6
First round of ppc long double. call/return and
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basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.
llvm-svn: 42644
2007-10-05 20:04:43 +00:00
86e0119822
Fold the adjust_trampoline intrinsic into
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init_trampoline. There is now only one
trampoline intrinsic.
llvm-svn: 41841
2007-09-11 14:10:23 +00:00
e2f23a3abf
Add lengthof and endof templates that hide a lot of sizeof computations.
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Patch by Sterling Stein!
llvm-svn: 41758
2007-09-07 04:06:50 +00:00
3cf889f75e
Enhance APFloat to retain bits of NaNs (fixes oggenc).
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Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
llvm-svn: 41632
2007-08-31 04:03:46 +00:00
10e18dea2a
Use i64 on a PPC64 machine
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llvm-svn: 41590
2007-08-30 00:59:19 +00:00
d8c9cb9182
rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
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changing the interface to allow for future changes.
llvm-svn: 41384
2007-08-25 00:47:38 +00:00
581d2795dc
Vector fneg must be expanded into fsub -0.0, X.
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llvm-svn: 40586
2007-07-30 07:51:22 +00:00
644f917358
Support for trampolines, except for X86 codegen which is
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still under discussion.
llvm-svn: 40549
2007-07-27 12:58:54 +00:00
09d73c0305
Assert when TLS is not implemented.
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llvm-svn: 39737
2007-07-11 17:19:51 +00:00
f8f531bf69
Change getCopyToParts and getCopyFromParts to always use target-endian
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register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.
llvm-svn: 38471
2007-07-09 20:59:04 +00:00
309d3d51b3
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
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TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
llvm-svn: 37704
2007-06-22 14:59:07 +00:00
7936d91f70
describe an argument, hide it.
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llvm-svn: 37650
2007-06-19 05:46:06 +00:00
944200be45
If a function is vararg, never pass inreg arguments in registers. Thanks to
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Anton for half of this patch.
llvm-svn: 37641
2007-06-19 00:13:10 +00:00
5c4413120f
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
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llvm-svn: 37579
2007-06-14 22:58:02 +00:00
c12dd5207d
Apply this patch:
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http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html
llvm-svn: 37240
2007-05-18 23:21:46 +00:00
0b7472da6f
fix some subtle inline asm selection issues
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llvm-svn: 37067
2007-05-15 01:31:05 +00:00
19ccd6226c
Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2
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are always unsupported.
llvm-svn: 35835
2007-04-09 22:10:05 +00:00
23710a7da3
Starting implementation of the ELF32 ABI specification of varargs handling.
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LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.
llvm-svn: 35625
2007-04-03 13:59:52 +00:00
b3e99a18ee
The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules
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as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/ ).
Change all ELF tests to ELF32.
llvm-svn: 35624
2007-04-03 12:35:28 +00:00
fbfc451ba9
The ELF ABI specifies F1-F8 registers as argument registers for double, not
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F1-F10. This affects only ELF, not MachO.
llvm-svn: 35622
2007-04-03 10:27:07 +00:00
1eb94d973a
implement the new addressing mode description hook.
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llvm-svn: 35521
2007-03-30 23:15:24 +00:00
682baf2dda
"The C standards do say that "char" may either be a "signed char" or "unsigned
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char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php
llvm-svn: 35382
2007-03-27 16:33:08 +00:00
d685514e2e
switch TargetLowering::getConstraintType to take the entire constraint,
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not just the first letter. No functionality change.
llvm-svn: 35322
2007-03-25 02:14:49 +00:00
7aad92868c
Stack and register alignment of call arguments in the ELF ABI
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llvm-svn: 35083
2007-03-13 15:02:46 +00:00
b9dce9db85
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
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llvm-svn: 35074
2007-03-12 23:29:01 +00:00
4f2e4e0f92
Switch PPC return lower to use an autogenerated CC description.
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llvm-svn: 34940
2007-03-06 00:59:59 +00:00
75ab9799df
Implemented the frameaddress intrinsic for PPC.
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llvm-svn: 34787
2007-03-01 13:11:38 +00:00
89d81878d2
Differentiate between the MachO and the ELF ABI the CALL instruction.
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llvm-svn: 34667
2007-02-27 13:01:19 +00:00
535bd6d3ba
always lower to RETFLAG, never leave it as just ret.
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llvm-svn: 34639
2007-02-26 19:44:02 +00:00
1ee61ab414
no really, this is the right patch
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llvm-svn: 34605
2007-02-25 20:01:40 +00:00
4d2f5f8740
always promote float varargs to double.
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llvm-svn: 34604
2007-02-25 19:59:18 +00:00
43df5b335c
implement support for the linux/ppc function call ABI. Patch by
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Nicolas Geoffray!
llvm-svn: 34574
2007-02-25 05:34:32 +00:00
Chris Lattner