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Author SHA1 Message Date
Craig Topper b1623321af [X86] Add 'l' and 'q' suffixes to the tbm instruction mnemonics. 
While the suffix isn't required to disambiguate the instructions, it is required in order to parse the instructions when the suffix is specified in order to match the GNU assembler.

llvm-svn: 322354
 2018-01-12 06:21:36 +00:00
Craig Topper 327f13b43b Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. 
llvm-svn: 200516
 2014-01-31 05:33:45 +00:00
Yunzhong Gao b8bbcbfcc8 Adding intrinsics to the llvm backend for TBM instruction set. 
Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750

llvm-svn: 191539
 2013-09-27 18:38:42 +00:00