Commit Graph

44115 Commits

Author SHA1 Message Date
Owen Anderson 15c85c916f Cleanup trailing whitespace.
llvm-svn: 121816
2010-12-15 00:52:44 +00:00
Bill Wendling 20480d26e9 Revert r121808 until I can fix the build.
llvm-svn: 121815
2010-12-15 00:04:00 +00:00
Jim Grosbach eda5177ca6 thumb adr fixup needs alignment just like the t2 version.
llvm-svn: 121812
2010-12-14 23:47:35 +00:00
Bill Wendling 5ab38b59e6 Comments and cleaning.
llvm-svn: 121809
2010-12-14 23:42:48 +00:00
Bill Wendling 00adcd6ed9 Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In
particular, we want

   ldr r2, [r3]

to be equivalent to

   ldr r2, [r3, #0]

and not

   ldr r2, [r3, r0]

llvm-svn: 121808
2010-12-14 23:40:49 +00:00
Jakob Stoklund Olesen 0b7ca3a6a7 Simplify RegAllocGreedy's use of register aliases.
llvm-svn: 121807
2010-12-14 23:38:19 +00:00
Jakob Stoklund Olesen 47b93401d8 Simplify CCState's use of register aliases.
llvm-svn: 121806
2010-12-14 23:28:01 +00:00
Jakob Stoklund Olesen be1c8d3a82 Simplify AggressiveAntiDepBreaker's use of register aliases.
llvm-svn: 121805
2010-12-14 23:23:15 +00:00
Jakob Stoklund Olesen 6a5bf7782a Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.
llvm-svn: 121801
2010-12-14 23:10:48 +00:00
Jim Grosbach 509dc2a700 Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755
llvm-svn: 121798
2010-12-14 22:28:03 +00:00
Bill Wendling 6ea3053824 Fix comment.
llvm-svn: 121797
2010-12-14 22:26:49 +00:00
Bill Wendling ce4f87b3ba Multiclassify the LDR/STR encoding patterns. The only functionality difference
is the addition of the FoldableAsLoad & Rematerializable flags to some of the
load instructions. ARM has these flags set for them.

llvm-svn: 121794
2010-12-14 22:10:49 +00:00
Evan Cheng 19dc77cec6 Fix a minor bug in two-address pass. It was missing a commute opportunity.
regB = move RCX
regA = op regB, regC
RAX  = move regA
where both regB and regC are killed. If regB is constrainted to non-compatible
physical registers but regC is not constrainted at all, then it's better to
commute the instruction.
       movl    %edi, %eax
       shlq    $32, %rcx
       leaq    (%rcx,%rax), %rax
=>
       movl    %edi, %eax
       shlq    $32, %rcx
       orq     %rcx, %rax
rdar://8762995

llvm-svn: 121793
2010-12-14 21:34:53 +00:00
Jim Grosbach d96bd53d04 trailing whitespace
llvm-svn: 121792
2010-12-14 21:28:29 +00:00
Matt Beaumont-Gay 86a05d0bed Move debugging code entirely within DEBUG(). Silences an unused variable
warning in the opt build.

llvm-svn: 121791
2010-12-14 21:14:55 +00:00
Jim Grosbach 8c1fabe367 Refactor a bit for legibility.
llvm-svn: 121790
2010-12-14 21:10:47 +00:00
Jim Grosbach 2fc6561102 trailing whitespace.
llvm-svn: 121789
2010-12-14 20:46:39 +00:00
Jim Grosbach 96254146cf Make sure to propagate the predicate operands for LEApcrel to ADR.
llvm-svn: 121788
2010-12-14 20:45:47 +00:00
Owen Anderson f636a64bfe Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions.
llvm-svn: 121784
2010-12-14 19:42:53 +00:00
Jakob Stoklund Olesen 5c3ad0d51e Add LiveIntervalUnion print methods, RegAllocGreedy::trySplit debug spew.
llvm-svn: 121783
2010-12-14 19:38:49 +00:00
Jakob Stoklund Olesen d5e38383e0 Use TRI::printReg instead of AbstractRegisterDescription when printing
LiveIntervalUnions.

llvm-svn: 121781
2010-12-14 18:53:47 +00:00
Jakob Stoklund Olesen 2dd1ee5fd5 Add TargetRegisterInfo::printReg() to pretty-print registers.
llvm-svn: 121780
2010-12-14 18:53:39 +00:00
Jim Grosbach 41955ff958 ARM Fixups relative to thumb functions need to have the low bit of the value
set for interworking to work properly. rdar://8755956

llvm-svn: 121778
2010-12-14 18:46:57 +00:00
Jakob Stoklund Olesen e7ee72087e Q.seenAllInterferences() must be called after Q.collectInterferingVRegs().
llvm-svn: 121774
2010-12-14 17:47:36 +00:00
Daniel Dunbar a9b9300bb8 MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup.
llvm-svn: 121772
2010-12-14 17:37:16 +00:00
Jim Grosbach e34793e960 Trailing whitespace
llvm-svn: 121769
2010-12-14 16:25:15 +00:00
Bill Wendling 6dd0c07622 Use the integer scheduling intrinsic for integer loads and stores.
llvm-svn: 121765
2010-12-14 12:33:05 +00:00
Chris Lattner 7499b452c1 - Insert new instructions before DomBlock's terminator,
which is simpler than finding a place to insert in BB.
 - Don't perform the 'if condition hoisting' xform on certain
   i1 PHIs, as it interferes with switch formation.

This re-fixes "example 7", without breaking the world hopefully.

llvm-svn: 121764
2010-12-14 08:46:09 +00:00
Chris Lattner 335f0e4ad4 fix two significant issues with FoldTwoEntryPHINode:
first, it can kick in on blocks whose conditions have been
folded to a constant, even though one of the edges will be
trivially folded.

second, it doesn't clean up the "if diamond" that it just 
eliminated away.  This is a problem because other simplifycfg
xforms kick in depending on the order of block visitation,
causing pointless work.

llvm-svn: 121762
2010-12-14 08:01:53 +00:00
Chris Lattner dc20a7d38c remove the instsimplify logic I added in r121754. It is apparently
breaking the selfhost builds, though I can't fathom how.

llvm-svn: 121761
2010-12-14 07:53:03 +00:00
Chris Lattner 9ac168d0ab clean up logic, convert std::set to SmallPtrSet, handle the case
when all 2-entry phis are simplified away.

llvm-svn: 121760
2010-12-14 07:41:39 +00:00
Chris Lattner 9fd838d31b tidy up a bit, move DEBUG down to when we commit to doing the transform so we
don't print it unless the xform happens.

llvm-svn: 121758
2010-12-14 07:23:10 +00:00
Chris Lattner b42d293faa use SimplifyInstruction instead of reimplementing part of it.
llvm-svn: 121757
2010-12-14 07:20:29 +00:00
Chris Lattner fb73de482c simplify GetIfCondition by using getSinglePredecessor.
llvm-svn: 121756
2010-12-14 07:15:21 +00:00
Chris Lattner 0f4d67bd88 use AddPredecessorToBlock in 3 places instead of a manual loop.
llvm-svn: 121755
2010-12-14 07:09:42 +00:00
Chris Lattner a07cc6f4fd make FoldTwoEntryPHINode use instsimplify a bit, make
GetIfCondition faster by avoiding pred_iterator.  No
really interesting change.

llvm-svn: 121754
2010-12-14 07:00:00 +00:00
Chris Lattner afd2a8cfbb remove the dead (and terrible) llvm::RemoveSuccessor function.
llvm-svn: 121753
2010-12-14 06:51:55 +00:00
Chris Lattner d7beca3782 improve DEBUG's a bit, switch to eraseFromParent() to simplify
code a bit, switch from constant folding to instsimplify.

llvm-svn: 121751
2010-12-14 06:17:25 +00:00
Chris Lattner 5a9d59d918 reapply my recent change that disables a piece of the switch formation
work, but fixes 400.perlbmk.

llvm-svn: 121749
2010-12-14 05:57:30 +00:00
Bill Wendling 092a7bdf9f The tLDR et al instructions were emitting either a reg/reg or reg/imm
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.

The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.

There are some obvious cleanups here, which will happen shortly.

llvm-svn: 121747
2010-12-14 03:36:38 +00:00
Evan Cheng c177813755 bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663
llvm-svn: 121746
2010-12-14 03:22:07 +00:00
Jakob Stoklund Olesen eba9095df2 Remove unused vector.
llvm-svn: 121741
2010-12-14 00:58:47 +00:00
Jakob Stoklund Olesen 903b6d3261 Try reassigning all virtual register interferences, not just those with lower
spill weight. Filter out fixed registers instead.

Add support for reassigning an interference that was assigned to an alias.

llvm-svn: 121737
2010-12-14 00:37:49 +00:00
Jakob Stoklund Olesen 3d7b8066aa Add stub for RAGreedy::trySplit.
llvm-svn: 121736
2010-12-14 00:37:44 +00:00
Owen Anderson 6d375e5637 Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering much later, which makes the entire
process cleaner.

llvm-svn: 121735
2010-12-14 00:36:49 +00:00
Owen Anderson 3e5648896e Fix recent buildbot breakage by pulling SimplifyCFG back to its state as of r121694, the most recent state
where I'm confident there were no crashes or miscompilations.  XFAIL the test added since then for now.

llvm-svn: 121733
2010-12-13 23:49:28 +00:00
Jason W Kim 0e909c5f9c First cut of ARM/MC/ELF PIC relocations.
Test has fixme, to move to .s -> .o test when AsmParser works better.

llvm-svn: 121732
2010-12-13 23:16:07 +00:00
Bob Wilson 651eaa02b8 Remove the rest of the *_sfp Neon instruction patterns.
Use the same COPY_TO_REGCLASS approach as for the 2-register *_sfp instructions.
This change made a big difference in the code generated for the
CodeGen/Thumb2/cross-rc-coalescing-2.ll test: The coalescer is still doing
a fine job, but some instructions that were previously moved outside the loop
are not moved now.  It's using fewer VFP registers now, which is generally
a good thing, so I think the estimates for register pressure changed and that
affected the LICM behavior.  Since that isn't obviously wrong, I've just
changed the test file.  This completes the work for Radar 8711675.

llvm-svn: 121730
2010-12-13 23:02:37 +00:00
Bob Wilson aae0862172 Simplify N2VSPat, removing some unnecessary type arguments.
llvm-svn: 121729
2010-12-13 23:02:31 +00:00
Chris Lattner a6e5d5694a temporarily disable part of my previous patch, which causes an iterator invalidation issue, causing a crash on some versions of perlbmk.
llvm-svn: 121728
2010-12-13 23:02:19 +00:00