b63e300b67
[SystemZ] Add comparisons of high words and memory
...
llvm-svn: 191777
2013-10-01 15:00:44 +00:00
a9ac0e0f75
[SystemZ] Add comparisons of large immediates using high words
...
There are no corresponding patterns for small immediates because they would
prevent the use of fused compare-and-branch instructions.
llvm-svn: 191775
2013-10-01 14:56:23 +00:00
42a694f44e
[SystemZ] Add immediate addition involving high words
...
llvm-svn: 191774
2013-10-01 14:53:46 +00:00
2cac763544
[SystemZ] Extend test-under-mask support to high GR32s
...
llvm-svn: 191773
2013-10-01 14:41:52 +00:00
3ad5a15b72
[SystemZ] Extend 32-bit RISBG optimizations to high words
...
This involves using RISB[LH]G, whereas the equivalent z10 optimization
uses RISBG.
llvm-svn: 191770
2013-10-01 14:36:20 +00:00
7028428c2c
[SystemZ] Allow integer AND involving high words
...
llvm-svn: 191762
2013-10-01 14:20:41 +00:00
5718dacbdd
[SystemZ] Allow integer XOR involving high words
...
llvm-svn: 191759
2013-10-01 14:08:44 +00:00
6e96ac600f
[SystemZ] Allow integer OR involving high words
...
llvm-svn: 191755
2013-10-01 13:22:41 +00:00
1a56931b22
[SystemZ] Allow integer insertions with a high-word destination
...
llvm-svn: 191753
2013-10-01 13:18:56 +00:00
7c5c0eabc9
[SystemZ] Allow selects with a high-word destination
...
llvm-svn: 191751
2013-10-01 13:10:16 +00:00
012402346f
[SystemZ] Add patterns to load a constant into a high word (IIHF)
...
Similar to low words, we can use the shorter LLIHL and LLIHH if it turns
out that the other half of the GR64 isn't live.
llvm-svn: 191750
2013-10-01 13:02:28 +00:00
21235a256f
[SystemZ] Add register zero extensions involving at least one high word
...
llvm-svn: 191746
2013-10-01 12:49:07 +00:00
5469c39a26
[SystemZ] Add truncating high-word stores (STCH and STHH)
...
llvm-svn: 191743
2013-10-01 12:22:49 +00:00
0d46b1a30f
[SystemZ] Add zero-extending high-word loads (LLCH and LLHH)
...
llvm-svn: 191742
2013-10-01 12:19:08 +00:00
89e160d975
[SystemZ] Add sign-extending high-word loads (LBH and LHH)
...
llvm-svn: 191740
2013-10-01 12:11:47 +00:00
0755c93b0c
[SystemZ] Use upper words of GR64s for codegen
...
This just adds the basics necessary for allocating the upper words to
virtual registers (move, load and store). The move support is parameterised
in a way that makes it easy to handle zero extensions, but the associated
zero-extend patterns are added by a later patch.
The easiest way of testing this seemed to be add a new "h" register
constraint for high words. I don't expect the constraint to be useful
in real inline asms, but it should work, so I didn't try to hide it
behind an option.
llvm-svn: 191739
2013-10-01 11:26:28 +00:00
Richard Sandiford