Scott Michel
c6918c1ffa
CellSPU:
...
(a) Fix bgs 3052, 3057
(b) Incorporate Duncan's suggestions re: i1 promotion
(c) Indentation updates.
llvm-svn: 59790
2008-11-21 02:56:16 +00:00
Scott Michel
3726019aa3
CellSPU:
...
(a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy.
(b) Remove truncated stores that will never be used.
(c) Add initial support for __muldi3 as a libcall.
llvm-svn: 59734
2008-11-20 16:36:33 +00:00
Mon P Wang
e15a540071
Allow XMM2 and XMM3 to be used for non ABI compliant code.
...
llvm-svn: 59720
2008-11-20 07:48:19 +00:00
Scott Michel
a7521ee3df
CellSPU: Custom lower truncating stores of i8 to i1 (should not have been
...
promote), fix signed conversion of indexed offsets.
llvm-svn: 59707
2008-11-20 05:01:09 +00:00
Scott Michel
e361f08ab0
CellSPU: Adjust spacing/tabulation
...
llvm-svn: 59703
2008-11-20 04:26:21 +00:00
Evan Cheng
5f23e9fe73
Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e.
...
llvm-svn: 59696
2008-11-20 02:25:51 +00:00
Evan Cheng
59213d64e5
Eliminate a compile time warning.
...
llvm-svn: 59678
2008-11-19 23:21:33 +00:00
Evan Cheng
dfb97383d5
Eliminate a compile time warning.
...
llvm-svn: 59677
2008-11-19 23:21:11 +00:00
Dan Gohman
60cb69e665
Experimental post-pass scheduling support. Post-pass scheduling
...
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.
This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.
The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.
llvm-svn: 59676
2008-11-19 23:18:57 +00:00
Oscar Fuentes
7455d45ba2
CMake: Removed source file from lib/Target/PIC16/CMakeLists.txt.
...
llvm-svn: 59655
2008-11-19 18:42:25 +00:00
Scott Michel
ef5e6934cb
CellSPU: Do not custom lower i1 stores, rely on type legalization to do the
...
right thing and promote the store to i8.
llvm-svn: 59648
2008-11-19 17:45:08 +00:00
Stuart Hastings
0daa1b4a94
<rdar://problem/6351057>
...
Discourage (allocate last) use of x86_64 R12 and R13 due to their
longer instruction encodings.
llvm-svn: 59644
2008-11-19 17:19:35 +00:00
Scott Michel
3462c8ecda
Temporary check-in for Duncan to demonstrate CellSPU store problem.
...
llvm-svn: 59637
2008-11-19 15:24:16 +00:00
Sanjiv Gupta
7e8bf3422f
Forgot to add this in the previous commit.
...
llvm-svn: 59623
2008-11-19 12:12:49 +00:00
Sanjiv Gupta
5c63cf8bfd
Fixed build warnings.
...
llvm-svn: 59621
2008-11-19 11:27:59 +00:00
Sanjiv Gupta
2ae21ee517
Added a more function PIC16 backend. However to get this working a patch in
...
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted.
llvm-svn: 59617
2008-11-19 11:00:54 +00:00
Dan Gohman
c8d2b0135a
Don't set neverHasSideEffects on x86's divide instructions, since
...
they trap on divide-by-zero, and this side effect is otherwise
unmodeled.
llvm-svn: 59551
2008-11-18 21:29:14 +00:00
Dan Gohman
0b2732598c
Add more const qualifiers. This fixes build breakage from r59540.
...
llvm-svn: 59542
2008-11-18 19:49:32 +00:00
Dale Johannesen
aae3a4f864
Move some former testcases (low-probability codegen
...
optimizations) into this wishlist.
llvm-svn: 59455
2008-11-17 18:56:34 +00:00
Oscar Fuentes
ba4eb2a9db
Adds extern "C" ints to the .cpp files that use RegisterTarget, as
...
well as 2 files that use "Registrator"s. These are to be used by the
MSVC builds, as the Win32 linker does not include libs that are
otherwise unreferenced, even if global constructors in the lib have
side-effects.
Patch by Scott Graham!
llvm-svn: 59378
2008-11-15 21:36:30 +00:00
Evan Cheng
9c205bf03c
Fix fuitos encoding.
...
llvm-svn: 59344
2008-11-15 00:40:57 +00:00
Evan Cheng
30f6f8fdad
Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings.
...
llvm-svn: 59314
2008-11-14 20:09:11 +00:00
Dale Johannesen
80cd21dba6
Remove unneeded stuff from GRAD register class.
...
llvm-svn: 59311
2008-11-14 18:10:48 +00:00
Richard Osborne
0f802ba33e
[XCore] Remove whitespace in the description used when
...
registering XCoreTargetMachine.
llvm-svn: 59308
2008-11-14 16:19:56 +00:00
Richard Osborne
5fe5933909
[XCore] Fix expansion of 64 bit add/sub. Don't custom expand
...
these operations if ladd/lsub are not available on the current
subtarget.
llvm-svn: 59305
2008-11-14 15:59:19 +00:00
Richard Osborne
d16b37efae
Add XCore intrinsics for getid (returns thread id) and bitrev (reverses
...
bits in a word).
llvm-svn: 59296
2008-11-14 10:12:16 +00:00
Evan Cheng
fabdcce677
Handle the rest of pseudo instructions.
...
llvm-svn: 59275
2008-11-13 23:36:57 +00:00
Evan Cheng
ea68423998
Lazy compilation callback save / restore VFP registers.
...
llvm-svn: 59274
2008-11-13 23:28:54 +00:00
Dale Johannesen
bee1ad9707
Extend InlineAsm::C_Register to allow multiple specific registers
...
(actually, code already all worked, only the comment
changed). Use this to implement 'A' constraint on x86.
Fixes PR 1779.
llvm-svn: 59266
2008-11-13 21:52:36 +00:00
Evan Cheng
935963de81
Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's.
...
llvm-svn: 59258
2008-11-13 19:22:28 +00:00
Evan Cheng
320902bcfc
fsub{d|s} encoding bugs.
...
llvm-svn: 59234
2008-11-13 07:59:48 +00:00
Evan Cheng
4af89f7e7d
Missed a break statement.
...
llvm-svn: 59231
2008-11-13 07:46:59 +00:00
Evan Cheng
2666f59322
Fix pre- and post-indexed load / store encoding bugs.
...
llvm-svn: 59230
2008-11-13 07:34:59 +00:00
Dan Gohman
88ba5f0b96
Move the code that inserts X87 FP_REG_KILL instructions from a
...
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.
llvm-svn: 59190
2008-11-12 22:55:05 +00:00
Evan Cheng
287a25d636
Remove the incorrect assertion. We don't have enough information before relocation to set U bit.
...
llvm-svn: 59170
2008-11-12 21:37:59 +00:00
Evan Cheng
45d030a05a
Address mode immediate offset has already been divided by 4.
...
llvm-svn: 59117
2008-11-12 08:21:12 +00:00
Evan Cheng
052f20d3b1
Fix a VFP binary arithmetic instruction encoding bug.
...
llvm-svn: 59116
2008-11-12 08:14:21 +00:00
Evan Cheng
2836d91630
Fix address mode 3 immediate offset mode encoding.
...
llvm-svn: 59109
2008-11-12 07:34:37 +00:00
Evan Cheng
af644b50b4
Consolidate formats; fix FCMPED etc. encodings.
...
llvm-svn: 59107
2008-11-12 07:18:38 +00:00
Evan Cheng
4b6c7efbde
Fix VFP conversion instruction encodings.
...
llvm-svn: 59104
2008-11-12 06:41:41 +00:00
Evan Cheng
a0e2f26320
Fix encoding of single-precision VFP registers.
...
llvm-svn: 59102
2008-11-12 02:19:38 +00:00
Evan Cheng
bfcee5b863
VFP fld / fst immediate field is multiplied by 4.
...
llvm-svn: 59100
2008-11-12 01:02:24 +00:00
Andrew Lenharth
7d8b884b12
This shouldn't be necessary
...
llvm-svn: 59090
2008-11-11 23:19:51 +00:00
Evan Cheng
97ccab888a
Fix FMDRR encoding.
...
llvm-svn: 59088
2008-11-11 22:46:12 +00:00
Evan Cheng
ad519bbe54
Handle floating point constpool_entry's.
...
llvm-svn: 59087
2008-11-11 22:19:31 +00:00
Evan Cheng
8cbbcb1f2f
Encode VFP load / store instructions.
...
llvm-svn: 59084
2008-11-11 21:48:44 +00:00
Evan Cheng
38c9a14a88
Encode VFP conversion instructions.
...
llvm-svn: 59074
2008-11-11 19:40:26 +00:00
Evan Cheng
2d1937ede5
Add a README entry.
...
llvm-svn: 59052
2008-11-11 17:35:52 +00:00
Oscar Fuentes
a08c2905ad
CMake: corrected split of Alpha and Sparc AsmPrinters.
...
llvm-svn: 59050
2008-11-11 17:10:13 +00:00
Anton Korobeynikov
03e084d482
Separate sparc asmprinter. This should unbreak the native build
...
llvm-svn: 59047
2008-11-11 16:42:57 +00:00