llvm-project

Commit Graph

Author	SHA1	Message	Date
Kevin Qin	ede9ce1933	Fix a bug in DAGcombiner about zero-extend after setcc. For AArch64 backend, if DAGCombiner see "sext(setcc)", it will combine them together to a single setcc with extended value type. Then if it see "zext(setcc)", it assumes setcc is Vxi1, and try to create "(and (vsetcc), (1, 1, ...)". While setcc isn't Vxi1, DAGcombiner will create wrong node and get wrong code emitted. llvm-svn: 198190	2013-12-30 02:05:13 +00:00
Hao Liu	cd8b02dce3	Clang and AArch64 backend patches to support shll/shl and vmovl instructions and ACLE functions llvm-svn: 188451	2013-08-15 08:26:11 +00:00

Author

SHA1

Message

Date

Kevin Qin

ede9ce1933

Fix a bug in DAGcombiner about zero-extend after setcc.

For AArch64 backend, if DAGCombiner see "sext(setcc)", it will
combine them together to a single setcc with extended value type.
Then if it see "zext(setcc)", it assumes setcc is Vxi1, and try to
create "(and (vsetcc), (1, 1, ...)". While setcc isn't Vxi1,
DAGcombiner will create wrong node and get wrong code emitted.

llvm-svn: 198190

2013-12-30 02:05:13 +00:00

Hao Liu

cd8b02dce3

Clang and AArch64 backend patches to support shll/shl and vmovl instructions and ACLE functions

llvm-svn: 188451

2013-08-15 08:26:11 +00:00

2 Commits