Commit Graph

4324 Commits

Author SHA1 Message Date
Craig Topper 2c03e53f4e [X86] Add support for __builtin_cpu_init
This adds builtin_cpu_init which will emit a call to cpu_indicator_init in libgcc or compiler-rt.

This is needed to support builtin_cpu_supports/builtin_cpu_is in an ifunc resolver.

Differential Revision: https://reviews.llvm.org/D36336

llvm-svn: 311874
2017-08-28 05:43:23 +00:00
Dehao Chen 5e97f23441 Expose -mllvm -accurate-sample-profile to clang.
Summary: With accurate sample profile, we can do more aggressive size optimization. For some size-critical application, this can reduce the text size by 20%

Reviewers: davidxl, rsmith

Reviewed By: davidxl, rsmith

Subscribers: mehdi_amini, eraman, sanjoy, cfe-commits

Differential Revision: https://reviews.llvm.org/D37091

llvm-svn: 311707
2017-08-24 21:37:33 +00:00
Coby Tayree 7b49dc9c68 [Clang][x86][Inline Asm] support for GCC style inline asm - Y<x> constraints
This patch is intended to enable the use of basic double letter constraints used in GCC extended inline asm {Yi Y2 Yz Y0 Ym Yt}.
Supersedes D35205
llvm counterpart: D36369

Differential Revision: https://reviews.llvm.org/D36371

llvm-svn: 311643
2017-08-24 09:07:34 +00:00
Coby Tayree cfa3810aa0 Fixups to FE tests affected by D36793
Differential Revision: https://reviews.llvm.org/D36794

llvm-svn: 311640
2017-08-24 08:47:26 +00:00
Reid Kleckner 6d353348e5 Parse and print DIExpressions inline to ease IR and MIR testing
Summary:
Most DIExpressions are empty or very simple. When they are complex, they
tend to be unique, so checking them inline is reasonable.

This also avoids the need for CodeGen passes to append to the
llvm.dbg.mir named md node.

See also PR22780, for making DIExpression not be an MDNode.

Reviewers: aprantl, dexonsmith, dblaikie

Subscribers: qcolombet, javed.absar, eraman, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D37075

llvm-svn: 311594
2017-08-23 20:31:27 +00:00
Taewook Oh 0fb5b78892 Use the file name from linemarker for debug info if an input is preprocessed source.
Summary:
Even in the case of the input file is a preprocessed source, clang uses the file name of the preprocesses source for debug info (DW_AT_name attribute for DW_TAG_compile_unit). However, gcc uses the file name specified in the first linemarker instead. This makes more sense because the one specified in the linemarker represents the "actual" source file name.

Clang already uses the file name specified in the first linemarker for Module name (https://github.com/llvm-mirror/clang/blob/master/lib/Frontend/FrontendAction.cpp#L779) if the input is preprocessed. This patch makes clang to use the same value for debug info as well.

Reviewers: compnerd, rnk, dblaikie, rsmith

Reviewed By: rnk

Subscribers: aprantl, cfe-commits

Differential Revision: https://reviews.llvm.org/D36474

llvm-svn: 311037
2017-08-16 19:36:24 +00:00
Stefan Maksimovic ac642ae7c0 Revert r302670 for the upcoming 5.0.0 release
This is causing failures when compiling clang with -O3
as one of the structures used by clang is passed by
value and uses the fastcc calling convention.

Faliures manifest for stage2 mips build.

llvm-svn: 310704
2017-08-11 11:39:07 +00:00
Stefan Maksimovic 76391b101d Revert r310057
Bring back changes which r304953 introduced since
they were in fact not the cause of failures described
in r310057 commit message.

llvm-svn: 310702
2017-08-11 11:03:54 +00:00
Craig Topper 699ae0c173 [X86] Implement __builtin_cpu_is
This patch adds support for __builtin_cpu_is. I've tried to match the strings supported to the latest version of gcc.

Differential Revision: https://reviews.llvm.org/D35449

llvm-svn: 310657
2017-08-10 20:28:30 +00:00
Coby Tayree 7d442fc6d4 [X86][Asm] Allow negative immediate to appear before bracketed expression
Currently, only non-negative immediate is allowed prior to a brac expression (memory reference).
MASM / GAS does not have any problem cope with the left side of the real line, so we should be able to as well.

llvm: D36229

Differential Revision: https://reviews.llvm.org/D36230

llvm-svn: 310529
2017-08-09 21:50:22 +00:00
Coby Tayree 69eb696112 [X86][Ms-InlineAsm] Extend MS Dot operator to accept "this" + struct/class pointers aliases
MS InlineAsm Dot operator accepts "Bases" such as "this" (cpp) and class/struct pointer typedef.
This patch enhance its implementation with this behavior.

Differential Revision: https://reviews.llvm.org/D36450

llvm-svn: 310472
2017-08-09 13:31:41 +00:00
Simon Atanasyan a92a842326 [mips] Enable `long_call/short_call` attributes on MIPS64
This change enables `long_call/short_call/far/near` attributes on
MIPS64 targets.

Differential revision: https://reviews.llvm.org/D36208

llvm-svn: 310418
2017-08-08 21:17:33 +00:00
Craig Topper 41a550ccfa [X86] Support 'avx5124vnniw' and 'avx5124fmaps' for __builtin_cpu_supports.
They still need to be implemented in the intrinsics, the command line, and the backend. But this change isn't dependent on any of that and resolves a TODO.

llvm-svn: 310386
2017-08-08 17:43:44 +00:00
Erik Pilkington 1b00372fad [Availability] Don't make an availability attribute imply default visibility on macOS
Fixes PR33796, rdar://33655115

Differential revision: https://reviews.llvm.org/D36191

llvm-svn: 310382
2017-08-08 17:09:09 +00:00
Craig Topper 9d8e9ff620 [X86] Enable isel to use the PAUSE instruction even when SSE2 is disabled. Clang part
Summary:
On older processors this instruction encoding is treated as a NOP.

MSVC doesn't disable intrinsics based on features the way clang/gcc does. Because the PAUSE instruction encoding doesn't crash older processors, some software out there uses these intrinsics without checking for SSE2.

This change also seems to also be consistent with gcc behavior.

Fixes PR34079

Reviewers: RKSimon, zvi

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D36362

llvm-svn: 310191
2017-08-05 23:35:54 +00:00
Adrian Prantl b442302131 Debug Info: Set the DICompileUnit's isOptimized flag when compiling with LTO.
rdar://problem/27640939

llvm-svn: 310147
2017-08-04 23:08:57 +00:00
Vlad Tsyrklevich 3f3aad235d Reland "CFI: blacklist STL allocate() from unrelated-casts"
Reland r310097 with a fix for a debug assertion in NamedDecl.getName()

Differential Revision: https://reviews.llvm.org/D36294

llvm-svn: 310132
2017-08-04 21:21:00 +00:00
Vlad Tsyrklevich bbe96e50f3 Revert "Reland "CFI: blacklist STL allocate() from unrelated-casts""
This reverts commit r310105.

llvm-svn: 310121
2017-08-04 20:37:49 +00:00
Vlad Tsyrklevich bf736037be Reland "CFI: blacklist STL allocate() from unrelated-casts"
Reland r310097 with a unit test fix for MS ABI build bots.

Differential Revision: https://reviews.llvm.org/D36294

llvm-svn: 310105
2017-08-04 19:50:39 +00:00
Vlad Tsyrklevich 3fed079f8c Revert "CFI: blacklist STL allocate() from unrelated-casts"
This reverts commit r310097.

llvm-svn: 310099
2017-08-04 19:17:16 +00:00
Vlad Tsyrklevich 44200125e9 CFI: blacklist STL allocate() from unrelated-casts
Summary:
Previously, STL allocators were blacklisted in compiler_rt's
cfi_blacklist.txt because they mandated a cast from void* to T* before
object initialization completed. This change moves that logic into the
front end because C++ name mangling supports a substitution compression
mechanism for symbols that makes it difficult to blacklist the mangled
symbol for allocate() using a regular expression.

Motivated by crbug.com/751385.

Reviewers: pcc, kcc

Reviewed By: pcc

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D36294

llvm-svn: 310097
2017-08-04 19:10:11 +00:00
Stefan Maksimovic 5c7aaa5ff3 Revert r304953 for release 5.0.0
This is causing failures when compiling clang with -O3
as one of the structures used by clang is passed by
value and uses the fastcc calling convention.

Faliures manifest for stage2 mips build.

llvm-svn: 310057
2017-08-04 12:37:34 +00:00
Simon Dardis d72c5e54c0 [mips] Revert r309942 & r309940
This reverts commit r309942 & commit r309940.

A revert was requested following post commit review.

llvm-svn: 309978
2017-08-03 19:39:51 +00:00
Simon Dardis 2ee2263640 [mips] Fixup r309940.
Needed a // REQUIRES: mips-registered-target

llvm-svn: 309942
2017-08-03 14:35:06 +00:00
Simon Dardis 50f6d35457 [mips] Implement -muninit-const-in-rodata
This option when combined with -mgpopt and -membedded-data places all
uninitialized constant variables in the read-only section.

Reviewers: atanasyan, nitesh.jain

Differential Revision: https://reviews.llvm.org/D35917

llvm-svn: 309940
2017-08-03 14:01:17 +00:00
Coby Tayree d2bb48f0bd [x86][inline-asm]Allow a pack of Control Debug to be properly picked
Allows the incorporation of legit (x86) Debug Regs within inline asm stataements

Differential Revision: https://reviews.llvm.org/D36074

llvm-svn: 309672
2017-08-01 10:51:09 +00:00
Craig Topper 228b622b38 [X86] Remove -O3 from tbm-builtins.c test file.
A change to InstCombine broke this test, but we generally frown on running optimizations clang tests anyway. So I've updated the checks to not depend on optimizations anymore.

llvm-svn: 309616
2017-07-31 20:21:53 +00:00
Coby Tayree e7b7290a9f [x86][inline-asm][ms-compat] legalize the use of "jc/jz short <op>"
MS ignores the keyword "short" when used after a jc/jz instruction, LLVM ought to do the same.
llvm: D35892

Differential Revision: https://reviews.llvm.org/D35893

llvm-svn: 309510
2017-07-30 11:13:46 +00:00
Coby Tayree 5ac75b5744 [x86][inline-asm]Allow a pack of Control Regs to be properly picked
Allows the incorporation of legit (x86) Control Regs within inline asm stataements

Differential Revision: https://reviews.llvm.org/D35903

llvm-svn: 309508
2017-07-30 10:19:10 +00:00
Simon Pilgrim c14865c0c5 [X86][AVX] Ensure vector non-temporal load/store intrinsics force pointer alignment (PR33830)
Clang specifies a max type alignment of 16 bytes on darwin targets (annoyingly in the driver not via cc1), meaning that the builtin nontemporal stores don't correctly align the loads/stores to 32 or 64 bytes when required, resulting in lowering to temporal unaligned loads/stores.

This patch casts the vectors to explicitly aligned types prior to the load/store to ensure that the require alignment is respected.

Differential Revision: https://reviews.llvm.org/D35996

llvm-svn: 309488
2017-07-29 15:33:34 +00:00
Vedant Kumar 6dc0f5b947 [test] FileCheck-ify a test to avoid a spurious failure, NFC
The path to one of my source trees contains 'builtin' as a substring, so
this test failed. Fix it with FileCheck.

llvm-svn: 309460
2017-07-29 00:19:52 +00:00
Vedant Kumar 10c3102071 [ubsan] Diagnose invalid uses of builtins (clang)
On some targets, passing zero to the clz() or ctz() builtins has undefined
behavior. I ran into this issue while debugging UB in __hash_table from libcxx:
the bug I was seeing manifested itself differently under -O0 vs -Os, due to a
UB call to clz() (see: libcxx/r304617).

This patch introduces a check which can detect UB calls to builtins.

llvm.org/PR26979

Differential Revision: https://reviews.llvm.org/D34590

llvm-svn: 309459
2017-07-29 00:19:51 +00:00
Simon Pilgrim 9207fab61a [X86] Add tests showing inability of vector non-temporal load/store intrinsic to force pointer alignment (PR33830)
Clang specifies a max type alignment of 16 bytes on darwin targets, meaning that the builtin nontemporal stores don't correctly align the loads/stores to 32 or 64 bytes when required, resulting in lowering to temporal unaligned loads/stores.

llvm-svn: 309382
2017-07-28 13:47:02 +00:00
Peter Smith 32e2675384 [CodeGen][ARM] ARM runtime helper functions are not always soft-fp
Re-commit r309257 with less precise register checks in arm-float-helpers.c
test.

llvm-svn: 309263
2017-07-27 10:43:53 +00:00
Peter Smith c03956cf73 [CodeGen][ARM] Revert r309257
The test arm-float-helpers.c appears to be failing on some builders and
needs some work to make it more robust.

llvm-svn: 309259
2017-07-27 09:57:13 +00:00
Peter Smith 8459922df7 [CodeGen][ARM] ARM runtime helper functions are not always soft-fp
The ARM Runtime ABI document (IHI0043) defines the AEABI floating point
helper functions in 4.1.2 The floating-point helper functions. These
functions always use the base PCS (soft-fp). However helper functions
defined outside of this document such as the complex-number multiply and
divide helpers are not covered by this requirement and should use
hard-float PCS if the target is hard-float as both compiler-rt and libgcc
for a hard-float sysroot implement these functions with a hard-float PCS.
    
All of the floating point helper functions that are explicitly soft float
are expanded in the llvm ARM backend. This change makes clang not force the
BuiltinCC to AAPCS for AAPCS_VFP. With this change the ARM compiler-rt
tests involving _Complex pass with both hard-fp and soft-fp targets.

Differential Revision: https://reviews.llvm.org/D35538

llvm-svn: 309257
2017-07-27 09:21:41 +00:00
Eric Christopher cf94152f27 Revert "This patch enables the usage of constant Enum identifiers within Microsoft style inline assembly statements." as it is causing msan failures.
This reverts commits r308985 and r308965

llvm-svn: 309004
2017-07-25 19:17:32 +00:00
Nemanja Ivanovic 05f7c94239 This test case is causing all PPC and SystemZ bots to remain red.
Notifying the author via Diffusion did not yield any answer. Therefore, I'm
adding the missing triple. I have no idea if this is the intended triple, but
it seems to fit the bill and should turn the bots back to green.
If the intended triple is a different one, please feel free to change it but I
need make this change to turn the bots back to green now.

llvm-svn: 308985
2017-07-25 17:04:12 +00:00
Manuel Klimek 8f2b2f51f5 Fix spelling of FileCheck in test.
llvm-svn: 308969
2017-07-25 11:34:55 +00:00
Chandler Carruth 9fdd5fa5e0 [PM] Setup TargetLibraryInfo correctly for the new pass manager.
Without this, -fno-builtin and friends doesn't work. Added the obvious
RUN lines to the test for -fno-builtin and they pass now.

llvm-svn: 308967
2017-07-25 10:46:07 +00:00
Matan Haroush b4b8d10355 This patch enables the usage of constant Enum identifiers within Microsoft style inline assembly statements.
Differential Revision:
https://reviews.llvm.org/D33277
https://reviews.llvm.org/D33278

llvm-svn: 308965
2017-07-25 10:43:43 +00:00
Reid Kleckner c990b5d916 Revert "[X86][InlineAsm][Ms Compatibility]Prefer variable name over a register when the two collides"
This reverts r308867 and r308866.

It broke the sanitizer-windows buildbot on C++ code similar to the
following:

  namespace cl { }
  void f() {
    __asm {
      mov al, cl
    }
  }

t.cpp(4,13):  error: unexpected namespace name 'cl': expected expression
    mov al, cl
            ^

In this case, MSVC parses 'cl' as a register, not a namespace.

llvm-svn: 308926
2017-07-24 20:48:15 +00:00
Coby Tayree 1f5df89a8c [X86][InlineAsm][Ms Compatibility]Prefer variable name over a register when the two collides
On MS-style, the following snippet:

int eax;
__asm mov eax, ebx

should yield loading of ebx, into the location pointed by the variable eax

This patch sees to it.

Currently, a reg-to-reg move would have been invoked.

llvm: D34739

Differential Revision: https://reviews.llvm.org/D34740

llvm-svn: 308867
2017-07-24 07:06:37 +00:00
Erich Keane 2b9657b570 Remove Bitrig: Clang Changes
Bitrig code has been merged back to OpenBSD, thus the OS has been abandoned.

Differential Revision: https://reviews.llvm.org/D35708

llvm-svn: 308797
2017-07-21 22:46:31 +00:00
Krzysztof Parzyszek c0d12bcd68 [Hexagon] Attempt to fix selfhost bots
The codegen testcase was checking for specific value names. Make it
ignore the names instead as they are irrelevant. 

llvm-svn: 308782
2017-07-21 21:23:05 +00:00
Krzysztof Parzyszek 33e67ad098 [Hexagon] Add inline-asm constraint 'a' for modifier register class
For example
  asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory")

llvm-svn: 308763
2017-07-21 18:07:15 +00:00
Simon Atanasyan d5c937b3a3 [mips] Add `short_call` to the set of `long_call/far/near` attributes
MIPS gcc supports `long_call/far/near` attributes only, but other
targets have the `short_call` attribut, so let's support it for MIPS
for consistency.

llvm-svn: 308719
2017-07-21 08:10:57 +00:00
Artem Belevich d7a73824e4 [NVPTX] Add lowering of i128 params.
The patch adds support of i128 params lowering. The changes are quite trivial to
support i128 as a "special case" of integer type. With this patch, we lower i128
params the same way as aggregates of size 16 bytes: .param .b8 _ [16].

Currently, NVPTX can't deal with the 128 bit integers:
* in some cases because of failed assertions like
  ValVTs.size() == OutVals.size() && "Bad return value decomposition"
* in other cases emitting PTX with .i128 or .u128 types (which are not valid [1])
  [1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types

Differential Revision: https://reviews.llvm.org/D34555
Patch by: Denys Zariaiev (denys.zariaiev@gmail.com)

llvm-svn: 308675
2017-07-20 21:16:03 +00:00
Simon Atanasyan 1a116db120 [CodeGen][mips] Support `long_call/far/near` attributes
This patch adds support for the `long_call`, `far`, and `near` attributes
for MIPS targets. The `long_call` and `far` attributes are synonyms. All
these attributes override `-mlong-calls` / `-mno-long-calls` command
line options for particular function.

Differential revision: https://reviews.llvm.org/D35479

llvm-svn: 308667
2017-07-20 20:34:18 +00:00
Martin Storsjo 1c8af27ae1 [AArch64] Produce correct defaultlib directives for windows in MSVC style
Differential Revision: https://reviews.llvm.org/D35546

llvm-svn: 308584
2017-07-20 05:47:06 +00:00