maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
229,297 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

17 Commits

Author SHA1 Message Date
Andrew Kaylor 5b444a21df Add optimization bisect opt-in calls for Hexagon passes 
Differential Revision: http://reviews.llvm.org/D19509

llvm-svn: 267593
 2016-04-26 19:46:28 +00:00
Derek Schuff 1dbf7a571f Add MachineFunctionProperty checks for AllVRegsAllocated for target passes 
Summary:
This adds the same checks that were added in r264593 to all
target-specific passes that run after register allocation.

Reviewers: qcolombet

Subscribers: jyknight, dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18525

llvm-svn: 265313
 2016-04-04 17:09:25 +00:00
Alexander Kornienko f00654e31b Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 
Apparently, the style needs to be agreed upon first.

llvm-svn: 240390
 2015-06-23 09:49:53 +00:00
Alexander Kornienko 70bc5f1398 Fixed/added namespace ending comments using clang-tidy. NFC 
The patch is generated using this command:

tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \
  -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \
  llvm/lib/


Thanks to Eugene Kosov for the original patch!

llvm-svn: 240137
 2015-06-19 15:57:42 +00:00
Colin LeMahieu 56efafc056 [Hexagon] Moving pass declarations out of header and in to implementation files. Removing unused function getSubtargetInfo from HexagonMCCodeEmitter.cpp Removing deletion of copy construction and assignment operator since parent already deletes it. 
llvm-svn: 239744
 2015-06-15 19:05:35 +00:00
Brendon Cahoon 55bdeb7bc7 [Hexagon] Use constant extenders to fix up hardware loops 
Use a loop instruction with a constant extender for a hardware
loop instruction that is too far away from the start of the loop.
This is cheaper than changing the SA register value.

Differential Revision: http://reviews.llvm.org/D9262

llvm-svn: 235882
 2015-04-27 14:16:43 +00:00
Krzysztof Parzyszek 952d951418 [Hexagon] Some cleanup of instruction selection code 
llvm-svn: 235552
 2015-04-22 21:17:00 +00:00
Colin LeMahieu 0f850bde0e [Hexagon] Removing old variants of instructions and updating references. 
llvm-svn: 224612
 2014-12-19 20:29:29 +00:00
Colin LeMahieu 5ccbb1298b [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions. 
llvm-svn: 224556
 2014-12-19 00:06:53 +00:00
Colin LeMahieu 174476ed96 Reverting 224550, was not ready for commit. 
llvm-svn: 224552
 2014-12-18 23:36:15 +00:00
Colin LeMahieu 9000481cda [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions. 
llvm-svn: 224550
 2014-12-18 23:27:51 +00:00
Colin LeMahieu 4af437fee5 [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests. 
llvm-svn: 223821
 2014-12-09 20:23:30 +00:00
Eric Christopher fc6de428c8 Have MachineFunction cache a pointer to the subtarget to make lookups 
shorter/easier and have the DAG use that to do the same lookup. This
can be used in the future for TargetMachine based caching lookups from
the MachineFunction easily.

Update the MIPS subtarget switching machinery to update this pointer
at the same time it runs.

llvm-svn: 214838
 2014-08-05 02:39:49 +00:00
Eric Christopher d913448b38 Remove the TargetMachine forwards for TargetSubtargetInfo based 
information and update all callers. No functional change.

llvm-svn: 214781
 2014-08-04 21:25:23 +00:00
Craig Topper 906c2cd2e6 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Hexagon edition 
llvm-svn: 207508
 2014-04-29 07:58:16 +00:00
Chandler Carruth 8a8cd2bab9 Re-sort all of the includes with ./utils/sort_includes.py so that 
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685
 2014-01-07 11:48:04 +00:00
Krzysztof Parzyszek 9a278f108a Extend Hexagon hardware loop generation to handle various additional cases: 
- variety of compare instructions,
- loops with no preheader,
- arbitrary lower and upper bounds.

llvm-svn: 174904
 2013-02-11 21:37:55 +00:00