Commit Graph

398442 Commits

Author SHA1 Message Date
Andrew Litteken bd4b1b5f6d [IRSim] Adding support for recognizing branch similarity
The current IRSimilarityIdentifier does not try to find similarity across blocks, this patch provides a mechanism to compare two branches against one another, to find similarity across basic blocks, rather than just within them.

This adds a step in the similarity identification process that labels all of the basic blocks so that we can identify the relative branching locations. Within an IRSimilarityCandidate we use these relative locations to determine whether if the branching to other relative locations in the same region is the same between branches. If they are, we consider them similar.

We do not consider the relative location of the branch if the target branch is outside of the region. In this case, both branches must exit to a location outside the region, but the exact relative location does not matter.

Reviewers: paquette, yroux

Differential Revision: https://reviews.llvm.org/D106989
2021-09-06 11:55:38 -07:00
Dávid Bolvanský d4da4b8025 [NFC] Added tests for D109283 2021-09-06 19:40:52 +02:00
Craig Topper bf5a31bb9a [X86] Pre-commit test cases for D109295. NFC 2021-09-06 10:22:48 -07:00
David Blaikie 821954f97c DebugInfo: Add a FIXME/suggestion about using sibling/parent index to DWARFDebugInfoEntry
As a reminder if someone comes looking to improve iteration or parent
navigation performance of DWARFDebugInfoEntry.
2021-09-06 10:20:39 -07:00
Michał Górny 25fbbc5936 [lldb] Support SaveCore() from gdb-remote client
Extend PluginManager::SaveCore() to support saving core dumps
via Process plugins.  Implement the client-side part of qSaveCore
request in the gdb-remote plugin, that creates the core dump
on the remote host and then uses vFile packets to transfer it.

Differential Revision: https://reviews.llvm.org/D101329
2021-09-06 18:33:02 +02:00
Kazu Hirata 3322354bfc [Support] Qualify auto (NFC)
Identified with readability-qualified-auto.
2021-09-06 09:10:07 -07:00
Andrzej Warzynski 8883db90d1 [flang][plugins] Make `PluginParseTreeAction` an abstract class
There's no point in providing a default implementation for
`PluginParseTreeAction`. This patch makes it abstract forcing users to
specialise it in order to use it.

Differential Revision: https://reviews.llvm.org/D108518
2021-09-06 15:54:49 +00:00
Jonas Paulsson 118997d8e9 [SelectionDAGBuilder] Bugfix in visitInlineAsm()
In case of a virtual register tied to a phys-def, the register class needs to
be computed. Make sure that this works generally also with fast regalloc by
using TLI.getRegClassFor() whenever possible, and make only the case of
'Untyped' use getMinimalPhysRegClass().

Fixes https://bugs.llvm.org/show_bug.cgi?id=51699.

Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D109291
2021-09-06 17:46:31 +02:00
Sanjay Patel 0d83e72034 [InstCombine] fix infinite loop from shift transform
I'm not sure if there is a better way or another bug
still here, but this is enough to avoid the loop from:
https://llvm.org/PR51657

The test requires multiple blocks and datalayout to
trigger the problem path.
2021-09-06 11:13:39 -04:00
Sanjay Patel c85f450619 [InstCombine] refactor to reduce indent; NFC
This transform should be updated to use better
variable names and code comments. It could
also create the shift-of-shift directly instead
of relying on another combine for that.
2021-09-06 11:13:39 -04:00
Sanjay Patel fbb78668f2 [InstCombine] fix one-use condition for shift transform
This transform is written in a confusing style,
and I suspect it is at fault for a more serious
bug noted in PR51567.

But it's been around forever, so I'm making the
minimal change to fix another bug - it could
increase instructions because it was not checking
uses.
2021-09-06 11:13:39 -04:00
Sanjay Patel 982a15cb3f [InstCombine] early exit to reduce indentation; NFC 2021-09-06 11:13:38 -04:00
Sanjay Patel a73973c9d4 [InstCombine] add test for shift-trunc-shift with extra uses; NFC
The transform doesn't check for extra uses, so we
have more instructions than we started with.
2021-09-06 11:13:38 -04:00
Ivan Zhechev dc453dcf76 [Flang] Port test_modfile.sh to Python
To enable Flang testing on Windows, shell scripts have
to be ported to Python. The following changes have been made:
"test_modfile.sh" has been ported to Python, and
the relevant tests relying on it.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D107956
2021-09-06 13:57:36 +00:00
Victor Campos 79f9c79aaf [AArch64][MC] Merge FeaturePMU into FeaturePerfMon
FeaturePMU was created in AArch64 to accommodate one missing system
register, PMMIR_EL1, in commit ffcd7698ae.

However, the Performance Monitors extension already had a target
feature, which is called FeaturePerfMon. Therefore, FeaturePMU is
redundant.

This patch removes FeaturePMU and merges its contents into
FeaturePerfMon.

Reviewed By: dnsampaio

Differential Revision: https://reviews.llvm.org/D109246
2021-09-06 14:56:49 +01:00
Ivan Zhechev 93c3e765ac [Flang] Port test_folding.sh to Python
To enable Flang testing on Windows,
shells scripts have to be ported to Python.
The following changes have been made:
Ported `test_folding.sh` to Python;
Additional changes to the tests themselves
to use the new script.

LIBPGMATH support for testing
not available at this point.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D108217
2021-09-06 13:54:56 +00:00
David Truby b297531ece [AArch64][sve] Prevent incorrect function call on fixed width vector
The isEssentiallyExtractHighSubvector function currently calls
getVectorNumElements on a type that in specific cases might be scalable.
Since this function only has correct behaviour at the moment on scalable
types anyway, the function can just return false when given a fixed type.

Differential Revision: https://reviews.llvm.org/D109163
2021-09-06 14:25:03 +01:00
Wang, Pengfei e6e8d25920 [X86][mingw] Modify the alignment of __m128/__m256/__m512 vector type for mingw
This is a follow up patch after D78564 and D108887.

Martin helped to confirm the alignment in GCC mingw is the same as the
size of vector. https://reviews.llvm.org/D108887#inline-1040893

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D109265
2021-09-06 20:28:09 +08:00
Justas Janickas 52f7cd23b4 [OpenCL] Fix condition macro name in test 2021-09-06 13:13:13 +01:00
Benjamin Kramer ac312a9d7c [lldb] Silence compiler warnings from 37cbd817d3
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:3638:30: error: moving a temporary object prevents copy elision [-Werror,-Wpessimizing-move]
    return SendErrorResponse(std::move(ret.takeError()));
                             ^
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:3638:30: note: remove std::move call here
    return SendErrorResponse(std::move(ret.takeError()));
                             ^~~~~~~~~~               ~
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:3622:8: error: unused variable 'cf' [-Werror,-Wunused-variable]
  bool cf = packet_str.consume_front("qSaveCore");
2021-09-06 13:04:21 +02:00
Sander de Smalen f330a45752 [AArch64] NFC: Regenerate CHECK lines for sve-masked-gather/scatter-legalize.ll
sve-masked-gather-legalize.ll said the check lines were generated by
the update_llc_test_checks script, but that was not the case.
This patch ensures both tests are generated with the script.

Change-Id: If6f0331ef01ace84017497a484161d1724ac0744
2021-09-06 11:44:36 +01:00
Benjamin Kramer 7fa6b9f610 [lldb] Silence compiler warning after fae0dfa642
lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp:4765:13: warning: enumeration value 'Ibm128' not handled in switch [-Wswitch]
    switch (llvm::cast<clang::BuiltinType>(qual_type)->getKind()) {
            ^
2021-09-06 12:30:47 +02:00
Michał Górny 37cbd817d3 [lldb] [llgs server] Support creating core dumps on NetBSD
Add a new SaveCore() process method that can be used to request a core
dump.  This is currently implemented on NetBSD via the PT_DUMPCORE
ptrace(2) request, and enabled via 'savecore' extension.

Protocol-wise, a new qSaveCore packet is introduced.  It accepts zero
or more semicolon-separated key:value options, invokes the core dump
and returns a key:value response.  Currently the only option supported
is "path-hint", and the return value contains the "path" actually used.
The support for the feature is exposed via qSaveCore qSupported feature.

Differential Revision: https://reviews.llvm.org/D101285
2021-09-06 12:16:14 +02:00
Qiu Chaofan fae0dfa642 [Clang] Add __ibm128 type to represent ppc_fp128
Currently, we have no front-end type for ppc_fp128 type in IR. PowerPC
target generates ppc_fp128 type from long double now, but there's option
(-mabi=(ieee|ibm)longdouble) to control it and we're going to do
transition from IBM extended double-double ppc_fp128 to IEEE fp128 in
the future.

This patch adds type __ibm128 which always represents ppc_fp128 in IR,
as what GCC did for that type. Without this type in Clang, compilation
will fail if compiling against future version of libstdcxx (which uses
__ibm128 in headers).

Although all operations in backend for __ibm128 is done by software,
only PowerPC enables support for it.

There's something not implemented in this commit, which can be done in
future ones:

- Literal suffix for __ibm128 type. w/W is suitable as GCC documented.
- __attribute__((mode(IF))) should be for __ibm128.
- Complex __ibm128 type.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D93377
2021-09-06 18:00:58 +08:00
Sander de Smalen 96f6785bc9 [VectorUtils] Teach findScalarElement to return splat value.
If the vector is a splat of some scalar value, findScalarElement()
can simply return the scalar value if it knows the requested lane
is in the vector.

This is only needed for scalable vectors, because the InsertElement/ShuffleVector
case is already handled explicitly for the fixed-width case.

This helps to recognize an InstCombine fold like:
  extractelt(bitcast(splat(%v))) -> bitcast(%v)

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D107254
2021-09-06 10:56:06 +01:00
David Carlier d669cc7321 [Sanitizer] Intercept clock_getcpuid/pthread_getcpuid on netbsd.
Reviewed By: mgorny

Differential Revision: https://reviews.llvm.org/D109278
2021-09-06 10:51:51 +01:00
LLVM GN Syncbot edc8ce1ecf [gn build] Port 12fa608af4 2021-09-06 09:25:28 +00:00
Tianqing Wang 12fa608af4 [X86] Add CRC32 feature.
d8faf03807 implemented general-regs-only for X86 by disabling all features
with vector instructions. But the CRC32 instruction in SSE4.2 ISA, which uses
only GPRs, also becomes unavailable. This patch adds a CRC32 feature for this
instruction and allows it to be used with general-regs-only.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D105462
2021-09-06 17:24:30 +08:00
Justas Janickas cc9260a0fb [OpenCL] Supports optional generic address space semantics in C++ for OpenCL 2021
Adds support for a feature macro `__opencl_c_generic_adress_space`
in C++ for OpenCL 2021 enabling a respective optional core feature
from OpenCL 3.0. Testing is only performed in SemaOpenCL because
generic address space functionality is yet to be implemented in
C++ for OpenCL 2021.

This change aims to achieve compatibility between C++ for OpenCL
2021 and OpenCL 3.0.

Differential Revision: https://reviews.llvm.org/D108461
2021-09-06 10:20:38 +01:00
Florian Mayer 2706b1a6e2 [hwasan] Test use-after-scope with -fno-exceptions.
Reviewed By: hctim

Differential Revision: https://reviews.llvm.org/D109224
2021-09-06 10:10:09 +01:00
Alexander Belyaev 58c188507f [mlir][linalg] Fix `FoldInitTensorWithDimOp` if dim(init_tensor) is static.
It looks like it was a typo. Instead of `*maybeConstantIndex`,
`initTensorOp.getStaticSize(*maybeConstantIndex)` should be used to access the
dim size of the tensor. There is a test for that in `canonicalize.mlir`, but it
was working correctly because `ReplaceStaticShapeDims` was canonicalizing DimOp
before `FoldInitTensorWithDimOp`. So, to make the patterns more "orthogonal",
this case is disabled.

Differential Revision: https://reviews.llvm.org/D109247
2021-09-06 10:47:26 +02:00
David Spickett 915a8bb5ee Revert "[compiler-rt][Profile] Disable test on Arm/AArch64 Linux"
This reverts commit 8b86f8a325.

The inconsistent behaviour has been fixed with
5e50d3073a.
2021-09-06 08:45:06 +00:00
Moritz Sichert a0a5964499 [RuntimeDyld] Implemented relocation of TLS symbols in ELF
Differential Revision: https://reviews.llvm.org/D105466
2021-09-06 10:27:43 +02:00
Moritz Sichert f687378603 [RuntimeDyld] Implemented relocation for ELF::R_X86_64_GOTPC32
Differential Revision: https://reviews.llvm.org/D95512
2021-09-06 10:26:37 +02:00
Ivan Zhechev 6c1ac141d3 [Flang] Ported test_errors.sh to Python
To enable Flang testing on Windows, shell scripts have to be ported to Python. In this patch the "test_errors.sh" script is ported to python ("test_errors.py"). The RUN line of existing tests was changed to make use of the python script.

Used python regex in place of awk/sed.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D107575
2021-09-06 08:19:42 +00:00
Saiyedul Islam e15836361c [clang-nvlink-wrapper] Add documentation in clang docs
Add documentation of clang-nvlink-wrapper tool in clang.
Add it to the release notes of clang. Fix a small MSVC
warning.

Differential Revision: https://reviews.llvm.org/D109225
2021-09-06 11:43:58 +05:30
Marius Brehler 779368bd9f [mlir][docs] Complement list of supported scf ops 2021-09-06 05:51:36 +00:00
Fangrui Song 0e03450ae4 [AArch64] Remove an uneeded !NeedsWinCFI check. NFC 2021-09-05 21:02:56 -07:00
guopeilin 5f48c144c5 [AArch64][GlobalISel] Use ZExtValue for zext(xor) when invert tb(n)z
Currently, we use SExtValue to decide whether to invert tbz or tbnz.
However, for the case zext (xor x, c), we should use ZExt rather
than SExt otherwise we will generate totally opposite branches.

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D108755
2021-09-06 11:12:07 +08:00
LLVM GN Syncbot fa69ccd189 [gn build] Port 8ce2675b13 2021-09-05 19:38:22 +00:00
Ruslan Arutyunyan 8ce2675b13 [libc++][compare] Implement three_way_comparable[_with] concepts
Implementation of `three_way_comparable` and `three_way_comparable_with` concepts from <compare> header.

Please note that I have temporarily removed `<compare>` header from `<utility>` due to cyclic dependency that prevents using `<concepts>` header in `<compare>` one.

I tried to quickly resolve those issues including applying suggestions from @cjdb and dive deeper by myself but the problem seems more complicated that we thought initially.

I am in progress to prepare the patch with resolving this cyclic dependency between headers but for now I decided to put all that I have to the review to unblock people that depend on that functionality. At first glance the patch with resolving cyclic dependency is not so small (unless I find the way to make it smaller and cleaner) so I don't want to mix everything to one review.

Reviewed By: ldionne, cjdb, #libc, Quuxplusone

Differential Revision: https://reviews.llvm.org/D103478
2021-09-05 12:38:08 -07:00
Benjamin Kramer 1a88bd68c1 [Bazel] Add missing dependency after 650bbc5620 2021-09-05 21:14:05 +02:00
Arthur Eubanks 0df277a13f [test] Remove some legacy PM tests in llvm/test/Instrumentation/AddressSanitizer 2021-09-05 12:06:14 -07:00
Arthur Eubanks 86d1a0b306 [test] Remove some legacy PM tests in llvm/test/Instrumentation 2021-09-05 11:51:19 -07:00
Arthur Eubanks a43853aecd [test] Remove -loop-guard-widening legacy PM tests 2021-09-05 11:36:21 -07:00
Kazu Hirata dfc46f0268 [clang-tidy] Drop unnecessary const from return types (NFC)
Identified with readability-const-return-type.
2021-09-05 08:37:27 -07:00
David Green 1b83aaaefa [DAG] Remove oneuse check in select_cc setgt X, -1, C, ~C fold
This appears to produce better code, even if the condition may need to
be replicated.
2021-09-05 16:18:31 +01:00
Simon Pilgrim f114ef3731 [CostModel][X86] Add generic costs for vXi32 MUL -> v2Xi16 PMADDDW folds
Based off the improved fold in D108522

This should eventually allow us to replace the SLM only cost patterns with generic versions.
2021-09-05 16:08:11 +01:00
Simon Pilgrim 9962ebaee5 [CostModel][X86] Add vXi32 multiply pattern tests
Add tests for vXi32 multiplies where the operands have been extended from vXi8/vXi16
2021-09-05 16:08:11 +01:00
David Green 8523fb96a6 [DAG] Fold select_cc setgt X, -1, C, ~C -> xor (ashr X, BW-1), C
Given a select_cc producing a constant and a invertion of the constant
for a comparison more than zero, we can produce an xor with ashr
instead, which produces smaller code. The ashr either sets all bits or
clear all bits depending on if the value is negative. This is then xor'd
with the constant to optionally negate the value.
https://alive2.llvm.org/ce/z/DTFaBZ

This includes a OneUseCheck on the Cmp, which seems to make thinks a
little worse and will be removed in a followup.

Differential Revision: https://reviews.llvm.org/D109149
2021-09-05 16:04:01 +01:00