5 Commits

Author	SHA1	Message	Date
Matt Arsenault	3c7581bbeb	AMDGPU: Use correct register names in inline assembly ... Fixes using physical registers in inline asm from clang. llvm-svn: 305004	2017-06-08 19:03:20 +00:00
Matt Arsenault	3dbeefa978	AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel ... Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444	2017-03-21 21:39:51 +00:00
Matt Arsenault	964a848514	AMDGPU: Convert image intrinsic uses in tests ... llvm-svn: 298386	2017-03-21 16:24:12 +00:00
Matt Arsenault	73d2f8954a	AMDGPU: Fix verifier error from partially undef copy ... In this situation: %VGPR2<def> = BUFFER_LOAD_DWORD_OFFSET %SGPR8_SGPR9_SGPR10_SGPR11, %VGPR7<def,tied3> = V_MAC_F32_e32 %VGPR0<undef>, %VGPR1<kill>, %VGPR7<kill,tied0>, %EXEC<imp-use> %VGPR3_VGPR4_VGPR5_VGPR6<def> = COPY %VGPR0_VGPR1_VGPR2_VGPR3 %VGPR4<def> = COPY %VGPR2 The copy for VGPR1 -> VGPR4 was an error from reading undefined VGPR1, but VGPR4 is defined immediately after this copy. llvm-svn: 275635	2016-07-15 22:32:02 +00:00
Matthias Braun	e29b7689bd	MachineVerifier: subregs so not require defs/valnos on every path ... It is fine for subregister ranges to be undefined on some CFG paths as we may have a "vregX:other_subreg<read-undef> =" def on that path. We do not (and should not) have live segments for the subregister ranges. The MachineVerifier should not complain about this. This is a slight variant of http://llvm.org/PR27705 llvm-svn: 270290	2016-05-20 23:02:13 +00:00