Commit Graph

400 Commits

Author SHA1 Message Date
Rafael Espindola 0a500af186 Correctly Load Mixed FP-GP Variadic Arguments for x86-64.
According to the x86-64 ABI, structures with both floating point and
integer members are split between floating-point and general purpose
registers, and consecutive 32-bit floats can be packed into a single
floating point register.

In the case of variadic functions these are stored to memory and the position
recorded in the va_list. This was already correctly implemented in
llvm.va_start.

The problem is that the code in clang for implementing va_arg was reading
floating point registers from the wrong location.

Patch by Thomas Jablin.

Fixes PR20018.

llvm-svn: 211626
2014-06-24 20:01:50 +00:00
Ulrich Weigand bebc55b13b [PowerPC] Fix small argument stack slot offset for LE
When small arguments (structures < 8 bytes or "float") are passed in a
stack slot in the ppc64 SVR4 ABI, they must reside in the least
significant part of that slot.  On BE, this means that an offset needs
to be added to the stack address of the parameter, but on LE, the least
significant part of the slot has the same address as the slot itself.

For the most part, this is handled in the LLVM back-end, where I just
fixed the LE case in commit r211368.

However, there is one piece of the clang front-end that is also aware of
these stack-slot offsets: PPC64_SVR4_ABIInfo::EmitVAArg.  This patch
updates that routine to take endianness into account.

llvm-svn: 211370
2014-06-20 16:37:40 +00:00
Alp Toker 4925ba7ffe StringRefize TargetInfo::getABI()
llvm-svn: 210402
2014-06-07 23:30:42 +00:00
Robert Lytton 6adb20f720 XCore target: Fix 'typestring' binding qualifier to the array and not the type
Differential Revision: http://reviews.llvm.org/D3949

llvm-svn: 210250
2014-06-05 09:06:21 +00:00
Tim Northover 573cbee543 AArch64/ARM64: rename ARM64 components to AArch64
This keeps Clang consistent with backend naming conventions.

llvm-svn: 209579
2014-05-24 12:52:07 +00:00
Tim Northover 25e8a6754e AArch64/ARM64: update Clang after AArch64 removal.
A few (mostly CodeGen) parts of Clang were tightly coupled to the
AArch64 backend. Now that it's gone, they will not even compile.

I've also deduplicated RUN lines in many of the AArch64 tests. This
might improve "make check-all" time noticably: some of those NEON
tests were monsters.

llvm-svn: 209578
2014-05-24 12:51:25 +00:00
Craig Topper 8a13c4180e [C++11] Use 'nullptr'. CodeGen edition.
llvm-svn: 209272
2014-05-21 05:09:00 +00:00
Robert Lytton db8c1cb02c XCore target: sort typestring enum fields alphabetically
llvm-svn: 209196
2014-05-20 07:19:33 +00:00
Oliver Stannard a3afc69b94 ARM: PCS non-compliance when struct is padded to avoid register/stack split, and requires internal padding
When we were padding a struct to avoid splitting it between registers and
the stack, we were throwing away the type which the argument should be coerced
to.

llvm-svn: 209122
2014-05-19 13:10:05 +00:00
Rafael Espindola 234405bd0f Update for llvm api change.
llvm-svn: 209077
2014-05-17 21:30:14 +00:00
Rafael Espindola 6172277e9f Update for llvm api change.
llvm-svn: 209074
2014-05-17 19:58:16 +00:00
Saleem Abdulrasool b9081f4490 CodeGen: remove MinGW and Cygwin legacy entries
These are now treated as environments.  Remove references to these enumeration
values in order to clean up the unused enumeration entries in LLVM.  The target
normalisation prior to tool invocation should ensure that the old values
continue to function properly.

llvm-svn: 209068
2014-05-17 15:46:59 +00:00
Rafael Espindola b2633b9793 Update for llvm api change.
Now that llvm cannot represent alias cycles, we have to diagnose erros just
before trying to close the cycle. This degrades the errors a bit. The real
solution is what it was before: if we want to provide good errors for these
cases, we have to be able to find a clang level decl given a mangled name
and produce the error from Sema.

llvm-svn: 209008
2014-05-16 19:35:48 +00:00
Rafael Espindola 9750ce7ebd Update for llvm API change.
llvm-svn: 208984
2014-05-16 13:34:28 +00:00
Reid Kleckner 40ca913727 Push record return type classification into CGCXXABI
In the Microsoft C++ ABI, instance methods always return records
indirectly via the second hidden parameter.  This was implemented in
X86_32ABIInfo, but not WinX86_64ABIInfo.

Rather than exposing a handful of boolean methods in the CGCXXABI
interface, we can expose a single method that applies C++ ABI return
value classification rules.

llvm-svn: 208733
2014-05-13 22:05:45 +00:00
Reid Kleckner 37abaca3c2 MS ABI: Pass 'sret' as the second parameter of instance methods
Summary:
MSVC always passes 'sret' after 'this', unlike GCC.  This required
changing a number of places in Clang that assumed the sret parameter was
always first in LLVM IR.

This fixes win64 MSVC ABI compatibility for methods returning structs.

Reviewers: rsmith, majnemer

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D3618

llvm-svn: 208458
2014-05-09 22:46:15 +00:00
James Molloy 6f244b6f78 Reapply r208417 (olista01 'ARM: HFAs must be passed in consecutive registers'). Bots are now pacified.
llvm-svn: 208425
2014-05-09 16:21:39 +00:00
James Molloy 1aa0d5f3b2 Revert r208417 (olista01 'ARM: HFAs must be passed in consecutive registers'). This is a followon commit from r208413 which broke the LLVM bots.
llvm-svn: 208422
2014-05-09 16:17:09 +00:00
Oliver Stannard 19f3b4f2ce ARM: HFAs must be passed in consecutive registers
This is the clang counterpart to 208413, which ensures that Homogeneous
Floating-point Aggregates are passed in consecutive registers on ARM.

llvm-svn: 208417
2014-05-09 15:14:56 +00:00
Rafael Espindola 8dcd6e767b Replace virtual with override.
llvm-svn: 208324
2014-05-08 15:01:48 +00:00
James Molloy 467be60748 [ARM64-BE] Correctly deal with single element HFAs in varargs.
Just because the first "if" didn't fire, doesn't mean we can not have
an HFA in the "else" clause.

llvm-svn: 208216
2014-05-07 14:45:55 +00:00
Oliver Stannard 39d26c98c5 ARM: Fix assertion caused by passing bitfield struct using ABIArgInfo::getExpandWithPadding
In cases where a struct must, according to the AAPCS, not be split between
general purpose and floating point registers, we use
ABIArgInfo::getExpandWithPadding to add the padding arguments. However,
ExpandWithPadding does not work if the struct contains bitfields, so we
instead must use ABIArgInfo::getDirect.

llvm-svn: 208185
2014-05-07 10:39:12 +00:00
Robert Lytton d263f14a0f XCore target: fix initialization bug found by MSan Bot.
llvm-svn: 208072
2014-05-06 09:38:54 +00:00
Robert Lytton 844aeeb15a XCore target: Add TypeString meta data to IR output.
This includes the addition of the virtual function:
	TargetCodeGenInfo::EmitTargetMD()

llvm-svn: 207832
2014-05-02 09:33:20 +00:00
Reid Kleckner ec87fece21 Remove unused variable that I missed in my rush to fix the bots
llvm-svn: 207820
2014-05-02 01:17:12 +00:00
Reid Kleckner 7f5f0f3f6e Win64: Use ConvertType instead of checking the MS inheritance
dependent-type-member-pointer.cpp is failing on a win64 bot because
-fms-extensions is not enabled.  Use ConvertType rather than relying on
the inheritance attributes.  It's less code, but probably slower.

llvm-svn: 207819
2014-05-02 01:14:59 +00:00
Reid Kleckner 9005f41837 Win64: Pass member pointers larger than 8 bytes by reference
The Win64 ABI docs on MSDN say that arguments bigger than 8 bytes are
passed by reference.  Prior to this change, we were only applying this
logic to RecordType arguments.  This affects both the Itanium and
Microsoft C++ ABIs.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D3587

llvm-svn: 207817
2014-05-02 00:51:20 +00:00
James Molloy 7f4ba53ef0 [ARM64] Add a missed case label for arm64_be, and enable the aarch64-varargs test for arm64_be.
This ensures that r203917 (cpirker "AArch64_be varargs processing for ARM ABI") is ported to ARM64.

llvm-svn: 206961
2014-04-23 10:26:08 +00:00
Bob Wilson 373af73ad4 ARM64: Do not expand variadic HFA/HVA arguments with the Darwin ABI.
Unlike the standard AAPCS64 ABI, variadic arguments are always passed on the
stack with the Darwin ABI, and this was not being considered when deciding
whether to expand HFA/HVA arguments in a call. An HFA argument with a "float"
base type was being expanded into separate "float" arguments, each of which
was then extended to a double, resulting in a serious mismatch from what is
expected by the va_arg implementation. <rdar://problem/15777067>

llvm-svn: 206729
2014-04-21 01:23:39 +00:00
Bob Wilson 3abf169549 Fix a comment typo.
llvm-svn: 206728
2014-04-21 01:23:36 +00:00
Tim Northover 4dab69815c ARM64: make sure the caller is expected to extend in AAPCS.
This is one of those DarwinPCS differences. It'd been caught in
arguments, but not return values.

llvm-svn: 206594
2014-04-18 13:46:08 +00:00
Tim Northover 07f1624aa2 ARM64: make sure HFAs on the stack get properly aligned.
Another AAPCS bug, part of PR19432.

llvm-svn: 206580
2014-04-18 10:47:44 +00:00
Tim Northover 5ffc092700 ARM64: remove holes from *all* HFAs on the stack.
My first attempt to make sure HFAs were contiguous was in the block dealing
with padding registers, which meant it only triggered on the first stack-based
HFA. This should extend it to the rest as well.

Another part of PR19432.

llvm-svn: 206456
2014-04-17 10:20:38 +00:00
Eli Bendersky e1627b43f9 Replace push_back()s by initializer list for shorter and cleaner code.
llvm-svn: 206304
2014-04-15 17:19:26 +00:00
Eli Bendersky e06a2c4f90 Add support for CUDA __launch_bounds__ attribute to CodeGen.
Sema does have a CUDALaunchBoundsAttr, but CodeGen was doing nothing with it.
This change translates CUDALaunchBoundsAttr to maxntidx and minctasm
metadata, which NVPTX then translates to the correct PTX directives.

Patch by Manjunath Kudlur.

llvm-svn: 206302
2014-04-15 16:57:05 +00:00
Tim Northover c801b4a2aa ARM64: track alignment padding registers on AAPCS targets
This implements clause C.8 of the AAPCS in the front-end, so that Clang
accurately knows when the registers run out and it has to insert padding before
the stack objects begin.

PR19432.

llvm-svn: 206296
2014-04-15 14:55:11 +00:00
Reid Kleckner d378a71b4e inalloca: Pad the struct *after* inserting each arg
This ensures that the overall struct size will be a multiple of 4, as
required by the ABI.

llvm-svn: 205981
2014-04-10 19:09:43 +00:00
Tim Northover a2ee433c8d ARM64: initial clang support commit.
This adds Clang support for the ARM64 backend. There are definitely
still some rough edges, so please bring up any issues you see with
this patch.

As with the LLVM commit though, we think it'll be more useful for
merging with AArch64 from within the tree.

llvm-svn: 205100
2014-03-29 15:09:45 +00:00
Christian Pirker f01cd6f57b Add ARM big endian Target (armeb, thumbeb)
Reviewed at http://llvm-reviews.chandlerc.com/D3096

llvm-svn: 205008
2014-03-28 14:40:46 +00:00
Saleem Abdulrasool 377066a5f5 Use the new Windows environment for target detection
This follows the LLVM change to canonicalise the Windows target triple
spellings.  Rather than treating each Windows environment as a single entity,
the environments are now modelled properly as an environment.  This is a
mechanical change to convert the triple use to reflect that change.

llvm-svn: 204978
2014-03-27 22:50:18 +00:00
Aaron Ballman ec47bc2bae [C++11] Replacing CGFunctionInfo arg iterators with iterator_range arguments(). Updating all of the usages of the iterators with range-based for loops.
llvm-svn: 204068
2014-03-17 18:10:01 +00:00
Christian Pirker f5164229f3 AArch64_be varargs processing for ARM ABI
llvm-svn: 203917
2014-03-14 11:51:06 +00:00
Aaron Ballman 574705ed7f [C++11] Replacing CXXRecordDecl iterators bases_begin() and bases_end() with iterator_range bases(). Updating all of the usages of the iterators with range-based for loops.
llvm-svn: 203803
2014-03-13 15:41:46 +00:00
Oliver Stannard 7c3c09e23f ARM: Correct alignment of structs passed as byval pointer
When a struct has bitfields overlapping with other members
(as required by the AAPCS), clang uses a packed struct to
represent this. If such a struct is large enough for clang to
pass it as a byval pointer (>64 bytes), we need to set the
alignment of the argument to match the original type.

llvm-svn: 203660
2014-03-12 14:02:50 +00:00
Craig Topper 4f12f10de4 [C++11] Add 'override' keyword to virtual methods that override their base class.
llvm-svn: 203643
2014-03-12 06:41:41 +00:00
Aaron Ballman e8a8baef44 [C++11] Replacing RecordDecl iterators field_begin() and field_end() with iterator_range fields(). Updating all of the usages of the iterators with range-based for loops.
llvm-svn: 203355
2014-03-08 20:12:42 +00:00
Robert Lytton d21e2d76fc correct consitency of XCore caps
llvm-svn: 202711
2014-03-03 13:45:29 +00:00
Christian Pirker 9b019ae899 Add AArch64 big endian Target (aarch64_be)
llvm-svn: 202151
2014-02-25 13:51:00 +00:00
Reid Kleckner fab1e89de9 MS ABI: Return sret parameters when using inalloca
Previously the X86 backend would look for the sret attribute and handle
this for us.  inalloca takes that all away, so we have to do the return
ourselves now.

llvm-svn: 202097
2014-02-25 00:59:14 +00:00
Roman Divacky f02c9944c8 Implement getDwarfEHStackPointer() and initDwarfEHRegSizeTable() for sparcv9.
llvm-svn: 202059
2014-02-24 18:46:27 +00:00