85f60cc5a8
Oops. I didn't mean to commit this piece yet.
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llvm-svn: 78146
2009-08-05 02:47:13 +00:00
f9bbcd1afd
Major calling convention code refactoring.
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Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
llvm-svn: 78142
2009-08-05 01:29:28 +00:00
cbf1e16ad9
Remove an unnecessary flush in the CppBackend's output.
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llvm-svn: 78138
2009-08-05 01:06:38 +00:00
c6b5e8a5c5
Don't flush the raw_ostream between each MachineFunction. These flush
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calls were originally put in place because errs() at one time was
not unbuffered, and these print routines are commonly used with errs()
for debugging. However, errs() is now properly unbuffered, so the
flush calls are no longer needed. This significantly reduces the
number of write(2) calls for regular asm printing when there are many
small functions.
llvm-svn: 78137
2009-08-05 00:49:25 +00:00
20f79e321e
Change DAG nodes for Neon VLD2/3/4 operations to return multiple results.
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Get rid of yesterday's code to fix the register usage during isel.
Select the new DAG nodes to machine instructions. The new pre-alloc pass
to choose adjacent registers for these results is not done, so the
results of this will generally not assemble yet.
llvm-svn: 78136
2009-08-05 00:49:09 +00:00
1b02ceeb41
1) Proper emit displacements for x86, using absolute relocations where necessary
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for ELF to work.
2) RIP addressing: Use SIB bytes for absolute relocations where RegBase=0,
IndexReg=0.
3) The JIT can get the real address of cstpools and jmptables during
code emission, fix that for object code emission
llvm-svn: 78129
2009-08-05 00:11:21 +00:00
7cc6aca1e6
Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
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llvm-svn: 78126
2009-08-04 23:47:55 +00:00
a8720101b5
Replace dregsingle operand modifier with explicit escaped curly brackets.
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For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.
llvm-svn: 78109
2009-08-04 21:39:33 +00:00
f2dbd2e205
Restlyize to match other targets, fixes cmake build to boot.
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llvm-svn: 78105
2009-08-04 21:27:06 +00:00
783b65b546
Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
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llvm-svn: 78104
2009-08-04 21:12:13 +00:00
cd450bbbe5
remove a random reference to subtarget. Even without this, we
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still get "intel syntax" instructions from llc with
-x86-asm-syntax=intel
llvm-svn: 78103
2009-08-04 21:12:08 +00:00
30bf625ac2
Add NEON single-precision FP support for fabs and fneg.
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llvm-svn: 78101
2009-08-04 20:39:05 +00:00
16dc0cd8a2
rip out SectionEndDirectiveSuffix support, only uses by
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the masm backend. If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.
llvm-svn: 78096
2009-08-04 20:09:41 +00:00
d302ab9961
Most flags are reserved registers on Blackfin.
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The only exception is CC.
llvm-svn: 78089
2009-08-04 19:16:55 +00:00
a3abe2a7ce
In thumb mode, r7 is used as frame register. This fixes pr4681.
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llvm-svn: 78086
2009-08-04 18:46:17 +00:00
a3839bc6c0
Match common pattern for FNMAC. Add NEON SP support.
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llvm-svn: 78085
2009-08-04 18:44:29 +00:00
b4c28d23e1
Legalize i64 store operations generated by inst-combine.
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llvm-svn: 78082
2009-08-04 17:59:16 +00:00
3b9c52c5c1
Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
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llvm-svn: 78081
2009-08-04 17:53:06 +00:00
ed65bf420d
Avoid compiler warning (in -Asserts mode)
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llvm-svn: 78070
2009-08-04 16:46:12 +00:00
f222054df7
enhance codegen to put 16-bit character strings into the
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__TEXT,__ustring section on darwin.
llvm-svn: 78068
2009-08-04 16:27:13 +00:00
eee9df0e97
fix a fixme: don't create an explicit "CStringSection" for ELF,
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it is just being used as a prefix, so forward substitute it directly.
llvm-svn: 78067
2009-08-04 16:19:50 +00:00
81bbf443fe
Add support emiting for 2/4 byte mergable strings to the ".rodata.str*"
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section on ELF targets.
llvm-svn: 78066
2009-08-04 16:13:09 +00:00
d0a53d380a
Ooops, I was too fast to commit the wrong fix :(
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llvm-svn: 78060
2009-08-04 11:18:31 +00:00
3c5b68e2a7
Fix a typo - this unbreaks llvm-gcc build on arm
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llvm-svn: 78059
2009-08-04 11:12:51 +00:00
3870fbb561
Thumb2 does not have ib (increment before) and da (decrement after) forms of ldm / stm.
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llvm-svn: 78057
2009-08-04 08:34:18 +00:00
b58dc1c667
make MergeableCString be a SectionKind "abstract class", and
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add new concrete versions for 1/2/4-byte mergable strings.
These are not actually created yet.
llvm-svn: 78055
2009-08-04 05:35:56 +00:00
ad9a6c4855
No really, it's unused.
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llvm-svn: 78047
2009-08-04 04:08:40 +00:00
09c1d0002b
Remove now unused Module argument to createTargetMachine.
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llvm-svn: 78043
2009-08-04 04:02:45 +00:00
f43cf709cb
Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler.
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llvm-svn: 78032
2009-08-04 01:56:09 +00:00
71756e789b
Load / store multiple pass fixes for Thumb2. Not enabled yet.
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llvm-svn: 78031
2009-08-04 01:43:45 +00:00
03eb0e3c33
Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.
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llvm-svn: 78030
2009-08-04 01:41:15 +00:00
f45dee3ad2
Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate the
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results to fixed registers.
llvm-svn: 78025
2009-08-04 00:36:16 +00:00
17f8878114
Minor cleanup. No functional changes intended.
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llvm-svn: 78024
2009-08-04 00:25:01 +00:00
3ddfff98a0
Update CMake files.
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llvm-svn: 78020
2009-08-03 23:44:01 +00:00
d033a62ff7
remove an unneeded section switch.
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llvm-svn: 78014
2009-08-03 23:02:45 +00:00
661710c51d
switch ppc to using SwitchToSection instead of textual section stuff.
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llvm-svn: 78013
2009-08-03 22:52:21 +00:00
09441faba9
use TLOF to compute the section for a function instead of
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replicating the logic manually.
llvm-svn: 78011
2009-08-03 22:32:50 +00:00
73ebe435ca
convert macho stub emission to use SwitchToSection instead of
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textual sections.
llvm-svn: 78007
2009-08-03 22:18:15 +00:00
e7a932d145
hoist some common code out of a switch
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llvm-svn: 78006
2009-08-03 22:16:57 +00:00
feb01a100b
this really shouldn't switch sections without telling the asmprinter, but
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hey it uses .previous, so it should work :)
llvm-svn: 78004
2009-08-03 21:57:00 +00:00
d2c179c8f6
Eliminate textual section switching from the x86 backend, one
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more step towards "semantics sections"
llvm-svn: 78002
2009-08-03 21:53:27 +00:00
f307e0bd6d
Lower CONCAT_VECTOR during legalization instead of matching it during isel.
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Add a testcase.
llvm-svn: 77992
2009-08-03 20:36:38 +00:00
a73416bd1c
Minor stylistic cleanups in the Blackfin target.
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Thanks Chris.
llvm-svn: 77987
2009-08-03 19:32:30 +00:00
87a2ebd77d
remove a dead switch directive, replace it with some
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code that I will be using shortly.
llvm-svn: 77983
2009-08-03 19:10:44 +00:00
3aa1e77572
Remove neverHasSideEffects on MMX_MOVD64rrv164 since it has a matching pattern.
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llvm-svn: 77978
2009-08-03 18:07:19 +00:00
21f54a7572
eliminate textual section switching from intel asm printer.
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This will cause it to enter the ".text" section instead of "_text"
but masm is already broken.
llvm-svn: 77977
2009-08-03 18:06:07 +00:00
1b7868ec54
Change C, CBE, MSIL to not provide target data via getTargetData().
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- The theory is these should never actually be called, since these boil down to
passes which can access the target data via the standard mechanism.
llvm-svn: 77975
2009-08-03 17:40:25 +00:00
c28b306423
llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:".
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llvm-svn: 77971
2009-08-03 13:33:33 +00:00
f48daf5823
Unbreak win64 compilation callback.
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Since we're generating stubs by hands we don't follow the ABI and don't
create a register spill area.
Don't use this area in compilation callback!
llvm-svn: 77968
2009-08-03 08:43:36 +00:00
03056efe01
Create proper frame index for FP
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llvm-svn: 77966
2009-08-03 08:14:30 +00:00
Bob Wilson