Commit Graph

427124 Commits

Author SHA1 Message Date
Michał Górny 13dfe0f0fc [lldb] [test] Update baseline test status for FreeBSD
Fixes #19721
Fixes #18440
Partially fixes bug #47660
Fixes #47761
Fixes #47763

Sponsored by: The FreeBSD Foundation
2022-06-17 14:35:18 +02:00
Matthias Springer b55d55ecd9 [mlir][bufferize][NFC] Remove BufferizationState
With the recent refactorings, this class is no longer needed. We can use BufferizationOptions in all places were BufferizationState was used.

Differential Revision: https://reviews.llvm.org/D127653
2022-06-17 14:04:11 +02:00
Jolanta Jensen c80c57674e [Clang] Allow 'Complex float __attribute__((mode(HC)))'
Adding half float to types that can be represented by __attribute__((mode(xx))).
Original implementation authored by George Steed.

Differential Revision: https://reviews.llvm.org/D126479
2022-06-17 12:39:52 +01:00
Matthias Springer b3ebe3beed [mlir][bufferize] Bufferize after TensorCopyInsertion
This change changes the bufferization so that it utilizes the new TensorCopyInsertion pass. One-Shot Bufferize no longer calls the One-Shot Analysis. Instead, it relies on the TensorCopyInsertion pass to make the entire IR fully inplacable. The `bufferize` implementations of all ops are simplified; they no longer have to account for out-of-place bufferization decisions. These were already materialized in the IR in the form of `bufferization.alloc_tensor` ops during the TensorCopyInsertion pass.

Differential Revision: https://reviews.llvm.org/D127652
2022-06-17 13:29:52 +02:00
Jay Foad 03a9910325 [AMDGPU] Use explicit -global-isel=0/1 in tests. NFC. 2022-06-17 11:53:07 +01:00
lorenzo chelini 84519bc5f7 [LLVM][IR] Fix typo in DerivedTypes.h (NFC) 2022-06-17 12:38:23 +02:00
Tiehu Zhang b329156f4f [AArch64][LV] AArch64 does not prefer vectorized addressing
TTI::prefersVectorizedAddressing() try to vectorize the addresses that lead to loads.
For aarch64, only gather/scatter (supported by SVE) can deal with vectors of addresses.
This patch specializes the hook for AArch64, to return true only when we enable SVE.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D124612
2022-06-17 18:32:50 +08:00
Kadir Cetinkaya 32805e60c9
[clang] Dont print implicit forrange initializer
Fixes https://github.com/clangd/clangd/issues/1158

Differential Revision: https://reviews.llvm.org/D127863
2022-06-17 11:29:44 +02:00
Nikita Popov daf897d559 [IR] Check for SignedMin/-1 division in canTrap() (PR56038)
In addition to division by zero, signed division also traps for
SignedMin / -1. This was handled in isSafeToSpeculativelyExecute(),
but not in Constant::canTrap().
2022-06-17 11:25:11 +02:00
Alex Zinenko 610139d2d9 [mlir] replace 'emit_c_wrappers' func->llvm conversion option with a pass
The 'emit_c_wrappers' option in the FuncToLLVM conversion requests C interface
wrappers to be emitted for every builtin function in the module. While this has
been useful to bootstrap the interface, it is problematic in the longer term as
it may unintentionally affect the functions that should retain their existing
interface, e.g., libm functions obtained by lowering math operations (see
D126964 for an example). Since D77314, we have a finer-grain control over
interface generation via an attribute that avoids the problem entirely. Remove
the 'emit_c_wrappers' option. Introduce the '-llvm-request-c-wrappers' pass
that can be run in any pipeline that needs blanket emission of functions to
annotate all builtin functions with the attribute before performing the usual
lowering that accounts for the attribute.

Reviewed By: chelini

Differential Revision: https://reviews.llvm.org/D127952
2022-06-17 11:10:31 +02:00
Guillaume Chatelet c26366979b [libc][bazel] Remove memcpy dependency in memmove 2022-06-17 09:07:24 +00:00
Cullen Rhodes 5ffbac340d [AArch64] NFC: Fix BFMLAL[BT] inst def names 2022-06-17 08:54:51 +00:00
Alexander Potapenko 7ab44b5c21 [msan] Allow KMSAN to use -fsanitize-memory-param-retval
Let -fsanitize-memory-param-retval be used together with
-fsanitize=kernel-memory, so that it can be applied when building the
Linux kernel.

Also add clang/test/CodeGen/kmsan-param-retval.c to ensure that
-fsanitize-memory-param-retval eliminates shadow accesses for parameters
marked as undef.

Reviewed By: eugenis, vitalybuka

Differential Revision: https://reviews.llvm.org/D127860
2022-06-17 10:54:20 +02:00
Sven van Haastregt 2d9c891cd9 [OpenCL] Fix atomic_fetch_add/sub half overloads
Some of the atomic_fetch_add and atomic_fetch_sub overloads intended
for atomic_half types accidentally had an atomic_float parameter.
2022-06-17 09:53:45 +01:00
Nikita Popov 5ae4a173dd [InstCombine] Add tests for freeze of recurrence with invoke start (NFC) 2022-06-17 10:15:12 +02:00
Muhammad Omair Javaid 3fd9aebbb7 [LLDB] XFAIL TestLoadUnload fails on Arm/Ubuntu Jammy
This patch marks following tests as XFAIL for Arm/Ubuntu Jammy 22.04:
test_lldb_process_load_and_unload_commands
test_load_unload
2022-06-17 12:06:35 +04:00
Benjamin Kramer 1a20252978 Revert "Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI""""
This reverts commit 04a3d5f3a1.

I see two more issues:

- uitofp/sitofp from i32/i64 to half now generates
  __floatsihf/__floatdihf, which exists in neither compiler-rt nor
  libgcc

- This crashes when legalizing the bitcast:
```
; RUN: llc < %s -mcpu=skx
define void @main.45(ptr nocapture readnone %retval, ptr noalias nocapture readnone %run_options, ptr noalias nocapture readnone %params, ptr noalias nocapture readonly %buffer_table, ptr noalias nocapture readnone %status, ptr noalias nocapture readnone %prof_counters) local_unnamed_addr {
entry:
  %fusion = load ptr, ptr %buffer_table, align 8
  %0 = getelementptr inbounds ptr, ptr %buffer_table, i64 1
  %Arg_1.2 = load ptr, ptr %0, align 8
  %1 = getelementptr inbounds ptr, ptr %buffer_table, i64 2
  %Arg_0.1 = load ptr, ptr %1, align 8
  %2 = load half, ptr %Arg_0.1, align 8
  %3 = bitcast half %2 to i16
  %4 = and i16 %3, 32767
  %5 = icmp eq i16 %4, 0
  %6 = and i16 %3, -32768
  %broadcast.splatinsert = insertelement <4 x half> poison, half %2, i64 0
  %broadcast.splat = shufflevector <4 x half> %broadcast.splatinsert, <4 x half> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert9 = insertelement <4 x i16> poison, i16 %4, i64 0
  %broadcast.splat10 = shufflevector <4 x i16> %broadcast.splatinsert9, <4 x i16> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert11 = insertelement <4 x i16> poison, i16 %6, i64 0
  %broadcast.splat12 = shufflevector <4 x i16> %broadcast.splatinsert11, <4 x i16> poison, <4 x i32> zeroinitializer
  %broadcast.splatinsert13 = insertelement <4 x i16> poison, i16 %3, i64 0
  %broadcast.splat14 = shufflevector <4 x i16> %broadcast.splatinsert13, <4 x i16> poison, <4 x i32> zeroinitializer
  %wide.load = load <4 x half>, ptr %Arg_1.2, align 8
  %7 = fcmp uno <4 x half> %broadcast.splat, %wide.load
  %8 = fcmp oeq <4 x half> %broadcast.splat, %wide.load
  %9 = bitcast <4 x half> %wide.load to <4 x i16>
  %10 = and <4 x i16> %9, <i16 32767, i16 32767, i16 32767, i16 32767>
  %11 = icmp eq <4 x i16> %10, zeroinitializer
  %12 = and <4 x i16> %9, <i16 -32768, i16 -32768, i16 -32768, i16 -32768>
  %13 = or <4 x i16> %12, <i16 1, i16 1, i16 1, i16 1>
  %14 = select <4 x i1> %11, <4 x i16> %9, <4 x i16> %13
  %15 = icmp ugt <4 x i16> %broadcast.splat10, %10
  %16 = icmp ne <4 x i16> %broadcast.splat12, %12
  %17 = or <4 x i1> %15, %16
  %18 = select <4 x i1> %17, <4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> <i16 1, i16 1, i16 1, i16 1>
  %19 = add <4 x i16> %18, %broadcast.splat14
  %20 = select i1 %5, <4 x i16> %14, <4 x i16> %19
  %21 = select <4 x i1> %8, <4 x i16> %9, <4 x i16> %20
  %22 = bitcast <4 x i16> %21 to <4 x half>
  %23 = select <4 x i1> %7, <4 x half> <half 0xH7E00, half 0xH7E00, half 0xH7E00, half 0xH7E00>, <4 x half> %22
  store <4 x half> %23, ptr %fusion, align 16
  ret void
}
```

llc: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:977: void (anonymous namespace)::SelectionDAGLegalize::LegalizeOp(llvm::SDNode *): Assertion `(TLI.getTypeAction(*DAG.getContext(), Op.getValueType()) == TargetLowering::TypeLegal || Op.getOpcode() == ISD::TargetConstant || Op.getOpcode() == ISD::Register) && "Unexpected illegal type!"' failed.
2022-06-17 09:43:07 +02:00
Javier Alvarez 5ea341d7c4 [clang] Fix trivially copyable for copy constructor and copy assignment operator
From [class.copy.ctor]:

```
A non-template constructor for class X is a copy constructor if its first
parameter is of type X&, const X&, volatile X& or const volatile X&, and
either there are no other parameters or else all other parameters have
default arguments (9.3.4.7).

A copy/move constructor for class X is trivial if it is not user-provided and if:
- class X has no virtual functions (11.7.3) and no virtual base classes (11.7.2), and
- the constructor selected to copy/move each direct base class subobject is trivial, and
- or each non-static data member of X that is of class type (or array thereof),
  the constructor selected to copy/move that member is trivial;

otherwise the copy/move constructor is non-trivial.
```

So `T(T&) = default`; should be trivial assuming that the previous
provisions are met.

This works in GCC, but not in Clang at the moment:
https://godbolt.org/z/fTGe71b6P

Reviewed By: royjacobson

Differential Revision: https://reviews.llvm.org/D127593
2022-06-17 10:35:01 +03:00
ping.deng 880ac5189d [RISCV][NFC] Add load/store instructions in rv64*-invalid.s
Reviewed By: benshi001, sunshaoce

Differential Revision: https://reviews.llvm.org/D127721
2022-06-17 06:53:19 +00:00
Fangrui Song c324c938be [Driver] Pass -X to ld for riscv*-{elf,freebsd,linux}
GNU ld has a hack that defaults to -X (--discard-locals) in the emulation file
`riscvelf.em`. The recommended way, as gcc/config/arm does, is to let the
compiler driver pass -X to ld.
(The motivation is likely to discard a plethora of `.L` symbols due to linker
relaxation.)

lld default to --discard-none. To make clang+lld match GNU ld's behavior, pass
-X to ld.

Note: GNU ld has a special rule to treat ld -r -s as ld -r -S -x. With -X, driver `-r -Wl,-s`
will behave as ld `-r -S -X`. This removes fewer symbols than `-r -S -x` but is safe.

Differential Revision: https://reviews.llvm.org/D127826
2022-06-16 23:33:48 -07:00
Xiang Li 0d2dde20be [TableGen][DirectX] generate DXIL operation table with TableGen.
Add more feature to tableGen backend gen-dxil-operation.

It will generate getOpCodeProperty, getOpCodeClassName and getOpCodeName when build DirectX target.
Each of these functions has a table which generate based on DXIL operations.

These generated functions will replace the manually written functions which used for query DXIL operation information.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D125520
2022-06-16 23:25:57 -07:00
Fangrui Song f4b7b66c4c [AArch64][test] Add --mattr=-{sve,sve2,sme} to SVE/SVE2/SME MC tests
llvm-objdump will be changed to default to disassemble all instructions.
Add --mattr=-{sve,sve2,sme} to keep the desired testing.
2022-06-16 22:41:39 -07:00
Mingming Liu 1e67385d28 [MachineBlockPlacementStats] Added check for "-filter-print-funcs"
option to the machine-block-placement-stats.

Differential Revision: https://reviews.llvm.org/D128019
2022-06-16 21:59:54 -07:00
Mingming Liu b7d09557f6 Revert "[MachineBlockPlacementStats] Add check for `-filter-print-funcs` option to machine-block-placement stats."
This reverts commit 46d45df451. Going to
add differential revision link to commit message and re-commit.
2022-06-16 21:56:08 -07:00
Mingming Liu 46d45df451 [MachineBlockPlacementStats] Add check for `-filter-print-funcs` option to machine-block-placement stats. 2022-06-16 21:48:08 -07:00
Phoebe Wang 04a3d5f3a1 Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI"""
Fix the crash on lowering X86ISD::FCMP.
2022-06-17 12:12:17 +08:00
Jonas Devlieghere de74756571
[lldb] Remove LogHandler::Create functions (NFC)
Remove the LogHandler::Create functions. Except for the StreamHandler
they were just forwarding their arguments to std::make_shared.
2022-06-16 21:04:08 -07:00
Jez Ng 8eeede973c [lld-macho][nfc] Tests for -force_load + regular archive load combinations
I realized we'd forgotten to cover this case (though our existing
behavior is indeed correct / matches ld64's).

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D128025
2022-06-16 23:50:07 -04:00
Jacques Pienaar 02b9ddb2f2 [mlir] Disable warning in test of deprecated feature (NFC)
Disable warning for deprecation in test of deprecated feature. Also
remove additional test of deprecated feature from TestOps.td.
2022-06-16 20:15:13 -07:00
Jacques Pienaar d30c0221cf [mlir] Split MLProgram global load and store to Graph variants
* Split ops into X_graph variants as discussed;
* Remove tokens from non-Graph region variants and rely on side-effect
  modelling there while removing side-effect modelling from Graph
  variants and relying on explicit ordering there;
* Make tokens required to be produced by Graph variants - but kept
  explicit token type specification given previous discussion on this
  potentially being configurable in future;

This results in duplicating some code. I considered adding helper
functions but decided against adding an abstraction there early given
size of duplication and creating accidental coupling.

Differential Revision: https://reviews.llvm.org/D127813
2022-06-16 20:01:54 -07:00
Lian Wang f2bcf33058 [LegalizeTypes][NFC] Merge promote SPLAT_VECTOR and promote SCALAR_TO_VECTOR to one function
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D127825
2022-06-17 02:43:52 +00:00
Jacques Pienaar 287ade415e [mlir][doc] Avoid duplication with constraints and defs
Where a constraint also has a def, emit the def only to avoid duplicate
output (and def has more complete info). Also move attributes and types
to the end rather than some on top and some at end.

Differential Revision: https://reviews.llvm.org/D127823
2022-06-16 19:42:56 -07:00
Lian Wang 16215eb979 [LegalizeTypes][RISCV][NFC] Modify assert in PromoteIntRes_STEP_VECTOR and add some tests for RISCV
Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D127939
2022-06-17 02:26:09 +00:00
Lian Wang 5e16a781ba [RISCV][NFC][test] Correct a wrong test in vreductions-fp-vp.ll
Reviewed By: victor-eds, frasercrmck

Differential Revision: https://reviews.llvm.org/D127946
2022-06-17 02:22:59 +00:00
Lang Hames 232bd331cb [ORC-RT] Make the ORC runtime C API public.
This is a first step towards allowing programs to pre-link against the ORC
runtime, which would allow us to move some code that is currently in the LLVM
OrcTarget library into the ORC runtime instead.

The C API header has limited utility as-is, but serves as a minimal first step
and provides clients with tools for interacting with wrapper functions.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D127324
2022-06-16 19:02:23 -07:00
Matt Arsenault 32bd0c1714 llvm-reduce: Try to fix dynamic libraries build 2022-06-16 21:48:04 -04:00
Maryam Moghadas 711a71d1ab PowerPC] Emit warning for incompatible vector types that are currently diagnosed with -fno-lax-vector-conversions
This patch is the last prerequisite to switch the default behaviour to -fno-lax-vector-conversions in the future.
The first path ;D124093; fixed the altivec implicit castings.

Reviewed By: amyk

Differential Revision: https://reviews.llvm.org/D126540
2022-06-16 20:28:34 -05:00
Lei Huang febe4f650b [PowerPC][NFC] Undefine __XL_COMPAT_ALTIVEC__ in builtin lit test
Add defines and undefines of the __XL_COMPAT_ALTIVEC__ to ensure
consistent results regardless of the default for this macro.
2022-06-16 20:16:52 -05:00
Jennifer Yu bb83f8e70b [OpenMP] Initial parsing and sema for 'parallel masked' construct
Differential Revision: https://reviews.llvm.org/D127454
2022-06-16 18:01:15 -07:00
LiaoChunyu 6181c19283 [AMDGPU][NFC] Remove isConstantAddr
fix isConstantAddr defined but not used

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D127959
2022-06-17 08:49:29 +08:00
LLVM GN Syncbot 6f1a7eb9e7 [gn build] Port eea11e7369 2022-06-17 00:40:13 +00:00
Matt Arsenault eea11e7369 llvm-reduce: Add reduction pass to simplify instructions 2022-06-16 20:39:27 -04:00
Matt Arsenault 6b8bd0f72d llvm-reduce: Support replacing FP values with 1.0 2022-06-16 20:13:17 -04:00
Pengxuan Zheng 2e0c46044a [Object][COFF] Improve section name parsing
Inspired by discussions on D127369, we probably can further improve LLVM's COFF
section name parsing. Hopefully, this makes the logic simpler and handles some
edge cases more elegantly.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D127902
2022-06-16 17:01:10 -07:00
Fangrui Song 0e182469ee [sanitizer] Delete empty sanitizer_openbsd.cpp after D89759 2022-06-16 16:38:01 -07:00
Paul Walker fcd058acc9 [SVE][CodeGen] Restructure SVE fixed length tests to use update_llc_test_checks.
Most tests have been updated to make use of vscale_range to reduce
the number of RUN lines.  For the remaining RUN lines the check
prefixes have been updated to ensure the original expectation of
the manual CHECK lines is maintained after update_llc_test_checks
is run.
2022-06-17 00:30:56 +01:00
Jonas Devlieghere af6ec9200b
[lldb] Cleanup Python API reference files after building the docs
The sphinx-automodapi extension requires that the generated RST files
live next to the index file. This means that we generate them in the
source directory rather than the build directory. This patch ensures
these files are removed again when sphinx finishes its build.

The proper solution to this problem would be to move everything in the
doc folder from the source directory to the build directory before
generating the docs.

I believe that old RST files being kept around is the reason that the
Python API references on the website isn't getting updated. This patch
is meant as a speculative fix and a way to confirm that.
2022-06-16 16:30:49 -07:00
Aart Bik 2a2886160d [mlir][sparse] improved testing and codegen for semi-ring operations
The semi-ring blocks were simply "inlined" by the sparse compiler but
without any filtering or patching. This revision improves the analysis
(rejecting blocks that use non-invariant computations from outside
their blocks, except for linalg.index) and also improves the codegen
by properly patching up index computations (previous version crashed).

With a regression test. Also updated the documentation now that the
example code is properly working.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D128000
2022-06-16 16:13:42 -07:00
LLVM GN Syncbot 21f557e13a [gn build] Port ff3989e6ae 2022-06-16 22:31:40 +00:00
LLVM GN Syncbot 8eefbd2a57 [gn build] Port 61fac2c370 2022-06-16 22:31:39 +00:00