Commit Graph

64501 Commits

Author SHA1 Message Date
Venkatraman Govindaraju 2ea4c2880c [Sparc] Implement JIT for SPARC.
No new testcases. However, this patch makes all supported JIT testcases in 
test/ExecutionEngine  pass on Sparc.

llvm-svn: 192176
2013-10-08 07:15:22 +00:00
Craig Topper a984729f8a Remove unneeded MMX instruction definition by moving pattern to an equivalent instruction definition and removing the filtering from the disassembler table building.
llvm-svn: 192175
2013-10-08 06:30:39 +00:00
Craig Topper 72c8cd7bc3 Remove some instructions that existed to provide aliases to the assembler. Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse.
llvm-svn: 192171
2013-10-08 05:53:50 +00:00
Venkatraman Govindaraju 8223c553cf [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead.
llvm-svn: 192160
2013-10-08 02:50:29 +00:00
David Majnemer f07777c80b Windows: Avoiding resizing, use uninitialized data() instead
This is ever-so faster but more importantly matches what we have elsewhere.

llvm-svn: 192137
2013-10-07 21:57:07 +00:00
Arnold Schwaighofer 0caddfc731 LoopVectorize: External uses must use the last value in a reduction cycle
Otherwise, we don't perform operations that would have been performed on
the scalar version.

Fixes PR17498.

llvm-svn: 192133
2013-10-07 21:05:43 +00:00
Reed Kotler 445d0adc24 Add Mips16 patterns for sign extend byte and sign extend halfword.
llvm-svn: 192130
2013-10-07 20:46:19 +00:00
Manman Ren 5a78755336 Struct byval: use the correct alignment for loads generated to load
from struct byval to registers.

We used to pass 0 which means the alignment of PtrVT. Even when the alignment
of the struct is smaller than 4, the LOADs would have alignment of 4, and
further optimizations could combine the LOADs into a ldm, which would
cause crash.

The fix is to pass the alignment of the struct byval.

rdar://problem/15144402

llvm-svn: 192126
2013-10-07 19:47:53 +00:00
Akira Hatanaka 4c0a71223a [mips] Coding style clean up.
llvm-svn: 192125
2013-10-07 19:33:02 +00:00
Akira Hatanaka 3c0d6afeec [mips] Disable tail merging when long branch pass is enabled.
llvm-svn: 192124
2013-10-07 19:13:53 +00:00
Benjamin Kramer 7b5e159450 X86: Fix type check. Just because an integer type is illegal doesn't mean it's i64.
Fixes PR17495, where an i24 triggered this code. It's intended to
optimize i64 loads on 32 bit x86.

llvm-svn: 192123
2013-10-07 19:11:35 +00:00
Akira Hatanaka a8a05be7d6 [mips] Define method MipsSubtarget::enableLongBranchPass.
llvm-svn: 192122
2013-10-07 19:06:57 +00:00
Alexey Samsonov a1944e6d26 Revert r191834 until we measure the effect of this benchmarks and maybe find a better way to fix it
llvm-svn: 192121
2013-10-07 19:03:24 +00:00
Akira Hatanaka 16048332f1 [mips] Fix definition of mfhi and mflo instructions to read from the whole
accumulator instead of its sub-registers, $hi and $lo. 

We need this change to prevent a mflo following a mtlo from reading an
unpredictable/undefined value, as shown in the following example:

mult $6, $7 // result of $6 * $7 is written to $lo and $hi.
mflo $2     // read lower 32-bit result from $lo.
mtlo $4     // write to $lo. the content of $hi becomes unpredictable.
mfhi $3     // read higher 32-bit from $hi, which has an unpredictable value.

I don't have a test case for this change that reliably reproduces the problem.

llvm-svn: 192119
2013-10-07 18:49:46 +00:00
Richard Mitton 0aafb58aca Formally added an explicit enum for DWARF TLS support. No functionality change.
llvm-svn: 192118
2013-10-07 18:39:18 +00:00
Matt Arsenault fbcbce439d Change objectsize intrinsic to accept different address spaces.
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.

llvm-svn: 192117
2013-10-07 18:06:48 +00:00
Amara Emerson 5035ee0212 [ARM] Improve build attributes emission.
llvm-svn: 192111
2013-10-07 16:55:23 +00:00
Chad Rosier b6ceeb9126 [AArch64] Add support for NEON scalar arithmetic instructions:
SQDMULH, SQRDMULH, FMULX, FRECPS, and FRSQRTS.

llvm-svn: 192107
2013-10-07 16:36:15 +00:00
NAKAMURA Takumi c59b1cae49 Windows/Process.inc: Fix for +Asserts. &Buf[0] is not guaranteed if size is zero.
llvm-svn: 192103
2013-10-07 15:33:30 +00:00
Rafael Espindola 7ef22b84c8 Remove dead code.
Support for exception handling in the legacy JIT was removed in r181354 and
this code was dead since then.

Thanks to Yaron Keren for noticing it.

llvm-svn: 192101
2013-10-07 13:54:50 +00:00
Rafael Espindola e90fd9c5e0 Remove getEHExceptionRegister and getEHHandlerRegister.
They haven't been used for a long time. Patch by MathOnNapkins.

llvm-svn: 192099
2013-10-07 13:39:22 +00:00
Rafael Espindola 41d630f448 Fix the documentation of getDefaultSubtargetFeatures.
Patch by David Nadlinger.

llvm-svn: 192098
2013-10-07 13:34:05 +00:00
Tim Northover f86d1f0b77 ARM: allow cortex-m0 to use hint instructions
The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have
been ported across to the v6M architecture. Fortunately, v6M seems to sit
nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it
fairly easily.

rdar://problem/15144406

llvm-svn: 192097
2013-10-07 11:10:47 +00:00
David Majnemer 17a44966be Windows: Be more explicit with Win32 APIs
This addresses several issues in a similar vein:
 - Use the Unicode APIs when possible, running nm on clang shows that we
   only use Unicode APIs except for FormatMessage, CreateSemaphore, and
   GetModuleHandle.  AFAICT, the latter two are coming from MinGW and
   not LLVM itself.
 - Make getMainExecutable more resilient.  It previously considered
   return values of zero from ::GetModuleFileNameA to be acceptable.

llvm-svn: 192096
2013-10-07 09:52:36 +00:00
Craig Topper 07ad1b23bb Remove some instructions that seem to only exist to trick the filtering checks in the disassembler table creation. Just fix up the filter to let the real instruction through instead.
llvm-svn: 192090
2013-10-07 07:19:47 +00:00
Craig Topper 68d2546ec6 Remove FsMOVAPSrr and friends. They have no patterns and are no longer selected anywhere.
llvm-svn: 192089
2013-10-07 06:10:45 +00:00
Craig Topper a0e0735e6a Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to register moves should be switched from using the MRMSrcReg form to the MRMDestReg form if the source register is a 64-bit extended register and the destination register is not.
This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior and instruction selection already does this.

llvm-svn: 192088
2013-10-07 05:42:48 +00:00
Craig Topper 2658d89728 Add disassembler support for long encodings for INC/DEC in 32-bit mode.
llvm-svn: 192086
2013-10-07 04:28:06 +00:00
David Majnemer 61eae2e30c Revert "Revert "Windows: Add support for unicode command lines""
This reverts commit r192070 which reverted r192069, I forgot to
regenerate the configure scripts.

llvm-svn: 192079
2013-10-07 01:00:07 +00:00
Craig Topper a7afa71494 Fix some assert messages to say the correct opcode name. Looks like one assert got copy and pasted to many places.
llvm-svn: 192078
2013-10-06 22:38:19 +00:00
David Majnemer f636cf422e Revert "Windows: Add support for unicode command lines"
This is causing MinGW bots to fail.
This reverts commit r192069.

llvm-svn: 192070
2013-10-06 20:44:34 +00:00
David Majnemer 80bea0c315 Windows: Add support for unicode command lines
Summary:
The MSVCRT deliberately sends main() code-page specific characters.
This isn't too useful to LLVM as we end up converting the arguments to
UTF-16 and subsequently attempt to use the result as, for example, a
file name.  Instead, we need to have the ability to access the Unicode
command line and transform it to UTF-8.

This has the distinct advantage over using the MSVC-specific wmain()
function as our entry point because:
 - It doesn't work on cygwin.
 - It only work on MinGW with caveats and only then on certain versions.
 - We get to keep our entry point as main(). :)

N.B.  This patch includes fixes to other parts of lib/Support/Windows
s.t. we would be able to take advantage of getting the Unicode paths.
E.G.  clang spawning clang -cc1 would want to give it Unicode arguments.

Reviewers: aaron.ballman, Bigcheese, rnk, ruiu

Reviewed By: rnk

CC: llvm-commits, ygao

Differential Revision: http://llvm-reviews.chandlerc.com/D1834

llvm-svn: 192069
2013-10-06 20:25:49 +00:00
Rafael Espindola 78527050c2 Add support for aliases with linkonce_odr.
This will be used to extend constructor aliases in clang.

llvm-svn: 192066
2013-10-06 15:10:43 +00:00
Benjamin Kramer 858a3880d6 X86: Don't fold spills into SSE operations if the stack is unaligned.
Regalloc can emit unaligned spills nowadays, but we can't fold the
spills into SSE ops if we can't guarantee alignment. PR12250.

llvm-svn: 192064
2013-10-06 13:48:22 +00:00
Elena Demikhovsky 2e408aefe0 AVX-512: added scalar convert instructions and intrinsics.
Fixed load folding in VPERM2I instruction.

llvm-svn: 192063
2013-10-06 13:11:09 +00:00
Venkatraman Govindaraju f482d3d338 [Sparc] Do not emit nop after fcmp* instruction with V9.
llvm-svn: 192056
2013-10-06 07:06:44 +00:00
Elena Demikhovsky 462a2d235b AVX-512: fixed shuffle lowering
in case of BLEND and added VSHUFPS patterns.

llvm-svn: 192055
2013-10-06 06:11:18 +00:00
Venkatraman Govindaraju 572d5057e3 [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.

llvm-svn: 192054
2013-10-06 03:36:18 +00:00
Venkatraman Govindaraju 1230342fd2 [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx.
addx/subx does not modify conditional codes whereas addxcc/subxx does.

llvm-svn: 192053
2013-10-06 02:11:10 +00:00
Craig Topper c81e29435a Add TBM instructions to loading folding tables.
llvm-svn: 192046
2013-10-05 20:20:51 +00:00
Nick Lewycky 3be42b8f06 Rename this feature to "cx16" to match gcc's flag name. Apparently these strings
are directly tied to the flag names in clang with no remapping in between?

llvm-svn: 192044
2013-10-05 20:11:44 +00:00
Benjamin Kramer 7200a46c17 Emit a better error when running out of registers on inline asm.
The most likely case where this error happens is when the user specifies
too many register operands. Don't make it look like an internal LLVM bug
when we can see that the error is coming from an inline asm instruction.
For other instructions we keep the "ran out of registers" error.

llvm-svn: 192041
2013-10-05 19:33:37 +00:00
Craig Topper 9a9468ee02 Remove underscores from TBM instruction names for consistency with other instruction naming.
llvm-svn: 192040
2013-10-05 19:27:26 +00:00
Craig Topper 52196640a2 Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are sufficient.
llvm-svn: 192039
2013-10-05 19:22:59 +00:00
Craig Topper 80bd135e7a Add an additional pattern for BLCI since opt can turn (not (add x, 1)) into (sub -2, x).
llvm-svn: 192037
2013-10-05 17:17:53 +00:00
Rafael Espindola ac4ad25a00 Remove some really nasty uses of hasRawTextSupport.
When MC was first added, targets could use hasRawTextSupport to keep features
working before they were added to the MC interface.

The design goal of MC is to provide an uniform api for printing assembly and
object files. Short of relaxations and other corner cases, a object file is
just another representation of the assembly.

It was never the intention that targets would keep doing things like

if (hasRawTextSupport())
  Set flags in one way.
else
  Set flags in another way.

When they do that they create two code paths and the object file is no longer
just another representation of the assembly. This also then requires testing
with llc -filetype=obj, which is extremelly brittle.

This patch removes some of these hacks by replacing them with smaller ones.
The ARM flag setting is trivial, so I just moved it to the constructor. For
Mips, the patch adds two temporary hack directives that allow the assembly
to represent the same things as the object file was already able to.

The hope is that the mips developers will replace the hack directives with
the same ones that gas uses and drop the -print-hack-directives flag.

I will also try to implement a target streamer interface, so that we can
move this out of the common code.

In summary, for any new work, two rules of the thumb are
  * Don't use "llc -filetype=obj" in tests.
  * Don't add calls to hasRawTextSupport.

llvm-svn: 192035
2013-10-05 16:42:21 +00:00
Jiangning Liu ad242fbb71 Implement aarch64 neon instruction set AdvSIMD (Across).
llvm-svn: 192028
2013-10-05 08:22:10 +00:00
Craig Topper a1bbc323fa Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
llvm-svn: 192026
2013-10-05 05:38:16 +00:00
Venkatraman Govindaraju ece63dbd0d [Sparc] Use correct alignment while loading/storing fp128 values.
llvm-svn: 192023
2013-10-05 02:29:47 +00:00
Andrew Kaylor 480dcb3ee7 Adding multiple GOT handling to RuntimeDyldELF
Patch by Ashok Thirumurthi

llvm-svn: 192020
2013-10-05 01:52:09 +00:00
Manman Ren b3388601fb Debug Info: In DIBuilder, the derived-from field of a DW_TAG_pointer_type
is updated to use DITypeRef.

Move isUnsignedDIType and getOriginalTypeSize from DebugInfo.h to be static
helper functions in DwarfCompileUnit. We already have a static helper function
"isTypeSigned" in DwarfCompileUnit, and a pointer to DwarfDebug is added to
resolve the derived-from field. All three functions need to go across link
for derived-from fields, so we need to get hold of a type identifier map.

A pointer to DwarfDebug is also added to DbgVariable in order to resolve the
derived-from field.

Debug info verifier is updated to check a derived-from field is a TypeRef.
Verifier will not go across link for derived-from fields, in debug info finder,
we go across the link to add derived-from fields to types.

Function getDICompositeType is only used by dragonegg and since dragonegg does
not generate identifier for types, we use an empty map to resolve the
derived-from field.

When printing a derived-from field, we use DITypeRef::getName to either return
the type identifier or getName of the DIType.

A paired commit at clang is required due to changes to DIBuilder.

llvm-svn: 192018
2013-10-05 01:43:03 +00:00
Eric Christopher 3264a48a45 Reorganize some member variables and update a comment.
llvm-svn: 192017
2013-10-05 00:39:55 +00:00
Eric Christopher 87b9c49c72 Fix one comment and update another. Slightly reformat.
llvm-svn: 192016
2013-10-05 00:32:34 +00:00
Venkatraman Govindaraju 30781deb1c [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP with fp128 operand.
llvm-svn: 192015
2013-10-05 00:31:41 +00:00
Eric Christopher 9e429ae779 Add a resolve method on CompileUnit that forwards to DwarfDebug.
llvm-svn: 192014
2013-10-05 00:27:02 +00:00
Adrian Prantl f01b562a15 Debug info: Don't crash in SelectionDAGISel when a vreg that is being
pointed to by a dbg_value belonging to a function argument is eliminated
during instruction selection.
rdar://problem/15094721.

llvm-svn: 192011
2013-10-05 00:08:27 +00:00
Eric Christopher fa205cad7c Make a bunch of CompileUnit member functions private.
llvm-svn: 192009
2013-10-05 00:05:51 +00:00
Venkatraman Govindaraju 84f1523cac [Sparc] Correct the floating point conditional code mapping in GetOppositeBranchCondition().
llvm-svn: 192006
2013-10-04 23:54:30 +00:00
David Blaikie 93ff1eb5fb Minor formatting/comment rewording/etc.
llvm-svn: 192005
2013-10-04 23:52:02 +00:00
Eric Christopher fe3ae44179 Remove odd use of this.
llvm-svn: 192004
2013-10-04 23:49:31 +00:00
Eric Christopher f0388b7b39 Reformat some odd formattings.
llvm-svn: 192003
2013-10-04 23:49:29 +00:00
Eric Christopher 08f7c8f1fe Tighten up some type arguments to functions. Where we expect a
scope, pass a scope.

llvm-svn: 192002
2013-10-04 23:49:26 +00:00
Hal Finkel f5a3eaea55 UpdatePHINodes in BasicBlockUtils should not crash on duplicate predecessors
UpdatePHINodes has an optimization to reuse an existing PHI node, where it
first deletes all of its entries and then replaces them. Unfortunately, in the
case where we had duplicate predecessors (which are allowed so long as the
associated PHI entries have the same value), the loop removing the existing PHI
entries from the to-be-reused PHI would assert (if that PHI was not the one
which had the duplicates).

llvm-svn: 192001
2013-10-04 23:41:05 +00:00
David Blaikie 41369b5f41 Remove some dead code.
llvm-svn: 192000
2013-10-04 23:37:30 +00:00
David Blaikie fac5612ab0 Simplify setting of DIE tag for type DIEs by setting it in one* place.
* two actually due to some weird template thing... investigating that.

llvm-svn: 191998
2013-10-04 23:21:16 +00:00
Eric Christopher baf3816283 Prune includes.
llvm-svn: 191994
2013-10-04 22:54:28 +00:00
Jack Carter 215527449d forgot to remove this file as well
llvm-svn: 191993
2013-10-04 22:54:05 +00:00
Jack Carter 13d5f753f8 reverting per request
llvm-svn: 191992
2013-10-04 22:52:31 +00:00
Eric Christopher 6b8209b6b7 Use addFlag to add the enum class attribute.
This has the side effect of using DW_FORM_flag_present on dwarf4 and above.

llvm-svn: 191991
2013-10-04 22:40:10 +00:00
Eric Christopher dccd32866b Use Die->addValue and DIEIntegerOne directly when we want to add
a flag. No functional change.

llvm-svn: 191990
2013-10-04 22:40:05 +00:00
Hal Finkel dbc7a8a8a3 Fix DAGCombiner::visitFP_EXTEND to ignore indexed loads
DAGCombiner::visitFP_EXTEND will apply the following transformation:

  fold (fpext (load x)) -> (fpext (fptrunc (extload x)))

but the implementation does not handle indexed loads (pre/post inc.), but did
not specifically ignore them either (unlike for extending loads, which it
already ignored), causing an assert when the transformation was applied to an
indexed load. This is the minimal fix for correctness (causing the
transformation to be skipped for indexed loads).

Unfortunately, I don't have an in-tree test case.

llvm-svn: 191989
2013-10-04 22:18:12 +00:00
Reed Kotler 1b5b5c95cc Support tblockaddr for static compilation in Mips16.
llvm-svn: 191986
2013-10-04 22:01:40 +00:00
Jack Carter 721726adfc [MC][AsmParser] Hook for post assembly file processing
This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file
directive processing.

Mips assembly requires processing inline directives that directly and
indirectly affect the output ELF header flags. This patch handles one
".abicalls".

To process these directives we are following the model the code generator
uses by storing state in a container as we go through processing and when
we detect the end of input file processing, AsmParser is notified and we
update the ELF header flags through a MipsELFStreamer method with a call from
MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer).

This patch will allow other targets the same functionality.

Jack

llvm-svn: 191982
2013-10-04 21:26:15 +00:00
Akira Hatanaka 55504b4ac9 [mips] Fix a bug in MipsLongBranch::replaceBranch, which was erasing
instructions in delay slots along with the original branch instructions.

llvm-svn: 191978
2013-10-04 20:51:40 +00:00
Arnold Schwaighofer 698d4ac8a8 SLPVectorizer: Sort inputs to commutative binary operations
Sort the operands of the other entries in the current vectorization root
according to the first entry's operands opcodes.

%conv0 = uitofp ...
%load0 = load float ...

= fmul %conv0, %load0
= fmul %load0, %conv1
= fmul %load0, %conv2

Make sure that we recursively vectorize <%conv0, %conv1, %conv2> and <%load0,
%load0, %load0>.

This makes it more likely to obtain vectorizable trees. We have to be careful
when we sort that we don't destroy 'good' existing ordering implied by source
order.

radar://15080067

llvm-svn: 191977
2013-10-04 20:39:16 +00:00
Eric Christopher c19d6f096c Temporarily revert r176882 as it needs to be implemented in a different
way for all platforms.

llvm-svn: 191975
2013-10-04 19:40:33 +00:00
Eric Christopher e595bae4a4 Temporarily revert r191792 as it is causing some LTO debug failures
on platforms with relocations in debug info and also temporarily
revert r191800 due to conflicts with the revert of r191792.

llvm-svn: 191967
2013-10-04 17:08:38 +00:00
Matthias Braun caff764739 Fix comment
llvm-svn: 191966
2013-10-04 16:53:02 +00:00
Matthias Braun 6a57acf44a Fix indentation
llvm-svn: 191965
2013-10-04 16:53:00 +00:00
Matthias Braun c9d5c0f21d Fix typo
llvm-svn: 191964
2013-10-04 16:52:58 +00:00
Matthias Braun 2f169f900b ARM: optimizeSelect has to consider the previous register class
optimizeSelect folds (predicated) copy instructions, it must not ignore
the original register class of the operand when replacing the register
with the copies dest register.

llvm-svn: 191963
2013-10-04 16:52:56 +00:00
Matthias Braun c22630e164 ARM: do not add a regmask for TAILJUMPs
The jump doesn't really kill the registers, the following call does but
we never get back anyway.
This avoids some verify-machineinstrs problems when TAILJUMPs are
if-converted.

llvm-svn: 191962
2013-10-04 16:52:54 +00:00
Matthias Braun da621165ca ARM: preserve undef flag in pseudo instruction expanders
Copy over the whole register machine operand instead of creating a new one
with an incomplete set of flags.

llvm-svn: 191961
2013-10-04 16:52:51 +00:00
Jiangning Liu ac5fd7e5d3 Implement aarch64 neon instruction set AdvSIMD (3V elem).
llvm-svn: 191944
2013-10-04 09:20:44 +00:00
Craig Topper d9a6cc031d Revert r191940 to see if it fixes the build bots.
llvm-svn: 191941
2013-10-04 05:52:17 +00:00
Craig Topper a2efe9ebc6 Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
llvm-svn: 191940
2013-10-04 05:22:20 +00:00
David Blaikie 309ffe4016 DebugInfo: Fix ordering of members after r191928
In the case (shown in the attached test) where a member function
definition was emitted into debug info the following could occur:

1) build the debug info for the member function definition
2) in (1), build the debug info for the member function declaration
3) construct and add the member function declaration DIE
4) add it to its context
5) build its context (the type it is a member of)
6) construct the members and add them to the type
7) except don't add member functions because "getOrCreateSubprogram"
adds the function to its parent anyway
8) except we're only partway through building this subprogram
declaration so it hasn't been added yet - but we returned the partially
constructed DIE (since it's already in the MDNode->DIE mapping to avoid
infinitely recursing trying to create the member function DIE)
9) once the type is constructed, add the member function to it
10) now the members are out of order (the member function being defined
is listed as the last member, even though it was declared as the first)

To avoid this, construct the context of the subprogram DIE before we
query to see if it exists. That way we never end up creating it before
creating its context and ending up in this situation.

Alternatively, the type construction that visits/builds all the members
could call something like getOrCreateSubprogram, but that doesn't ever
do the "add to context" step. Then the type building code would always
be responsible for adding members (and the subprogram "addToContextDIE"
would no-op because the context building would have added the subprogram
declaration to the type/context DIE already).

(the test cases updated were overly-sensitive to offsets or abbreviation
numbers. We don't have a nice way to make these tests more robust as yet
- multiline FileCheck matches would be required)

llvm-svn: 191939
2013-10-04 01:39:59 +00:00
Andrew Kaylor 1b2cfb6495 Adding support and tests for multiple module handling in lli
llvm-svn: 191938
2013-10-04 00:49:38 +00:00
Richard Mitton c250824772 Fixed a bug with section names containing special characters.
Changed the dwarf aranges code to not use getLabelEndName, as it turns out it's not reliable to call that given user-defined section names. Section names can have characters in that aren't representable as symbol names.

The dwarf-aranges test case has been updated to include a special character, to check this.

This fixes pr17416.

llvm-svn: 191932
2013-10-03 22:07:08 +00:00
Owen Anderson 5797bfd4a3 Pull fptrunc's upwards through selects when one of the select's selectands was a constant. This has a number of benefits, including producing small immediates (easier to materialize, smaller constant pools) as well as being more likely to allow the fptrunc to fuse with a preceding instruction (truncating selects are unusual).
llvm-svn: 191929
2013-10-03 21:08:05 +00:00
David Blaikie 811bfe6395 DebugInfo: Avoid redundantly adding child DIEs to parents.
DIE::addChild had a shortcircuit that silently no-op'd when a child was
readded to the same parent. This hid some quirky/redundant code in
DwarfDebug/CompileUnit. By removing that functionality and replacing it
with an assert I was able to find and cleanup those cases, mostly
centering around adding members to types in various circumstances.

1) The original oddity I noticed while working on type units (which
actually was helping me in the short term, by accident) was the
addToContextOwner call in constructTypeDIE. This call was completely
bogus (why was it only done for non-virtual types? what relevance does
that have at all) and redundant with the more uniform addToContextOwner
made in getOrCreateTypeDIE.

2) If a member function definition was visited (createSubprogramDIE), it
would attempt to build the member function declaration. The declaration
DIE would then be added to its context, but in building the context (the
type for which this function is a member) the members of the type would
be added to the type automatically, so by the time the context was
constructed, the member function was already associated with it.

3) The same as (2) but without the member function being constructed
first. Whenever a type was constructed, the members would be created and
member functions would be created by getOrCreateSubprogramDIE - this
would lead to the subprogram being added to the (incomplete) type
already, then the general member-construction code would add it again.

llvm-svn: 191928
2013-10-03 20:07:20 +00:00
Matt Arsenault 40dddd7147 Rename DataLayout variables TD -> DL
llvm-svn: 191927
2013-10-03 19:50:01 +00:00
Rafael Espindola cda2911caa Optimize linkonce_odr unnamed_addr functions during LTO.
Generalize the API so we can distinguish symbols that are needed just for a DSO
symbol table from those that are used from some native .o.

The symbols that are only wanted for the dso symbol table can be dropped if
llvm can prove every other dso has a copy (linkonce_odr) and the address is not
important (unnamed_addr).

llvm-svn: 191922
2013-10-03 18:29:09 +00:00
Matt Arsenault bfa37e546d Make gep i8* X, -(ptrtoint Y) transform work with address spaces
llvm-svn: 191920
2013-10-03 18:15:57 +00:00
Tom Roeder 724143a752 Test commit. Fixed a copy-paste error in the Makefile for lib/LTO.
llvm-svn: 191918
2013-10-03 18:05:12 +00:00
Quentin Colombet 76e5557981 [llvm-c][Disassembler] When printing latency information, fall back to the
itinerary model in case the target does not supply a scheduling model.

By doing this, targets like cortex-a8 can benefit from the latency printing
feature added in r191859.

This part of <rdar://problem/14687488>. 

llvm-svn: 191916
2013-10-03 17:51:49 +00:00
Eric Christopher c948b9df23 Make sure we emit a section for pubnames even if that section is
going to be empty. This is particularly important for the gnu
pubnames case since we're emitting a relocation to the section.

llvm-svn: 191915
2013-10-03 17:41:20 +00:00
Eric Christopher f976c77ed7 Fix cut and paste typo.
llvm-svn: 191914
2013-10-03 17:41:16 +00:00
Benjamin Kramer 8f5d425160 raw_fd_ostream: Be more verbose about the reason when opening a file fails.
llvm-svn: 191911
2013-10-03 16:59:14 +00:00
Jin-Gu Kang 0bf8241d4b Added checking code whehter target supports specific dag combining about rotate
or not. The corresponding dag patterns are as following:

"DAGCombier::MatchRotate" function in DAGCombiner.cpp
Pattern1
// fold (or (shl (*ext x), (*ext y)),
//          (srl (*ext x), (*ext (sub 32, y)))) ->
//   (*ext (rotl x, y))
// fold (or (shl (*ext x), (*ext y)),
//          (srl (*ext x), (*ext (sub 32, y)))) ->
//   (*ext (rotr x, (sub 32, y)))

pattern2
// fold (or (shl (*ext x), (*ext (sub 32, y))),
//          (srl (*ext x), (*ext y))) ->
//   (*ext (rotl x, y))
// fold (or (shl (*ext x), (*ext (sub 32, y))),
//          (srl (*ext x), (*ext y))) ->
//   (*ext (rotr x, (sub 32, y)))

llvm-svn: 191905
2013-10-03 15:58:48 +00:00