Commit Graph

1017 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes 87beec9afb InstrItineraryData support on added.
Added Mips3 ISA feature (needed when supporting R4000 machines)

llvm-svn: 41151
2007-08-18 01:52:27 +00:00
Bruno Cardoso Lopes 0b97ce752c A Pass to insert Nops on intructions with DelaySlot
llvm-svn: 41150
2007-08-18 01:50:47 +00:00
Bruno Cardoso Lopes 415ded5d5a Mips generic fallback instruction schedule support!
llvm-svn: 41149
2007-08-18 01:46:44 +00:00
Dan Gohman 5f6a9da530 More explicit keywords.
llvm-svn: 40757
2007-08-02 21:21:54 +00:00
Duncan Sands 644f917358 Support for trampolines, except for X86 codegen which is
still under discussion.

llvm-svn: 40549
2007-07-27 12:58:54 +00:00
Dan Gohman cf0a5349de Don't ignore the return value of AsmPrinter::doInitialization and
AsmPrinter::doFinalization.

llvm-svn: 40487
2007-07-25 19:33:14 +00:00
Evan Cheng ac1591be42 No more noResults.
llvm-svn: 40132
2007-07-21 00:34:19 +00:00
Evan Cheng 94b5a80b93 Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
2007-07-19 01:14:50 +00:00
Bruno Cardoso Lopes bcda5e20c9 Added support for Mips specific GAS directives
Fixed print immediate 
Fixed Identation on MipsISelDAGToDAG.cpp

llvm-svn: 39764
2007-07-11 23:24:41 +00:00
Bruno Cardoso Lopes 6c8c748e4d Added support for framepointer
Prologue/Epilogue support fp,ra save/restore and use the stack frame the right
way!

llvm-svn: 39763
2007-07-11 23:21:31 +00:00
Bruno Cardoso Lopes 77dbdcabf2 Now that stack is represented the right way, LOA starts at 0
llvm-svn: 39761
2007-07-11 23:17:41 +00:00
Bruno Cardoso Lopes 4449e5dd7f Fixed AddLiveOut issues
FI's created the write way to represent Mips stack

llvm-svn: 39760
2007-07-11 23:16:16 +00:00
Bruno Cardoso Lopes c5affeccbd Removed unused immediate PatLeaf, fixed lui instruction
llvm-svn: 39759
2007-07-11 22:47:02 +00:00
Bruno Cardoso Lopes 753e37027f Added MipsMachineFunction class, to hold Mips dinamic stack info when inserting Prologue/Epilog
llvm-svn: 39758
2007-07-11 22:44:21 +00:00
Lauro Ramos Venancio 09d73c0305 Assert when TLS is not implemented.
llvm-svn: 39737
2007-07-11 17:19:51 +00:00
Chris Lattner 517290ae52 The various "getModuleMatchQuality" implementations should return
zero if they see a target triple they don't understand.

llvm-svn: 38463
2007-07-09 17:25:29 +00:00
Bruno Cardoso Lopes 35e43c49b0 Initial Mips support, here we go! =)
- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.

llvm-svn: 37461
2007-06-06 07:42:06 +00:00