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Author SHA1 Message Date
Pavel Iliin 4eca1c06a4 [AArch64][FIX] f16 indexed patterns encoding restrictions. 2020-04-22 14:11:28 +01:00
Pavel Iliin be881e2831 [AArch64] FMLA/FMLS patterns improvement. 
FMLA/FMLS f16 indexed patterns added.
Fixes https://bugs.llvm.org/show_bug.cgi?id=45467
Removed redundant v2f32 vector_extract indexed pattern since
Instruction Selection is able to match v4f32 instead.
 2020-04-21 18:23:21 +01:00
Kevin P. Neal 7f38812d5b [FPEnv][AArch64] Platform-specific builtin constrained FP enablement 
When constrained floating point is enabled the AArch64-specific builtins don't use constrained intrinsics in some cases. Fix that.

Neon is part of this patch, so ARM is affected as well.

Differential Revision: https://reviews.llvm.org/D77074
 2020-04-10 13:02:00 -04:00