Jim Grosbach
12ccf45bbb
ARM assembler should accept shift-by-zero for any shifted-immediate operand.
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Just treat it as-if the shift wasn't there at all. 'as' compatibility.
rdar://10604767
llvm-svn: 147153
2011-12-22 18:04:04 +00:00
Jim Grosbach
21488b8839
ARM assembly parser canonicallize on 'lsl' for shift-by-zero form.
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llvm-svn: 147152
2011-12-22 17:37:00 +00:00
Jim Grosbach
3794d82af5
Tidy up. Trailing whitespace.
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llvm-svn: 147151
2011-12-22 17:17:10 +00:00
Jim Grosbach
62bffd8827
Nuke invalid comment from copy/paste.
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llvm-svn: 147150
2011-12-22 17:04:50 +00:00
Benjamin Kramer
f1fd6e394d
Give string constants generated by IRBuilder private linkage.
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Fixes PR11640.
llvm-svn: 147144
2011-12-22 14:22:14 +00:00
Rafael Espindola
4977edd33d
Add configure support for kfreebsd and hurd. Patch by Sylvestre Ledru.
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Fixes pr11620.
llvm-svn: 147143
2011-12-22 14:01:18 +00:00
Chandler Carruth
b024aa021d
Make the unreachable probability much much heavier. The previous
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probability wouldn't be considered "hot" in some weird loop structures
or other compounding probability patterns. This makes it much harder to
confuse, but isn't really a principled fix. I'd actually like it if we
could model a zero probability, as it would make this much easier to
reason about. Suggestions for how to do this better are welcome.
llvm-svn: 147142
2011-12-22 09:26:37 +00:00
Rafael Espindola
29abd977de
Kill the monstrosity that was ELFObjectWriter.h.
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llvm-svn: 147136
2011-12-22 03:38:00 +00:00
Rafael Espindola
34a68afc05
Misc cleanups.
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llvm-svn: 147135
2011-12-22 03:24:43 +00:00
Eli Friedman
2aae94fa70
Fix APInt::rotl and APInt::rotr so that they work correctly. Found while writing some code that tried to use them.
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llvm-svn: 147134
2011-12-22 03:15:35 +00:00
Rafael Espindola
1dc45d8df4
Move the Mips only bits of the ELF writer to lib/Target/Mips.
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llvm-svn: 147133
2011-12-22 03:03:17 +00:00
Rafael Espindola
84d00f11cd
Make the virtual methods in ARMELFObjectWriter public.
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llvm-svn: 147132
2011-12-22 02:58:12 +00:00
Chad Rosier
1b7e2baf47
Speculatively revert r146578 to determine if it is the cause of a number of
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performance regressions (both execution-time and compile-time) on our
nightly testers.
Original commit message:
Fix for bug #11429 : Wrong behaviour for switches. Small improvement for code
size heuristics.
llvm-svn: 147131
2011-12-22 02:40:57 +00:00
Rafael Espindola
cc369ac0a2
Move the MBlaze ELF writer bits to lib/Target/MBlaze.
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llvm-svn: 147129
2011-12-22 02:28:24 +00:00
Pete Cooper
1c3b1efa58
Hoisted some loop invariant smallvector lookups out of a MachineLICM loop
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llvm-svn: 147127
2011-12-22 02:13:25 +00:00
Rafael Espindola
428b9ee036
Fix cmake.
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llvm-svn: 147126
2011-12-22 02:06:17 +00:00
Pete Cooper
1eed5b51e8
Changed MachineLICM to use a worklist list MachineCSE instead of recursion.
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Fixes <rdar://problem/10584116>
llvm-svn: 147125
2011-12-22 02:05:40 +00:00
Rafael Espindola
38a400df3b
Move PPC bits to lib/Target/PowerPC.
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llvm-svn: 147124
2011-12-22 01:57:09 +00:00
Rafael Espindola
2da9777cef
Hopefully fix the cmake build.
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llvm-svn: 147121
2011-12-22 01:11:01 +00:00
Rafael Espindola
4449b21294
Fix name in comments.
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llvm-svn: 147119
2011-12-22 01:06:53 +00:00
Akira Hatanaka
e2eed9649e
Local dynamic TLS model for direct object output. Create the correct TLS MIPS
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ELF relocations.
Patch by Jack Carter.
llvm-svn: 147118
2011-12-22 01:05:17 +00:00
Richard Smith
32a756b7ce
Unbreak cmake build after r147115.
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llvm-svn: 147117
2011-12-22 01:03:35 +00:00
Rafael Espindola
a0124055b1
Move the ARM specific parts of the ELF writer to Target/ARM.
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llvm-svn: 147115
2011-12-22 00:37:50 +00:00
Rafael Espindola
6faa1533fb
getEFlags is const.
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llvm-svn: 147114
2011-12-22 00:21:50 +00:00
Lang Hames
fc8a4bc969
Fixed typo.
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llvm-svn: 147113
2011-12-22 00:12:51 +00:00
Jim Grosbach
2b80dad572
ARM NEON mnemonic aliase for vrecpeq.
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llvm-svn: 147109
2011-12-21 23:52:37 +00:00
Jim Grosbach
7869d8c01e
ARM VFP optional data type on VMOV GPR<-->SPR.
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llvm-svn: 147104
2011-12-21 23:24:15 +00:00
Jim Grosbach
260b4b336a
ARM NEON optional data type on VSWP instructions.
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llvm-svn: 147103
2011-12-21 23:09:28 +00:00
Jim Grosbach
a50e24fcb3
ARM NEON mnemonic aliases for vzipq and vswpq.
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llvm-svn: 147102
2011-12-21 23:04:33 +00:00
Jakub Staszak
9061616f9e
Revert patch from 147090. There is not point to make code less readable if we
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don't get any serious benefit there.
llvm-svn: 147101
2011-12-21 23:02:08 +00:00
Jim Grosbach
1152cc0cad
ARM asm parser should be more lenient w/ .thumb_func directive.
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Rather than require the symbol to be explicitly an argument of the directive,
allow it to look ahead and grab the symbol from the next non-whitespace
line.
rdar://10611140
llvm-svn: 147100
2011-12-21 22:30:16 +00:00
Dan Gohman
51c81685a8
Fix a copy+pasto. No testcase, because the symptoms of dereferencing
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an invalid iterator aren't reproducible. rdar://10614085.
llvm-svn: 147098
2011-12-21 21:43:50 +00:00
Jim Grosbach
8c59bbc1ed
Thumb2 assembly parsing of 'mov rd, rn, rrx'.
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Maps to the RRX instruction. Missed this case earlier.
rdar://10615373
llvm-svn: 147096
2011-12-21 21:04:19 +00:00
Chad Rosier
3172488cc0
Fix 80-column violations.
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llvm-svn: 147095
2011-12-21 20:59:09 +00:00
Jim Grosbach
b3ef713e44
Thumb2 assembly parsing of 'mov(register shifted register)' aliases.
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These map to the ASR, LSR, LSL, ROR instruction definitions.
rdar://10615373
llvm-svn: 147094
2011-12-21 20:54:00 +00:00
Nick Lewycky
c186d07bbe
Continue counting intrinsics as instructions (except when they aren't, such as
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debug info) and for being vector operations. Fixes regression from r147037.
llvm-svn: 147093
2011-12-21 20:26:03 +00:00
Nick Lewycky
281e2747e0
Fix typo and spacing, no functionality change.
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llvm-svn: 147092
2011-12-21 20:21:55 +00:00
Jakub Staszak
df5133455f
- Change a few operator[] to lookup which is cheaper.
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- Add some constantness.
llvm-svn: 147090
2011-12-21 20:18:54 +00:00
Lang Hames
e49fbd0755
Oops - LiveIntervalUnion.cpp file does use std::find. Moving STL header include to LiveIntervalUnion.cpp file.
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llvm-svn: 147089
2011-12-21 20:16:11 +00:00
Lang Hames
93176d72e7
Remove disused STL header include.
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llvm-svn: 147088
2011-12-21 20:12:54 +00:00
Rafael Espindola
f61ff34252
Switch from WriteEFlags to getEFlags in preparation for moving it
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to Target/.
llvm-svn: 147087
2011-12-21 20:09:46 +00:00
Jakob Stoklund Olesen
3588a43e3a
Move common code into an MRI function.
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llvm-svn: 147071
2011-12-21 19:50:05 +00:00
Jim Grosbach
c80a264386
ARM NEON assmebly parsing for VLD2 to all lanes instructions.
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llvm-svn: 147069
2011-12-21 19:40:55 +00:00
Chad Rosier
3ede414127
No case stmt for BUILD_VECTOR in PerformDAGCombine(), so I assume this isn't
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necessary. Please chime in if I'm mistaken.
llvm-svn: 147065
2011-12-21 19:14:52 +00:00
Chad Rosier
7248bda595
Fix a couple of copy-n-paste bugs. Noticed by George Russell!
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llvm-svn: 147064
2011-12-21 18:56:22 +00:00
Manuel Klimek
25eb0ac418
Changes the JSON parser to use the SourceMgr.
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Diagnostics are now emitted via the SourceMgr and we use MemoryBuffer
for buffer management. Switched the code to make use of the trailing
'0' that MemoryBuffer guarantees where it makes sense.
llvm-svn: 147063
2011-12-21 18:16:39 +00:00
Rafael Espindola
b264d33854
Move the X86 specific bits of the ELF writer to the Target/X86 directory.
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Other targets will follow shortly.
llvm-svn: 147060
2011-12-21 17:30:17 +00:00
Rafael Espindola
1ad4095d6b
Reduce the exposure of Triple::OSType in the ELF object writer. This will
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avoid including ADT/Triple.h in many places when the target specific bits are
moved.
llvm-svn: 147059
2011-12-21 17:00:36 +00:00
Rafael Espindola
46f0c15208
Add const.
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llvm-svn: 147054
2011-12-21 14:48:04 +00:00
Rafael Espindola
9e252bf038
Small refactoring so that RelocNeedsGOT can stay in the target independent
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side when the target specific bits are moved to the Target directory.
llvm-svn: 147053
2011-12-21 14:26:29 +00:00