Commit Graph

151341 Commits

Author SHA1 Message Date
Craig Topper 95e4142f94 [InstCombine] Change helper method to a file local static method. NFC
llvm-svn: 307275
2017-07-06 16:24:23 +00:00
Craig Topper fc42acef92 [InstCombine] Clarify comment to mention other transform that it does. NFC
llvm-svn: 307274
2017-07-06 16:24:22 +00:00
Craig Topper 22795de20a [InstCombine] Add single use checks to SimplifyBSwap to ensure we are really saving instructions
Bswap isn't a simple operation so we need to make sure we are really removing a call to it before doing these simplifications.

For the case when both LHS and RHS are bswaps I've allowed it to be moved if either LHS or RHS has a single use since that at least allows us to move it later where it might find another bswap to combine with and it decreases the use count on the other side so maybe the other user can be optimized.

Differential Revision: https://reviews.llvm.org/D34974

llvm-svn: 307273
2017-07-06 16:24:21 +00:00
Craig Topper 3e1909d797 [InstCombine] Don't create extra ConstantInt objects in foldSelectICmpAnd. NFCI
Instead just use APInt objects and only create a ConstantInt at the end if we need it for the Offset.

llvm-svn: 307270
2017-07-06 15:58:54 +00:00
Wei Mi 90707394e3 [LSR] Narrow search space by filtering non-optimal formulae with the same ScaledReg and Scale.
When the formulae search space is huge, LSR uses a series of heuristic to keep
pruning the search space until the number of possible solutions are within
certain limit.

The big hammer of the series of heuristics is NarrowSearchSpaceByPickingWinnerRegs,
which picks the register which is used by the most LSRUses and deletes the other
formulae which don't use the register. This is a effective way to prune the search
space, but quite often not a good way to keep the best solution. We saw cases before
that the heuristic pruned the best formula candidate out of search space.

To relieve the problem, we introduce a new heuristic called
NarrowSearchSpaceByFilterFormulaWithSameScaledReg. The basic idea is in order to
reduce the search space while keeping the best formula, we want to keep as many
formulae with different Scale and ScaledReg as possible. That is because the central
idea of LSR is to choose a group of loop induction variables and use those induction
variables to represent LSRUses. An induction variable candidate is often represented
by the Scale and ScaledReg in a formula. If we have more formulae with different
ScaledReg and Scale to choose, we have better opportunity to find the best solution.
That is why we believe pruning search space by only keeping the best formula with the
same Scale and ScaledReg should be more effective than PickingWinnerReg. And we use
two criteria to choose the best formula with the same Scale and ScaledReg. The first
criteria is to select the formula using less non shared registers, and the second
criteria is to select the formula with less cost got from RateFormula. The patch
implements the heuristic before NarrowSearchSpaceByPickingWinnerRegs, which is the
last resort.

Testing shows we get 1.8% and 2% on two internal benchmarks on x86. llvm nightly
testsuite performance is neutral. We also tried lsr-exp-narrow and it didn't help
on the two improved internal cases we saw.

Differential Revision: https://reviews.llvm.org/D34583

llvm-svn: 307269
2017-07-06 15:52:14 +00:00
Simon Pilgrim 713600747e [X86][SSE4A] Add support for shuffle combining to INSERTQI.
llvm-svn: 307268
2017-07-06 15:34:17 +00:00
Sanjay Patel 0c37b19331 [CGP, x86] update test checks; NFC
This was auto-generated using an older version of the script,
and that version does not work with phis, so if we enable
expansion it will go bad.

llvm-svn: 307267
2017-07-06 15:31:38 +00:00
Simon Pilgrim 03641df383 [X86][SSE4A] Add test showing missed opportunities to combine INSERTQI shuffle
llvm-svn: 307265
2017-07-06 14:52:24 +00:00
Joel Jones aff09bf052 Doxygen formatting. NFCI
llvm-svn: 307263
2017-07-06 14:17:36 +00:00
Sanjay Patel 2a341620e7 [x86] fix over-specified triple and auto-generate checks; NFC
llvm-svn: 307262
2017-07-06 14:15:15 +00:00
Mikael Holmen 9c3e2eac6a [MachineVerifier] Add check that tied physregs aren't different.
Summary: Added MachineVerifier code to check register ties more thoroughly, especially so that physical registers that are tied are the same. This may help e.g. when creating MIR files.

Original patch by Jesper Antonsson

Reviewers: stoklund, sanjoy, qcolombet

Reviewed By: qcolombet

Subscribers: qcolombet, llvm-commits

Differential Revision: https://reviews.llvm.org/D34394

llvm-svn: 307259
2017-07-06 13:18:21 +00:00
Ilya Biryukov 13cde86e74 Fixes to Dockerfile scripts.
- Put buildfiles into /tmp/clang-build/build, instead of /tmp/clang-build.
  We checkout the sources to /tmp/clang-build/src and running
  cmake in /tmp/clang-build was done by mistake.
- Don't add an extra ';' at the start of enabled projects list.
  It worked either way, but looked strange.
- Minor comment update.

llvm-svn: 307258
2017-07-06 13:10:55 +00:00
Simon Pilgrim 7b79fbd4ea [X86][SSE] combineX86ShuffleChain - merge duplicate creations of integer mask types
llvm-svn: 307257
2017-07-06 13:09:19 +00:00
Ilya Biryukov 7f02a75a74 Made a script to build docker images easier to use.
Summary:
- Removed double indirection via command-line args (i.e. two `--`
  options of `build_docker_image.sh`).
- Added a comment on how to build 2-stage clang install into the
  `build_docker_image.sh`, it used to be only in the `docs/Docker.rst`.

Reviewers: klimek, mehdi_amini

Reviewed By: klimek

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35050

llvm-svn: 307256
2017-07-06 12:46:51 +00:00
Simon Pilgrim 77ad6d9bb2 [X86][SSE] combineX86ShuffleChain - merge duplicate 'Zeroable' element masks
llvm-svn: 307255
2017-07-06 12:40:10 +00:00
Simon Pilgrim cc0f785dca [X86][SSE4A] Add support for shuffle combining to EXTRQ.
llvm-svn: 307254
2017-07-06 12:22:58 +00:00
Simon Pilgrim 40c0ae200f [X86][SSE4A] Add scheduling tests for SSE4A instructions
llvm-svn: 307251
2017-07-06 11:26:43 +00:00
Simon Pilgrim 1dd0bd1949 [X86][SSE4A] Split EXTRQ/INSERTQ shuffle matching from lowering. NFCI.
First step toward supporting shuffle combining to EXTRQ/INSERTQ.

llvm-svn: 307250
2017-07-06 11:06:54 +00:00
Max Kazantsev 98838527c6 Revert "Revert "Revert "[IndVars] Canonicalize comparisons between non-negative values and indvars"""
It appears that the problem is still there. Needs more analysis to understand why
SaturatedMultiply test fails.

llvm-svn: 307249
2017-07-06 10:47:13 +00:00
Daniel Sanders 3ae33209cc [globalisel][tablegen] Rename and re-comment render functions to match the new MatchTables. NFC.
The conversion to MatchTable left the function names and comments referring to
C++ statements and expressions. Updated the names and comments to account for
the fact that they're no longer unconstrained statements/expressions.

llvm-svn: 307248
2017-07-06 10:37:17 +00:00
David Stuttard 7528d4bd42 [RegisterCoalescer] Fix for SubRange join unreachable
Summary:
During remat, some subranges might end up having invalid segments which caused problems for later
coalescing.

Added in a check to remove segments that are invalidated as part of the remat.

See http://llvm.org/PR33524

Subscribers: MatzeB, qcolombet

Differential Revision: https://reviews.llvm.org/D34391

llvm-svn: 307247
2017-07-06 10:07:57 +00:00
Daniel Sanders 9d662d2486 [globalisel][tablegen] Rename and re-comment to match the new MatchTables. NFC.
The conversion to MatchTable left the function names and comments referring to
C++ statements and expressions. Updated the names and comments to account for
the fact that they're no longer unconstrained statements/expressions.

llvm-svn: 307246
2017-07-06 10:06:12 +00:00
Diana Picus c3a9c34761 [ARM] GlobalISel: Map s32 G_FCMP in reg bank select
Map hard G_FCMP operands to FPR and the result to GPR.

llvm-svn: 307245
2017-07-06 09:57:46 +00:00
Max Kazantsev c8db20b78c Revert "Revert "[IndVars] Canonicalize comparisons between non-negative values and indvars""
It seems that the patch was reverted by mistake. Clang testing showed failure of the
MathExtras.SaturatingMultiply test, however I was unable to reproduce the issue on the
fresh code base and was able to confirm that the transformation introduced by the change
does not happen in the said test. This gives a strong confidence that the actual reason of
the failure of the initial patch was somewhere else, and that problem now seems to be
fixed. Re-submitting the change to confirm that.

llvm-svn: 307244
2017-07-06 09:57:41 +00:00
Diana Picus d0104eaae8 [ARM] GlobalISel: Legalize G_FCMP for s32
This covers both hard and soft float.

Hard float is easy, since it's just Legal.

Soft float is more involved, because there are several different ways to
handle it based on the predicate: one and ueq need not only one, but two
libcalls to get a result. Furthermore, we have large differences between
the values returned by the AEABI and GNU functions.

AEABI functions return a nice 1 or 0 representing true and respectively
false. GNU functions generally return a value that needs to be compared
against 0 (e.g. for ogt, the value returned by the libcall is > 0 for
true).  We could introduce redundant comparisons for AEABI as well, but
they don't seem easy to remove afterwards, so we do different processing
based on whether or not the result really needs to be compared against
something (and just truncate if it doesn't).

llvm-svn: 307243
2017-07-06 09:09:33 +00:00
George Rimar a56702e0c6 [DWARF] - Provide default implementation for getSectionLoadAddress() method of LoadedObjectInfo
It is a bit unconvinent that client should implement this method
even if not use it. Patch provides default implementation.

Differential revision: https://reviews.llvm.org/D35009

llvm-svn: 307242
2017-07-06 08:46:01 +00:00
Daniel Sanders 85ffd3609f [globalisel][tablegen] Import rules containing intrinsic_wo_chain.
Summary:
As of this patch, 1018 out of 3938 rules are currently imported.

Depends on D32275

Reviewers: qcolombet, kristof.beyls, rovka, t.p.northover, ab, aditya_nandakumar

Reviewed By: qcolombet

Subscribers: dberris, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D32278

llvm-svn: 307240
2017-07-06 08:12:20 +00:00
Diana Picus cd460c89c4 [ARM] GlobalISel: Widen s1, s8, s16 G_CONSTANT
Get the legalizer to widen small constants.

llvm-svn: 307239
2017-07-06 08:04:16 +00:00
David Blaikie fd8777ed88 Fix -Wunused-function by making function declarations in a header non-static
Also avoids ODR violations by ensuring names used in headers find the
same entity, not different, file-local entities in each translation
unit.

llvm-svn: 307237
2017-07-06 05:33:32 +00:00
David Blaikie 5b079d83a6 Simplify InstrProfRecord tests, eliminating named temporaries in favor of braced init args
This will also simplify an API transition and class renaming coming
soon.

llvm-svn: 307236
2017-07-06 05:19:17 +00:00
David L. Jones a63c3369aa [lit] Fix unit test discovery for Visual Studio builds.
Fix by Andrew Ng!

The Visual Studio build can contain output for multiple configuration types (
e.g. Debug, Release & RelWithDebInfo) within the same build output
directory. Therefore when discovering unit tests, the "build mode" sub directory
containing the appropriate configuration is included in the search. This sub
directory may not always be present, so a test for its existence is required.

Reviewers: zturner, modocache, dlj

Reviewed By: zturner, dlj

Subscribers: grimar, bd1976llvm, gbreynoo, edd, jhenderson, llvm-commits

Differential Revision: https://reviews.llvm.org/D34976

llvm-svn: 307235
2017-07-06 03:23:18 +00:00
Frederich Munch 52dfcd18d1 Avoid constructing GlobalExtensions only to find out it is empty.
Summary:
GlobalExtensions is dereferenced twice, once for iteration and then a check if it is empty.
As a ManagedStatic this dereference forces it's construction which is unnecessary.

Reviewers: efriedma, davide, mehdi_amini

Reviewed By: mehdi_amini

Subscribers: chapuni, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D33381

llvm-svn: 307229
2017-07-06 00:09:09 +00:00
Eric Beckmann f6090b620e Revert "Revert "Revert "Switch external cvtres.exe for llvm's own resource library."""
This reverts commit ae21ee0b6cacbc1efaf4d42502e71da2f0eb45c3.

The initial revert was done in order to prevent ongoing errors on
chromium bots such as CrWinClangLLD.  However, this was done haphazardly
and I didn't realize there were test and compilation failures, so this
revert was reverted.  Now that those have been fixed, we can revert the
revert of the revert.

llvm-svn: 307227
2017-07-05 23:46:06 +00:00
Eric Beckmann 81979b038f Revert "Revert "Revert "Replace trivial use of external rc.exe by writing our own .res file."""
This reverts commit 5fecbbbe5049665d86834cf69d8f75db4f392308.

The initial revert was done in order to prevent ongoing errors on
chromium bots such as CrWinClangLLD.  However, this was done haphazardly
and I didn't realize there were test and compilation failures, so this
revert was reverted.  Now that those have been fixed, we can revert the
revert of the revert.

llvm-svn: 307226
2017-07-05 23:45:50 +00:00
Craig Topper 4584476cac [IR] Use CmpInst::isFPPredicate/isIntPredicate in a few other places. NFC
llvm-svn: 307224
2017-07-05 23:35:46 +00:00
Davide Italiano 7dd0694f96 [GlobalOpt] Remove unreachable blocks before optimizing a function.
LLVM's definition of dominance allows instructions that are cyclic
in unreachable blocks, e.g.:

  %pat = select i1 %condition, @global, i16* %pat

because any instruction dominates an instruction in a block that's
not reachable from entry.
So, remove unreachable blocks from the function, because a) there's
no point in analyzing them and b) GlobalOpt should otherwise grow
some more complicated logic to break these cycles.

Differential Revision:  https://reviews.llvm.org/D35028

llvm-svn: 307215
2017-07-05 22:28:28 +00:00
Craig Topper ad7137838e [IR] Use CmpInst::isIntPredicate()/isFPPredicate in some asserts instead of doing the equivalent range check. NFC
llvm-svn: 307210
2017-07-05 22:09:00 +00:00
Vadim Chugunov e6f76558c7 Fix libcall expansion creating DAG nodes with invalid type post type legalization.
If we are lowering a libcall after legalization, we'll split the return type into a pair of legal values.

Patch by Jatin Bhateja and Eli Friedman.

Differential Revision: https://reviews.llvm.org/D34240

llvm-svn: 307207
2017-07-05 22:01:49 +00:00
Zachary Turner 91dcab417c Fix std::min ambiguity between uint32 and size_t.
llvm-svn: 307205
2017-07-05 21:59:20 +00:00
Zachary Turner 8120ebf4c7 [llvm-pdbutil] Add the ability to truncate stream purpose names.
This will be useful for aligning fields to a fixed with in
subsequent patches.

llvm-svn: 307204
2017-07-05 21:54:58 +00:00
Brendon Cahoon cb8c7b912d [DependenceAnalysis] Make sure base objects are the same when comparing GEPs
The dependence analysis was returning incorrect information when using the GEPs
to compute dependences. The analysis uses the GEP indices under certain
conditions, but was doing it incorrectly when the base objects of the GEP are
aliases, but pointing to different locations in the same array.

This patch adds another check for the base objects. If the base pointer SCEVs
are not equal, then the dependence analysis should fall back on the path
that uses the whole SCEV for the dependence check. This fixes PR33567.

Differential Revision: https://reviews.llvm.org/D34702

llvm-svn: 307203
2017-07-05 21:35:47 +00:00
Galina Kistanova 0d1990e2e7 Added more info on silent master to the doc.
llvm-svn: 307200
2017-07-05 20:45:44 +00:00
Craig Topper cc418b656a [InstCombine] Use CmpInst::Predicate with m_Cmp instead of ICmpInst::Predicate. NFC
There isn't really an ICmpInst version so we're just accessing the CmpInst version through inheritance.

llvm-svn: 307199
2017-07-05 20:31:00 +00:00
Sam Clegg 9bf73c078b [WebAssembly] Fix types for address taken functions
Differential Revision: https://reviews.llvm.org/D34966

llvm-svn: 307198
2017-07-05 20:25:08 +00:00
Alexander Shaposhnikov d968f6f423 [tablegen] Avoid creating temporary strings
If a method / function returns a StringRef but the 
variable is of type const std::string& a temporary string is
created (StringRef has a cast operator to std::string),
which is a suboptimal behavior.

Differential revision: https://reviews.llvm.org/D34994

Test plan: make check-all

llvm-svn: 307195
2017-07-05 20:14:54 +00:00
Sam Clegg 8c4baa00de [WebAssembly] MC: Don't generate extra types for weak alias
Previously we were generating a void(void) function type
for a weak alias.  Update the weak-alias test case to
catch this.

Differential Revision: https://reviews.llvm.org/D34734

llvm-svn: 307194
2017-07-05 20:09:26 +00:00
Rafael Espindola 243288a488 Add a test for relocation addend on mips.
An lld test found a bug in a llvm patch I am working on. It is better
to have test coverage for that in llvm too.

llvm-svn: 307192
2017-07-05 19:31:07 +00:00
Eric Beckmann 1d50926e71 Revert "Revert "Replace trivial use of external rc.exe by writing our own .res file.""
This reverts commit 8c8dce3b8f15d6ebaefc35ce88f15a85c8cdbd6e.

llvm-svn: 307191
2017-07-05 19:04:48 +00:00
Eric Beckmann 0eafa581a3 Revert "Revert "Switch external cvtres.exe for llvm's own resource library.""
This reverts commit 165e578e47f1cd38191120aad23a9020fb5476dd.

Forgot to run tests on this.

llvm-svn: 307190
2017-07-05 19:04:33 +00:00
Eric Beckmann 36793a0ecf Revert "Switch external cvtres.exe for llvm's own resource library."
This reverts commit 600d52c278e123dd08bee24c1f00932b55add8de.

This patch still seems to break CrWinClangLLD, reverting until I can
find root problem.

llvm-svn: 307189
2017-07-05 18:59:16 +00:00
Eric Beckmann 8cc9fd31e6 Revert "Replace trivial use of external rc.exe by writing our own .res file."
This patch still seems to break CrWinClangLLD, reverting this once more
until I can discover root problem.

This reverts commit 3dbbc8ce43be50ffde2b1c655c6d3a25796fe78b.

llvm-svn: 307188
2017-07-05 18:59:01 +00:00
Zachary Turner eae44dfee9 [PDB] Add a test that verifies every known type record.
We had a lot of one-off tests for this type and that type,
or "every type that happens to be generated by this program
I built".  Eventually I got a bug report filed where we were
crashing on a type that was not covered by any of these tests.
So this test carefully constructs a minimal C++ program that
will cause every type we support to be emitted.  This ensures
full coverage for type records.

Differential Revision: https://reviews.llvm.org/D34915

llvm-svn: 307187
2017-07-05 18:43:25 +00:00
Quentin Colombet f3f7d4d64b [AMDGPU] Move GISel accessor initialization from TargetMachine to Subtarget.
NFC

llvm-svn: 307186
2017-07-05 18:40:56 +00:00
Sean Fertile 3cd1a0368c [Power9] Disable removing extra swaps on P9.
On power 8 we sometimes insert swaps to deal with the difference between
Little-Endian and Big-Endian. The swap removal pass is supposed to clean up
these swaps. On power 9 we don't need this pass since we do not need to insert
the swaps in the first place.

Commiting on behalf of Stefan Pintilie.
Differential Revision: https://reviews.llvm.org/D34627

llvm-svn: 307185
2017-07-05 18:37:10 +00:00
Simon Pilgrim ac78daf517 {DAGCombiner] Fold (rot x, 0) -> x
llvm-svn: 307184
2017-07-05 18:27:11 +00:00
Simon Pilgrim 49123d4bb0 [X86] Test bitfield loadstore tests on i686 as well
llvm-svn: 307182
2017-07-05 18:09:30 +00:00
Sean Fertile d44cb1838f [PowerPC] Make sure that we remove dead PHI nodes after the PPCCTRLoops pass.
Commiting on behalf of Stefan Pintilie.
Differential Revision: https://reviews.llvm.org/D34829

llvm-svn: 307180
2017-07-05 17:57:57 +00:00
Andrew Zhogin 45d192823e [DAGCombiner] visitRotate patch to optimize pair of ROTR/ROTL instructions into one with combined shift operand.
For two ROTR operations with shifts C1, C2; combined shift operand will be (C1 + C2) % bitsize.

Differential revision: https://reviews.llvm.org/D12833

llvm-svn: 307179
2017-07-05 17:55:42 +00:00
Simon Pilgrim 55006b407b [X86][SSE] Dropped -mcpu from bitcast+setcc mask tests
Use triple and attribute only for consistency

llvm-svn: 307176
2017-07-05 17:30:30 +00:00
Tony Jiang aa5a6a1c30 [Power9] Exploit vector extract with variable index.
This patch adds the exploitation for new power 9 instructions which extract
variable elements from vectors:
VEXTUBLX
VEXTUBRX
VEXTUHLX
VEXTUHRX
VEXTUWLX
VEXTUWRX

Differential Revision: https://reviews.llvm.org/D34032
Commit on behalf of Zaara Syeda (syzaara@ca.ibm.com)

llvm-svn: 307174
2017-07-05 16:55:00 +00:00
Tony Jiang 9a91a18110 [Power9] Exploit vector integer extend instructions when indices aren't correct.
This patch adds on to the exploitation added by https://reviews.llvm.org/D33510.
This now catches build vector nodes where the inputs are coming from sign
extended vector extract elements where the indices used by the vector extract
are not correct. We can still use the new hardware instructions by adding a
shuffle to move the elements to the correct indices. I introduced a new PPCISD
node here because adding a vector_shuffle and changing the elements of the
vector_extracts was getting undone by another DAG combine.

Commit on behalf of Zaara Syeda (syzaara@ca.ibm.com)
Differential Revision: https://reviews.llvm.org/D34009

llvm-svn: 307169
2017-07-05 16:00:38 +00:00
Daniel Sanders d560a64e42 [globalisel][tablegen] Fix another unused variable warning introduced by r307159
llvm-svn: 307168
2017-07-05 15:34:16 +00:00
David Blaikie 8713157747 DebugInfo: Generalize LoadedObjectInfoHelper from RuntimeDyld
Make it usable by any class derived (even indirectly) from
LoadedObjectInfo by allowing a custom base class to be specified and
perfect forwarding to the ctor.

llvm-svn: 307166
2017-07-05 15:23:56 +00:00
Daniel Sanders a6cfce6863 [globalisel][tablegen] Finish fixing compile-time regressions by merging the matcher and emitter state machines.
Summary:
Also, made a few minor tweaks to shave off a little more cumulative memory consumption:
* All rules share a single NewMIs instead of constructing their own. Only one
  will end up using it.
* Use MIs.resize(1) instead of MIs.clear();MIs.push_back(I) and prevent
  GIM_RecordInsn from changing MIs[0].

Depends on D33764

Reviewers: rovka, vitalybuka, ab, t.p.northover, qcolombet, aditya_nandakumar

Reviewed By: ab

Subscribers: kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D33766

llvm-svn: 307159
2017-07-05 14:50:18 +00:00
Dinar Temirbulatov b78adec638 [SLPVectorizer] Add an extra parameter to cancelScheduling function, NFCI.
llvm-svn: 307158
2017-07-05 13:53:03 +00:00
David Green b26a0a460c [IndVarSimplify] Add AShr exact flags using induction variables ranges.
This adds exact flags to AShr/LShr flags where we can statically
prove it is valid using the range of induction variables. This
allows further optimisations to remove extra loads.

Differential Revision: https://reviews.llvm.org/D34207

llvm-svn: 307157
2017-07-05 13:25:58 +00:00
Ulrich Weigand 43579cf4a0 [SystemZ] Simplify handling of 128-bit multiply/divide instruction
Several integer multiply/divide instructions require use of a
register pair as input and output.  This patch moves setting
up the input register pair from C++ code to TableGen, simplifying
the whole process and making it more easily extensible.

No functional change.

llvm-svn: 307155
2017-07-05 13:17:31 +00:00
Ulrich Weigand e2a68e96f0 [SystemZ] Small cleanups to SystemZScheduleZ13.td
Fixes a couple of whitespace errors, re-sorts the vector floating-point
instructions to make them more easily extensible, and adds a missing
pseudo instruction.

No functional change.

llvm-svn: 307154
2017-07-05 13:14:43 +00:00
Nirav Dave 65b7ab1be4 [Hexagon] Preclude non-memory test from being optimized away. NFC.
llvm-svn: 307153
2017-07-05 13:08:03 +00:00
Tom Stellard edd69bc778 CMake: Add LLVM_UTILS_INSTALL_DIR option
Summary:
This is like the LLVM_TOOLS_INSTALL_DIR option, but for the utils
that are installed when the LLVM_INSTALL_UTILS.  This option
defaults to 'bin' to remain consistent with the current behavior, but
distros may want to install these to libexec/llvm.

Reviewers: beanz

Reviewed By: beanz

Subscribers: llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D30655

llvm-svn: 307150
2017-07-05 12:57:30 +00:00
Diana Picus fc1675eb16 [GlobalISel] Refactor Legalizer helpers for libcalls
We used to have a helper that replaced an instruction with a libcall.
That turns out to be too aggressive, since sometimes we need to replace
the instruction with at least two libcalls. Therefore, change our
existing helper to only create the libcall and leave the instruction
removal as a separate step. Also rename the helper accordingly.

llvm-svn: 307149
2017-07-05 12:57:24 +00:00
Sjoerd Meijer 6d14fdf62d [AsmParser] Mnemonic Spell Corrector
This implements suggesting other mnemonics when an invalid one is specified,
for example:

$ echo "adXd r1,r2,#3" | llvm-mc -triple arm
<stdin>:1:1: error: invalid instruction, did you mean: add, qadd?
adXd r1,r2,#3
^

The implementation is target agnostic, but as a first step I have added it only
to the ARM backend; so the ARM backend is a good example if someone wants to
enable this too for another target.

Differential Revision: https://reviews.llvm.org/D33128

llvm-svn: 307148
2017-07-05 12:39:13 +00:00
Daniel Sanders 805e9cb3fc [globalisel][tablegen] Fix the misuse of STATISTICS() on release builds (like r307088) after r307133.
r307133 brought back a couple instances of the same mistake that was already
fixed by r307088. Fixed it again.

Using NumPatternEmitted as a unique id for the tables is not valid on release
builds since the counters don't count in that case.

llvm-svn: 307146
2017-07-05 12:14:18 +00:00
Diana Picus 3e8851a1b4 [ARM] GlobalISel: Extract tiny helper. NFC
Extract functionality for determining if the target uses AEABI.

llvm-svn: 307145
2017-07-05 11:53:51 +00:00
Diana Picus 97a5d9b5a7 [MachineIRBuilder] Fix formatting. NFC.
llvm-svn: 307144
2017-07-05 11:47:23 +00:00
Igor Breger 0c979d49eb [GlobalISel][X86] For now don't handle not trivial function arguments lowering.
llvm-svn: 307142
2017-07-05 11:40:35 +00:00
Diana Picus 3e40b46bf0 [MachineIRBuilder] Add buildOr helper. NFC.
This isn't used anywhere yet, but I need it for a future commit.

llvm-svn: 307141
2017-07-05 11:32:12 +00:00
Igor Breger 55e2f5963a [GlobalIsel] allow x86_fp80 values to be dumped.
Summary:
Otherwise the fallback path fails with an assertion on x86_64 targets,
when "x86_fp80" is encountered.

Reviewers: t.p.northover, zvi, guyblank

Reviewed By: zvi

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34975

llvm-svn: 307140
2017-07-05 11:11:10 +00:00
Diana Picus 05e704f453 [MachineIRBuilder] Add buildBinaryOp helper. NFC
Add a helper for building simple binary ops like add, mul, sub, and.
This can be used in the future for quickly adding support for or, xor.

llvm-svn: 307139
2017-07-05 11:02:31 +00:00
Daniel Sanders 1745076c59 [globalisel][tablegen] Fix an unused variable warning in release builds after r307133
llvm-svn: 307138
2017-07-05 10:16:48 +00:00
Max Kazantsev ebe56283bc Revert "[IndVars] Canonicalize comparisons between non-negative values and indvars"
This patch seems to cause failures of test MathExtras.SaturatingMultiply on
multiple buildbots. Reverting until the reason of that is clarified.

Differential Revision: https://reviews.llvm.org/rL307126

llvm-svn: 307135
2017-07-05 09:44:41 +00:00
Daniel Sanders d93a35ae40 [globalisel][tablegen] Added instruction emission to the state-machine-based matcher.
Summary:
This further improves the compile-time regressions that will be caused by a
re-commit of r303259.

Also added included preliminary work in preparation for the multi-insn emitter
since I needed to change the relevant part of the API for this patch anyway.

Depends on D33758

Reviewers: rovka, vitalybuka, ab, t.p.northover, qcolombet, aditya_nandakumar

Reviewed By: ab

Subscribers: kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D33764

llvm-svn: 307133
2017-07-05 09:39:33 +00:00
Max Kazantsev 80bc4a5554 [IndVars] Canonicalize comparisons between non-negative values and indvars
-If there is a IndVar which is known to be non-negative, and there is a value which is also non-negative,
then signed and unsigned comparisons between them produce the same result. Both of those can be
seen in the same loop. To allow other optimizations to simplify them, we turn all instructions like

  %c = icmp slt i32 %iv, %b
to

  %c = icmp ult i32 %iv, %b

if both %iv and %b are known to be non-negative.

Differential Revision: https://reviews.llvm.org/D34979

llvm-svn: 307126
2017-07-05 06:38:49 +00:00
Igor Breger 9d5571a226 [GlobalISel][X86] Allow graceful fallback for struct/array argument/return value lowering. Going to support it in follow patch.
llvm-svn: 307125
2017-07-05 06:24:13 +00:00
Nemanja Ivanovic 5fd4ea36fd Add the missing triple to the test case added as part of r307120.
llvm-svn: 307122
2017-07-05 05:14:43 +00:00
Nemanja Ivanovic 845a7968bc [PowerPC] Fix for PR33636
Remove casts to a constant when a node can be an undef.

Differential Revision: https://reviews.llvm.org/D34808

llvm-svn: 307120
2017-07-05 04:51:29 +00:00
Yuka Takahashi 34a7c3baf9 [Bash-autocompletion] Show flags which has HelpText or GroupID
Summary: Otherwise internal flags will be also completed.

Differential Revision: https://reviews.llvm.org/D34930

llvm-svn: 307116
2017-07-05 02:36:32 +00:00
Nirav Dave b320ef9fab Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset
Relanding after rewriting undef.ll test to avoid host-dependant
endianness.

As discussed in D34087, rewrite areNonVolatileConsecutiveLoads using
generic checks. Also, propagate missing local handling from there to
BaseIndexOffset checks.

Tests of note:

  * test/CodeGen/X86/build-vector* - Improved.
  * test/CodeGen/BPF/undef.ll - Improved store alignment allows an
    additional store merge

  * test/CodeGen/X86/clear_upper_vector_element_bits.ll - This is a
    case we already do not handle well. Here, the DAG is improved, but
    scheduling causes a code size degradation.

Reviewers: RKSimon, craig.topper, spatel, andreadb, filcab

Subscribers: nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D34472

llvm-svn: 307114
2017-07-05 01:21:23 +00:00
Alexander Shaposhnikov ed37df7ea3 [profiledata] Avoid creating a temporary vector in getNumValueData
getValueSitesForKind returns ArrayRef which has a cast operator
to std::vector, as a result a temporary vector is created
if the type of the variable is const std::vector& 
that is suboptimal in this case.

Differential revision: https://reviews.llvm.org/D34970

Test plan: make check-all

llvm-svn: 307113
2017-07-05 01:20:52 +00:00
Anna Thomas 740f529dba [SafepointIRVerifier] Add verifier pass for finding GC relocation bugs
Original Patch and summary by Philip Reames.

RewriteStatepointsForGC tries to rewrite a function in a manner where
the optimizer can't end up using a pointer value after it might have
been relocated by a safepoint. This pass checks the invariant that
RSForGC is supposed to establish and that (if we constructed semantics
correctly) later passes must preserve.

This has been a really useful diagnostic tool when initially developing
the rewriting scheme and has found numerous bugs.

Differential Revision: https://reviews.llvm.org/D15940

Reviewed by: swaroop.sridhar, mjacob

Subscribers: llvm-commits
llvm-svn: 307112
2017-07-05 01:16:29 +00:00
Dylan McKay a24aa19900 Revert "[AVR] Add the branch selection pass from the GitHub repository"
This reverts commit 602ef067c1d58ecb425d061f35f2bc4c7e92f4f3.

llvm-svn: 307111
2017-07-05 00:50:56 +00:00
Dylan McKay f115c7f917 [AVR] Add the branch selection pass from the GitHub repository
We should rewrite this using the generic branch relaxation pass, but for
the moment having this pass is better than hitting an assertion error.

llvm-svn: 307109
2017-07-05 00:41:19 +00:00
Gadi Haber 689426e3cb NFC.
Made some updates to the half.ll test under CodeGen to make it friendly to the update_llc_test_checks .py tool as follows:
1.Removing the llc flag -asm-verbose=false
2.Grouping the multiple check-prefix directives
3.Apply update_llc_test_checks.py tool on the test

This change is needed to easily update scheduling changes in an upcoming patch.

Reviewers: zvi, RKSimon, craig.topper 

Differential Revision: https://reviews.llvm.org/D34934

llvm-svn: 307108
2017-07-04 21:51:05 +00:00
Craig Topper 5e1fa83bf2 Recommit r307064, "[InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC"
The test check lines have now been fixed.

llvm-svn: 307106
2017-07-04 20:15:24 +00:00
Andrew Zhogin 2f8be0552e [ARM][test] Added test/CodeGen/ARM/ror.ll test. NFC precommit for D12833.
llvm-svn: 307103
2017-07-04 19:50:22 +00:00
Simon Pilgrim ac3e7f3f57 [X86][SSE4A] Add support for combining from non-v16i8 EXTRQI/INSERTQI shuffles
With the improved shuffle decoding we can now combine EXTRQI/INSERTQI shuffles from non-v16i8 vector types

llvm-svn: 307099
2017-07-04 18:11:02 +00:00
Simon Pilgrim f809c5f11c Fix signed/unsigned comparison warnings
llvm-svn: 307098
2017-07-04 17:42:01 +00:00
Alexander Timofeev 982aee6a38 [AMDGPU] Switch scalarize global loads ON by default
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307097
2017-07-04 17:32:00 +00:00
Anna Thomas ada4ddc0bc [LoopDeletion] NFC: Add loop being analyzed debug statement
llvm-svn: 307096
2017-07-04 17:00:03 +00:00
Simon Pilgrim 9f0a0bd20b [X86][SSE4A] Generalized EXTRQI/INSERTQI shuffle decodes
The existing decodes only worked for v16i8 vectors, this adds support for any 128-bit vector

llvm-svn: 307095
2017-07-04 16:53:12 +00:00
Hiroshi Inoue 79f8933f23 fix trivial typos in comments; NFC
llvm-svn: 307094
2017-07-04 16:35:26 +00:00
Daniel Sanders f1530f2512 [globalisel][tablegen] Fix the modules build after r307079
Exclude InstructionSelectorImpl.h since DEBUG_TYPE may vary between includes.

llvm-svn: 307093
2017-07-04 16:29:38 +00:00
Andrew Zhogin de5d250a0b [DAGCombiner] Intermediate variables in visitRotate promoted to the function's begin. NFC precommit for D12833.
llvm-svn: 307091
2017-07-04 15:57:39 +00:00
Daniel Sanders c60abe37f2 [globalisel][tablegen] Fix release builds after r307079
Using NumPatternEmitted as a unique id for the tables is not valid on release
builds since the counters don't count in that case.

Also fix an unused variable warning.

llvm-svn: 307088
2017-07-04 15:31:50 +00:00
Anna Thomas 505941e7d6 [FastISel] Move gc intrinsic test to X86 directory
Move from generic to X86 directory since gc intrinsics only supposed in
X86 64 bit.
Add target triple as well.
Fixes build failure in i686-linux-RA  caused by rL307084.

llvm-svn: 307086
2017-07-04 15:24:08 +00:00
Alexander Kornienko 656466ed0b Fix dangling StringRefs found by clang-tidy misc-dangling-handle check.
llvm-svn: 307085
2017-07-04 15:13:02 +00:00
Anna Thomas a66a98cc74 [FastISel][SelectionDAG]Teach fastISel about GC intrinsics
Summary:
We are crashing in LLC at O0 when gc intrinsics are present in the block.
The reason being FastISel performs basic block ISel by modifying GC.relocates
to be the first instruction in the block. This can cause us to visit the GC
relocate before it's corresponding GC.statepoint is visited, which is incorrect.
When we lower the statepoint, we record the base and derived pointers, along
with the gc.relocates. After this we can visit the gc.relocate.

This patch avoids fastISel from incorrectly creating the block with gc.relocate
as the first instruction.

Reviewers: qcolombet, skatkov, qikon, reames

Reviewed by: skatkov

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34421

llvm-svn: 307084
2017-07-04 15:09:09 +00:00
Marek Olsak b83f5c99ba [AMDGPU] Fix latency of MIMG instructions
Patch by cwabbott (Connor Abbott).

llvm-svn: 307081
2017-07-04 14:43:38 +00:00
Ilya Biryukov 0273b81cfb NFC. Removed mention of missing script from build_docker_image.sh.
llvm-svn: 307080
2017-07-04 14:41:21 +00:00
Daniel Sanders 6ab0daade8 [globalisel][tablegen] Partially fix compile-time regressions by converting matcher to state-machine(s)
Summary:
Replace the matcher if-statements for each rule with a state-machine. This
significantly reduces compile time, memory allocations, and cumulative memory
allocation when compiling AArch64InstructionSelector.cpp.o after r303259 is
recommitted.

The following patches will expand on this further to fully fix the regressions.

Reviewers: rovka, ab, t.p.northover, qcolombet, aditya_nandakumar

Reviewed By: ab

Subscribers: vitalybuka, aemerson, javed.absar, igorb, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33758

llvm-svn: 307079
2017-07-04 14:35:06 +00:00
Anna Thomas 90f69abc8b [LoopDeletion] NFC: Add debug statements to the optimization
We have a DEBUG option for loop deletion, but no related debug messages.
Added some debug messages to state why loop deletion failed.

llvm-svn: 307078
2017-07-04 14:05:19 +00:00
Hiroshi Inoue 2344b7611a fix trivial typos in comments; NFC
llvm-svn: 307075
2017-07-04 13:09:29 +00:00
Simon Pilgrim d128222f0c [X86] Add combine tests for vector rotates
Reference tests for D12833

llvm-svn: 307073
2017-07-04 12:33:53 +00:00
NAKAMURA Takumi ff1d5aefe3 Revert r307064, "[InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC"
Seems confused between %tmpN and unnamed %N to give same name.

llvm-svn: 307070
2017-07-04 12:13:27 +00:00
NAKAMURA Takumi 501efda909 llvm/ExecutionEngine/Orc/ObjectTransformLayer.h: Add <memory> to appease libstdc++'s std::shared_ptr.
llvm-svn: 307069
2017-07-04 12:12:37 +00:00
Gadi Haber 4980790e81 NFC commit.
Converting the Codegen test "extractelement-legalization-store-ordering.ll" to be "update_llc_test_checks" friendly.

The changes to the test are needed for an upcoming scheduling patch.

Reviewers: zvi, RKSimon

Differential Revision: https://reviews.llvm.org/D34935

llvm-svn: 307066
2017-07-04 07:18:03 +00:00
Craig Topper 0f746c2793 [InstCombine] Add TODOs for a couple things that should maybe be in InstSimplify instead. NFC
llvm-svn: 307065
2017-07-04 06:50:48 +00:00
Craig Topper 872d750560 [InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC
I assume bswap intrinsics are somewhat costly so we should be making sure we are getting rid of them not creating more.

llvm-svn: 307064
2017-07-04 06:50:44 +00:00
Alexander Shaposhnikov 8b5f0c9111 [tablegen] Avoid creating a temporary vector in getInstructionCase
Record::getValues returns ArrayRef which has a cast operator
to std::vector, as a result a temporary vector is created
if the type of the variable is const std::vector& 
that is suboptimal in this case.

Differential revision: https://reviews.llvm.org/D34969

Test plan: make check-all

llvm-svn: 307063
2017-07-04 06:16:53 +00:00
Craig Topper ad140cfb68 [X86] Add comment string for broadcast loads from the constant pool.
Summary:
When broadcasting from the constant pool its useful to print out the final vector similar to what we do for normal moves from the constant pool.

I changed only a couple tests that were broadcast focused. One of them had been previously hand tweaked after running the script so that it could check the constant pool declaration. But I think this patch makes that unnecessary now since we can check the comment instead.

Reviewers: spatel, RKSimon, zvi

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34923

llvm-svn: 307062
2017-07-04 05:46:11 +00:00
Alexander Shaposhnikov 49fc24a8bf [llvm] Revert "[tablegen] Avoid creating a temporary vector in getInstructionCase"
Revert rL307059 because of the incorrect commit message & patch, 
will recommit later.

llvm-svn: 307061
2017-07-04 05:37:37 +00:00
Craig Topper a4c5caf67a [X86] Add RDRAND feature to GLM CPU
Summary: I believe this should be supported on GLM since RDSEED is.

Reviewers: m_zuckerman, zvi, RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34828

llvm-svn: 307060
2017-07-04 05:33:19 +00:00
Alexander Shaposhnikov 680f017487 [tablegen] Avoid creating a temporary vector in getInstructionCase
Record::getValues returns ArrayRef which has a cast operator
to std::vector, as a result a temporary vector is created
if the type of the variable is const std::vector& 
that was suboptimal in this case.

Differential revision: https://reviews.llvm.org/D34969

Test plan: make check-all

llvm-svn: 307059
2017-07-04 05:11:30 +00:00
Lang Hames 5b51816020 [Orc] Remove the memory manager argument to addModule, and de-templatize the
symbol resolver argument.

De-templatizing the symbol resolver is part of the ongoing simplification of
ORC layer API.

Removing the memory management argument (and delegating construction of memory
managers for RTDyldObjectLinkingLayer to a functor passed in to the constructor)
allows us to build JITs whose base object layers need not be compatible with
RTDyldObjectLinkingLayer's memory mangement scheme. For example, a 'remote
object layer' that sends fully relocatable objects directly to the remote does
not need a memory management scheme at all (that will be handled by the remote).

llvm-svn: 307058
2017-07-04 04:42:30 +00:00
Dylan McKay b224d98594 [AVR] Fix bug which caused assertion errors for some FRMIDX instructions
Previously, if a basic block ended with a FRMIDX instruction, we would
end up doing something like this.

*std::next(MBB.end())

Which would hit an error:

"Assertion `!NodePtr->isKnownSentinel()' failed."

llvm-svn: 307057
2017-07-04 04:40:06 +00:00
Dylan McKay eef7a6a32f [AVR] Add a missing clobber declaration to LPMW
llvm-svn: 307056
2017-07-04 02:52:43 +00:00
Nirav Dave a2810e677b [DAG] Fixed predicate for determining when two frame indices
addresses are comparable. NFCI.

llvm-svn: 307055
2017-07-04 02:20:17 +00:00
NAKAMURA Takumi e4a741376b Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default"
It broke a testcase.

  Failing Tests (1):
      LLVM :: CodeGen/AMDGPU/alignbit-pat.ll

llvm-svn: 307054
2017-07-04 02:14:18 +00:00
Anton Yartsev 66d32c5e06 [legalize-types] Clean up softening machinery.
The patch makes SoftenFloatResult/Operand logic just the same as all other legalization routines have: SoftenFloatResult() now fills the SoftenFloats map and SoftenFloatOperand() perform all needed replacements. This prevents softening mashinery from leaving stale entries in SoftenFloats map (that resulted in errors during the legalize type checking) and clarifies softening. The patch replaces https://reviews.llvm.org/D29265.

Differential Revision: https://reviews.llvm.org/D31946

llvm-svn: 307053
2017-07-04 01:08:55 +00:00
Simon Pilgrim fa6e675267 [X86][SSE4A] Add support for combining from EXTRQI/INSERTQI shuffles
llvm-svn: 307048
2017-07-03 20:58:16 +00:00
Zvi Rackover fa00e34b88 MathExtras UnitTest: Assert that isPowerOf2(0) is false. NFC.
Summary:
This is a follow-up on D34077. Elena observed that the
correctness of the code relies on isPowerOf2(0) returning false.
Adding a test to cover this corner-case.

Reviewers: delena, davide, craig.topper

Reviewed By: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34939

llvm-svn: 307046
2017-07-03 18:42:47 +00:00
Simon Pilgrim bdfb3b1d5f [X86][SSE4A] Add SSE4A shuffle tests on pre-SSSE3 hardware
llvm-svn: 307042
2017-07-03 16:53:11 +00:00
Simon Pilgrim b5c68a6717 [X86][SSE4A] Test SSE4A shuffle combining on SSE42 capable target as well
llvm-svn: 307038
2017-07-03 15:55:54 +00:00
Zvi Rackover d7a1c334ce DAGCombine: Combine BUILD_VECTOR to TRUNCATE
Summary:
Add a combine for creating a truncate to replace a build_vector composed of extracts with
indices that form a stride-2^N series.

Example:
v8i32 V = ...

v4i32 build_vector((extract_elt V, 0), (extract_elt V, 2), (extract_elt V, 4), (extract_elt V, 6))
-->
v4i32 truncate (bitcast V to v4i64)

Related discussion in llvm-dev about canonicalizing shuffles to
truncates in LLVM IR:
http://lists.llvm.org/pipermail/llvm-dev/2017-January/108936.html.

Reviewers: spatel, RKSimon, efriedma, igorb, craig.topper, wolfgangp, delena

Reviewed By: delena

Subscribers: guyblank, delena, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D34077

llvm-svn: 307036
2017-07-03 15:47:40 +00:00
Florian Hahn 4eeff394d3 [LoopInterchange] Add more debug messages to currentLimitations().
Summary: This makes it easier to find out which limitation prevented this pass from doing its work.

Reviewers: karthikthecool, mzolotukhin, efriedma, mcrosier

Reviewed By: mcrosier

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D34940

llvm-svn: 307035
2017-07-03 15:32:00 +00:00
Sanjay Patel e9b1d16a8c [x86] auto-generate complete checks for tests; NFC
These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
There were also over-specifications in the RUN params such as CPU model.

llvm-svn: 307033
2017-07-03 15:27:19 +00:00
Ilya Biryukov 4d7234cc7d Fixed argument parsing in docker scripts.
llvm-svn: 307031
2017-07-03 15:16:27 +00:00
Sanjay Patel d3173740fd [x86] auto-generate complete checks for tests; NFC
These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
There were also several over-specifications in the RUN params such as CPU model or OS requirement

llvm-svn: 307028
2017-07-03 15:04:05 +00:00
Simon Pilgrim decfaca033 [X86][SSE4A] Add tests showing missed opportunities to combine EXTRQI/INSERTQI shuffles
llvm-svn: 307027
2017-07-03 15:01:07 +00:00
Alexander Timofeev ea7f08bee5 [AMDGPU] Switch scalarize global loads ON by default
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307026
2017-07-03 14:54:11 +00:00
Sanjay Patel dab798a25f [x86] auto-generate complete checks for tests; NFC
These all used 'CHECK-NOT' which isn't necessary if we have complete checks.

llvm-svn: 307024
2017-07-03 14:29:45 +00:00
Sanjay Patel 448095c19b [InstCombine] move and improve tests for cmp-intrinsic; NFC
llvm-svn: 307022
2017-07-03 14:07:40 +00:00
Benjamin Kramer fb620493e1 Revert "[GVN] Recommit the patch "Add phi-translate support in scalarpre"."
This reverts commit r306313. This breaks selfhost at -O3 and PR33652.
Let me know if you need additional information on reproducing the issue.

llvm-svn: 307021
2017-07-03 12:23:10 +00:00
Igor Breger 5c787ab346 [GlobalISel][X86] fix %ptr(p0) = G_CONSTANT selection.
llvm-svn: 307019
2017-07-03 11:06:54 +00:00
Hiroshi Inoue ddb34d84c9 fix trivial typos in comments; NFC
llvm-svn: 307004
2017-07-03 06:32:59 +00:00
Craig Topper 8036970008 [InstCombine] Add a TODO for a probable missing single use check. NFC
Will try to fix it soon, but in case I forget.

llvm-svn: 307003
2017-07-03 05:54:16 +00:00
Craig Topper 766ce6e9cf [InstCombine] Support BITWISE_OP( BSWAP(x), CONSTANT ) -> BSWAP( BITWISE_OP(x, BSWAP(CONSTANT) ) ) for splat vectors.
llvm-svn: 307002
2017-07-03 05:54:15 +00:00
Craig Topper 1a79c38d5e [InstCombine] Add test cases for BITWISE_OP( BSWAP(x), CONSTANT ) -> BSWAP( BITWISE_OP(x, BSWAP(CONSTANT) ) ) with splat vectors. NFC
llvm-svn: 307001
2017-07-03 05:54:14 +00:00
Craig Topper 32fce4d647 [InstCombine] Remove support for BITWISE_OP(CONSTANT, BSWAP(x)) -> BSWAP(OP(BSWAP(CONSTANT), x)).
Constants were already canonicalized to the right hand side before we got here.

llvm-svn: 307000
2017-07-03 05:54:13 +00:00
Craig Topper 1e4643a98e [InstCombine] Support BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP(BITWISE_OP(A, B)) for vectors.
llvm-svn: 306999
2017-07-03 05:54:13 +00:00