Commit Graph

180518 Commits

Author SHA1 Message Date
Cameron McInally 11e7357a05 [NFC][IR] Move CreateFNegFMF(...) next to CreateFNeg(...).
This is now in line with the other Create*FMF(...) functions.

llvm-svn: 363836
2019-06-19 16:35:15 +00:00
James Henderson e20326ed33 [test][llvm-dwarfdump] Remove pointless CHECK-NOT lines
The original line was there from when this test was added, but it is
checking for a switch that doesn't exist, so really has no purpose, at
least any more.

llvm-svn: 363833
2019-06-19 16:31:59 +00:00
Evandro Menezes 567f6c150d [AVR] Change limit type to match the argument type (NFC)
llvm-svn: 363832
2019-06-19 16:12:12 +00:00
Evandro Menezes 56c45e93ab [Hexagon] Change limit type to match the argument type (NFC)
llvm-svn: 363831
2019-06-19 16:12:01 +00:00
Andrea Di Biagio 792510f869 [llvm-mca][docs] clarify how the quality of the perf report is affected by the quality of the scheduling models.
Differential Revision: https://reviews.llvm.org/D63556

llvm-svn: 363830
2019-06-19 16:10:58 +00:00
Hubert Tong 1f6ddfb6a3 [NFC][llvm-objcopy] Fix overly restrictive od output check
The check against the output of `od` in the affected tests expect a
specific input offset format. They also expect a specific offset value,
not consistent with the EXAMPLE section for `od` in POSIX.1-2017
Chapter 4, while using the `-j` option. In particular, the example shows
that the input offset begins at 0 following the bytes skipped.

This patch adjusts the matching of the input offset to be more generic.
In order to avoid false matches, it restricts the number of bytes to be
formatted.

llvm-svn: 363829
2019-06-19 16:04:24 +00:00
Hubert Tong e9983eed5a [NFC][LSR] Avoid undefined grep in pr2570.ll
greater-than-sign is not a BRE special character.

POSIX.1-2017 XBD Section 9.3.2 indicates that the interpretation of `\>`
is undefined. This patch replaces the pattern.

llvm-svn: 363828
2019-06-19 16:02:54 +00:00
Stefan Granitz f2ffa7320e Specify log level for CMake messages (less stderr)
Summary:
Specify message levels in CMake. Prefer STATUS (stdout).

As the default message mode (i.e. level) is NOTICE in CMake, more then necessary messages get printed to stderr. Some tools,  noticably ccmake treat this as an error and require additional confirmation and re-running CMake's configuration step.

This commit specifies a mode (either STATUS or WARNING or FATAL_ERROR)  instead of the default.

* I used `csearch -f 'llvm-project/.+(CMakeLists\.txt|cmake)' -l 'message\("'` to find all locations.
* Reviewers were chosen by the most common authors of specific files. If there are more suitable reviewers for these CMake changes, please let me know.

Patch by: Christoph Siedentop

Reviewers: zturner, beanz, xiaobai, kbobyrev, lebedev.ri, sgraenitz

Reviewed By: sgraenitz

Subscribers: mgorny, lebedev.ri, #sanitizers, lldb-commits, llvm-commits

Tags: #sanitizers, #lldb, #llvm

Differential Revision: https://reviews.llvm.org/D63370

llvm-svn: 363821
2019-06-19 15:25:32 +00:00
Simon Pilgrim cdc0236e3a [X86] getExtendInVec - take a ISD::*_EXTEND opcode instead of a IsSigned bool flag. NFCI.
Prep work to support ANY_EXTEND/ANY_EXTEND_VECTOR_INREG without needing another flag.

llvm-svn: 363818
2019-06-19 15:18:24 +00:00
Cameron McInally 7aa898e61e [DFSan] Add UnaryOperator visitor to DataFlowSanitizer
Differential Revision: https://reviews.llvm.org/D62815

llvm-svn: 363814
2019-06-19 15:11:41 +00:00
Cameron McInally a027cf4764 [Reassociate] Handle unary FNeg in the Reassociate pass
Differential Revision: https://reviews.llvm.org/D63445

llvm-svn: 363813
2019-06-19 14:59:14 +00:00
Simon Pilgrim d4754cac89 [X86] Add *_EXTEND -> *_EXTEND_VECTOR_INREG opcode conversion helper. NFCI.
Given a *_EXTEND or *_EXTEND_VECTOR_INREG opcode, convert it to *_EXTEND_VECTOR_INREG.

llvm-svn: 363812
2019-06-19 14:54:02 +00:00
Bjorn Pettersson 16ff5fea87 [ConstantFolding] Add constant folding for smul.fix and smul.fix.sat
Summary:
This patch teaches ConstantFolding to constant fold
both scalar and vector variants of llvm.smul.fix and
llvm.smul.fix.sat.

As described in the LangRef rounding is unspecified for
these instrinsics. If the result cannot be represented
exactly the default behavior in ConstantFolding is to
round down towards negative infinity. If a target has a
preferred rounding that is different some kind of target
hook would be needed (same strategy as used by the
SelectionDAG legalizer).

Reviewers: nikic, leonardchan, RKSimon

Reviewed By: leonardchan

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63385

llvm-svn: 363811
2019-06-19 14:28:03 +00:00
Bjorn Pettersson b81b9a4e7b [ConstantFolding] Refactor ConstantFoldScalarCall. NFC
This patch splits ConstantFoldScalarCall into several
functions.

Benefits:
- Reduces indentation levels and avoids long if-statements.
- Makes it easier to add support for > 3 operands.

llvm-svn: 363810
2019-06-19 14:27:51 +00:00
Simon Pilgrim 2b309027ed [X86] Merge extract_subvector(*_EXTEND) and extract_subvector(*_EXTEND_VECTOR_INREG) handling. NFCI.
llvm-svn: 363808
2019-06-19 14:25:27 +00:00
Ulrich Weigand 3641b10f3d [SystemZ] Support vector load/store alignment hints
Vector load/store instructions support an optional alignment field
that the compiler can use to provide known alignment info to the
hardware.  If the field is used (and the information is correct),
the hardware may be able (on some models) to perform faster memory
accesses than otherwise.

This patch adds support for alignment hints in the assembler and
disassembler, and fills in known alignment during codegen.

llvm-svn: 363806
2019-06-19 14:20:00 +00:00
Simon Pilgrim c3994f77cb [TargetLowering] SimplifyDemandedBits SIGN_EXTEND_VECTOR_INREG -> ANY/ZERO_EXTEND_VECTOR_INREG
Simplify SIGN_EXTEND_VECTOR_INREG if the extended bits are not required/known zero.

Matches what we already do for SIGN_EXTEND.

llvm-svn: 363802
2019-06-19 13:58:02 +00:00
Fangrui Song 102b1efd53 [llvm-dwarfdump] --gdb-index: fix uninitialized TuListOffset
The test only checks the existence of the `Types CU list` line.
Unfortunately I can't make a better test because
{gcc,clang} -fuse-ld={lld,gold} --gdb-index do not give me a non-empty types CU list.

Reviewed By: ikudrin

Differential Revision: https://reviews.llvm.org/D63537

llvm-svn: 363800
2019-06-19 13:51:29 +00:00
Simon Pilgrim 128ce93c60 Revert rL363678 : AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics
There may or may not be additional work to handle this correctly on
SI/CI.
........
Breaks EXPENSIVE_CHECKS buildbots - http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/78/

llvm-svn: 363797
2019-06-19 13:00:54 +00:00
David Bolvansky e3cd19d330 [NFC] Added tests for D63534
llvm-svn: 363796
2019-06-19 12:59:37 +00:00
David Bolvansky 21fd232385 [NFC] Added tests for cttz(abs(x)) -> cttz(x) fold
llvm-svn: 363795
2019-06-19 12:55:39 +00:00
Simon Pilgrim 9eed5d2f78 [DAGCombiner] Support (shl (ext (shl x, c1)), c2) -> (shl (ext x), (add c1, c2)) non-uniform folds.
Use matchBinaryPredicate instead of isConstOrConstSplat to let us handle non-uniform shift cases. 

llvm-svn: 363793
2019-06-19 12:41:37 +00:00
Simon Pilgrim 8c49366c9b [DAGCombiner] Support (shl (ext (shl x, c1)), c2) -> 0 non-uniform folds.
Use matchBinaryPredicate instead of isConstOrConstSplat to let us handle non-uniform shift cases. 

This requires us to tweak matchBinaryPredicate to allow it to (optionally) handle constants with different type widths.

llvm-svn: 363792
2019-06-19 12:25:29 +00:00
Simon Pilgrim 85f70baa23 [X86] Add non-uniform (shl (ext (shl x, c1)), c2) -> (shl (ext x), (add c1, c2)) test
llvm-svn: 363791
2019-06-19 11:36:01 +00:00
Simon Pilgrim bb6b856183 [DAGCombiner] visitSHL - pull out repeated shift amount VT. NFCI.
llvm-svn: 363789
2019-06-19 11:31:26 +00:00
Simon Pilgrim d954a53633 [DAGCombine] Fix (shl (ext (shl x, c1)), c2) -> (shl (ext x), (add c1, c2)) comment. NFCI.
We pre-extend, not post.

llvm-svn: 363787
2019-06-19 11:17:48 +00:00
Orlando Cazalet-Hyams 1251cac62a [DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through loop even after completion
Summary:
Bug: https://bugs.llvm.org/show_bug.cgi?id=39024

The bug reports that a vectorized loop is stepped through 4 times and each step through the loop seemed to show a different path. I found two problems here:

A) An incorrect line number on a preheader block (for.body.preheader) instruction causes a step into the loop before it begins.
B) Instructions in the middle block have different line numbers which give the impression of another iteration.

In this patch I give all of the middle block instructions the line number of the scalar loop latch terminator branch. This seems to provide the smoothest debugging experience because the vectorized loops will always end on this line before dropping into the scalar loop. To solve problem A I have altered llvm::SplitBlockPredecessors to accommodate loop header blocks.

I have set up a separate review D61933 for a fix which is required for this patch.

Reviewers: samsonov, vsk, aprantl, probinson, anemet, hfinkel, jmorse

Reviewed By: hfinkel, jmorse

Subscribers: jmorse, javed.absar, eraman, kcc, bjope, jmellorcrummey, hfinkel, gbedwell, hiraditya, zzheng, llvm-commits

Tags: #llvm, #debug-info

Differential Revision: https://reviews.llvm.org/D60831

> llvm-svn: 363046

llvm-svn: 363786
2019-06-19 10:50:47 +00:00
Jay Foad 45d19fb470 [ConstantFolding] Fix assertion failure on non-power-of-two vector load.
Summary:
The test case does an (out of bounds) load from a global constant with
type <3 x float>. InstSimplify tried to turn this into an integer load
of the whole alloc size of the vector, which is 128 bits due to
alignment padding, and then bitcast this to <3 x vector> which failed
an assertion due to the type size mismatch.

The fix is to do an integer load of the normal size of the vector, with
no alignment padding.

Reviewers: tpr, arsenm, majnemer, dstuttard

Reviewed By: arsenm

Subscribers: hfinkel, wdng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63375

llvm-svn: 363784
2019-06-19 10:28:48 +00:00
Lewis Revill 18737e81eb [RISCV] Allow parsing immediates that use tilde & exclaim
This patch allows immediates (and CSR alias immediates) which start with
a tilde token or an exclaim (!) token to be parsed as intended.

Differential Revision: https://reviews.llvm.org/D57320

llvm-svn: 363783
2019-06-19 10:27:24 +00:00
Lewis Revill 218aa0edb1 [RISCV] Fix failure to parse parenthesized immediates
Since the parser attempts to parse an operand as a register with
parentheses before parsing it as an immediate, immediates in
parentheses should not be parsed by parseRegister. However in the case
where the immediate does not start with an identifier, the LParen is not
unlexed and so the RParen causes an unexpected token error.

This patch adds the missing UnLex, and modifies the existing UnLex to
not use a buffered token, as it should always be unlexing an LParen.

Differential Revision: https://reviews.llvm.org/D57319

llvm-svn: 363782
2019-06-19 10:11:13 +00:00
Clement Courbet f7a6fb9f2c Fix r363773: Update Barcelona MCA tests.
llvm-svn: 363781
2019-06-19 10:00:36 +00:00
Hans Wennborg 50845bcb7f Make TargetParserTest.ARMExtensionFeatures not run out of memory on 32-bit (PR42316)
The test still probably shouldn't run this loop 17 million times, but at
least now it won't run out of memory.

llvm-svn: 363780
2019-06-19 09:46:37 +00:00
George Rimar b6e20937b3 [yaml2obj/obj2yaml] - Make RawContentSection::Info Optional<>
This allows to customize this field for "implicit" sections properly.

Differential revision: https://reviews.llvm.org/D63487

llvm-svn: 363777
2019-06-19 08:57:38 +00:00
Roman Lebedev 9f9691c032 [NFC][X86][MCA] Barcelona: add load/store/load-store-throughput tests
llvm-svn: 363775
2019-06-19 08:53:34 +00:00
Roman Lebedev 4358016b03 [NFC][X86][MCA] BdVer2: add load-store-throughput test
llvm-svn: 363774
2019-06-19 08:53:28 +00:00
Clement Courbet 4ef7c2868a [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr
Summary:
llvm.x86.sse.stmxcsr only writes to memory.
llvm.x86.sse.ldmxcsr only reads from memory, and might generate an FPE.

Reviewers: craig.topper, RKSimon

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62896

llvm-svn: 363773
2019-06-19 08:44:31 +00:00
Lewis Revill 39263ac5d1 [RISCV] Add lowering of global TLS addresses
This patch adds lowering for global TLS addresses for the TLS models of
InitialExec, GlobalDynamic, LocalExec and LocalDynamic.

LocalExec support required using a 4-operand add instruction, which uses
the fourth operand to express a relocation on the symbol. The necessary
fixup is emitted when the instruction is emitted.

Differential Revision: https://reviews.llvm.org/D55305

llvm-svn: 363771
2019-06-19 08:40:59 +00:00
Hans Wennborg 9ed156701b vs integration: bump version nbr
llvm-svn: 363769
2019-06-19 07:39:53 +00:00
Hans Wennborg e9435190d6 Revert r359557 "vs integration: vs2019 support"
Turns out this worked on my machine because I still had VS2017 installed, but
it didn't actually work in general.

Since the extension is unmaintained and MS is doing their own LLVM toolset
integration for VS2019, let's just revert.

llvm-svn: 363768
2019-06-19 07:37:53 +00:00
Yuanfang Chen 58dbe47b9c Test commit access
llvm-svn: 363763
2019-06-19 05:40:24 +00:00
Alex Bradbury ec4e0809df [RISCV] Fix test after r363757
r363757 renamed ExpandISelPseudo to FinalizeISel, so the RUN line in
select-optimize-multiple.mir needed updating to refer to finalize-isel.

llvm-svn: 363762
2019-06-19 03:18:48 +00:00
Chen Zheng c5b918de58 [NFC] move some hardware loop checking code to a common place for other using.
Differential Revision: https://reviews.llvm.org/D63478

llvm-svn: 363758
2019-06-19 01:26:31 +00:00
Matt Arsenault 9cac4e6d14 Rename ExpandISelPseudo->FinalizeISel, delay register reservation
This allows targets to make more decisions about reserved registers
after isel. For example, now it should be certain there are calls or
stack objects in the frame or not, which could have been introduced by
legalization.

Patch by Matthias Braun

llvm-svn: 363757
2019-06-19 00:25:39 +00:00
Thomas Lively 1885747498 [WebAssembly] Optimize ISel for SIMD Boolean reductions
Summary:
Converting the result *.{all,any}_true to a bool at the source level
generates LLVM IR that compares the result to 0. This check is
redundant since these instructions already return either 0 or 1 and
therefore conform to the BooleanContents setting for WebAssembly. This
CL adds patterns to detect and remove such redundant operations on the
result of Boolean reductions.

Reviewers: dschuff, aheejin

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63529

llvm-svn: 363756
2019-06-19 00:02:13 +00:00
Daniel Sanders 4c2522220f Re-commit r363744: [tblgen][disasm] Allow multiple encodings to disassemble to the same instruction
It seems macOS lets you have ArrayRef<const X> even though this is apparently
forbidden by the language standard (Thanks MSVC++ for the clear error message).
Removed the problematic const's to fix this.

(It also seems I'm not receiving buildbot emails anymore and I'm trying to find
 out why. In the mean time I'll be polling lab.llvm.org to hopefully see if/when
 failures occur)

llvm-svn: 363753
2019-06-18 23:34:46 +00:00
Erik Pilkington cf8c6cfcdc [demangle] Special case clang's creative mangling of __uuidof expressions.
llvm-svn: 363752
2019-06-18 23:34:09 +00:00
Evandro Menezes 1933cbe866 [test] Change comment wording (NFC)
llvm-svn: 363751
2019-06-18 23:31:10 +00:00
Jordan Rupprecht 4053d95cd8 Revert [tblgen][disasm] Allow multiple encodings to disassemble to the same instruction
This reverts r363744 (git commit 9b2252123d)

This breaks many buildbots, e.g. http://lab.llvm.org:8011/builders/clang-atom-d525-fedora-rel/builds/203/steps/build%20stage%201/logs/stdio

llvm-svn: 363747
2019-06-18 22:21:31 +00:00
Michael Trent c2885ded2b Print dylib load kind (weak, reexport, etc) in llvm-objdump -m -dylibs-used
Summary:
Historically llvm-objdump prints the path to a dylib as well as the
dylib's compatibility version and current version number. This change
extends this information by adding the kind of dylib load: weak,
reexport, etc.

rdar://51383512

Reviewers: pete, lhames

Reviewed By: pete

Subscribers: rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62866

llvm-svn: 363746
2019-06-18 22:20:10 +00:00
Amara Emerson d11ea2c8c5 [GlobalISel][Localizer] Remove redundant set lookup.
After changing the algorithm to only process the entry block we never revisit
a processed instruction.

llvm-svn: 363745
2019-06-18 22:08:40 +00:00