Commit Graph

72 Commits

Author SHA1 Message Date
Bill Wendling b3d85a5d4b Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I
based what flag to set on whether it was already marked as
"isRematerializable". If there was a further check to determine if it's "really"
rematerializable, then I marked it as "mayHaveSideEffects" and created a check
in the X86 back-end similar to the remat one.

llvm-svn: 45132
2007-12-17 23:07:56 +00:00
Bill Wendling 3f19dfe794 Reverting 44702. It wasn't correct to rename them.
llvm-svn: 44727
2007-12-08 23:58:46 +00:00
Bill Wendling 2b07d8c5a0 Renaming:
isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable

llvm-svn: 44702
2007-12-08 07:17:56 +00:00
Duncan Sands 7741427a09 Move getX86RegNum into X86RegisterInfo and use it
in the trampoline lowering.  Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.

llvm-svn: 41577
2007-08-29 19:01:20 +00:00
Dan Gohman e8c1e428f2 Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).

llvm-svn: 37728
2007-06-26 00:48:07 +00:00
Dan Gohman 9e82064924 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
2007-06-19 01:48:05 +00:00
Dale Johannesen 616627b002 Do not treat FP_REG_KILL as terminator in branch analysis (X86).
llvm-svn: 37578
2007-06-14 22:03:45 +00:00
Dan Gohman 4a4a8eb00e Add a target hook to allow loads from constant pools to be rematerialized, and an
implementation for x86.

llvm-svn: 37576
2007-06-14 20:50:44 +00:00
Evan Cheng e20dd92792 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
llvm-svn: 37193
2007-05-18 00:18:17 +00:00
Bill Wendling f099841573 Add support for our first SSSE3 instruction "pmulhrsw".
llvm-svn: 35869
2007-04-10 22:10:25 +00:00
Jim Laskey f9e5445ed4 Make LABEL a builtin opcode.
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
Evan Cheng 62cdc3f011 - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.

llvm-svn: 32215
2006-12-05 04:01:03 +00:00
Evan Cheng 67fc141db5 Match TargetInstrInfo changes.
llvm-svn: 32098
2006-12-01 21:52:58 +00:00
Chris Lattner 53ebf20c26 add another target hook for branch folding.
llvm-svn: 31262
2006-10-28 17:29:57 +00:00
Chris Lattner 3a897f31fa Implement support for branch condition reversal.
llvm-svn: 31099
2006-10-21 05:52:40 +00:00
Chris Lattner c0fb567e23 Implement branch analysis/xform hooks required by the branch folding pass.
llvm-svn: 31065
2006-10-20 17:42:20 +00:00
Chris Lattner 0408e5b7ce expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
llvm-svn: 31024
2006-10-17 22:41:45 +00:00
Chris Lattner 63007919dc remove some dead code
llvm-svn: 30938
2006-10-13 20:40:42 +00:00
Evan Cheng 11b0a5dbd4 Committing X86-64 support.
llvm-svn: 30177
2006-09-08 06:48:29 +00:00
Evan Cheng c8c172eaae Fix a build breaker.
llvm-svn: 28574
2006-05-30 21:45:53 +00:00
Chris Lattner aa2372562e Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447
2006-05-24 17:04:05 +00:00
Evan Cheng 03524c63ff ImmMask should be 3 for a two-bit field; Compact X86II
llvm-svn: 28381
2006-05-18 06:27:15 +00:00
Chris Lattner bb53acd03c Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Evan Cheng 9e350cd6ad - Use xor to clear integer registers (set R, 0).
- Added a new format for instructions where the source register is implied
  and it is same as the destination register. Used for pseudo instructions
  that clear the destination register.

llvm-svn: 25872
2006-02-01 06:13:50 +00:00
Jeff Cohen 33a030e36c Eliminate tabs and trailing spaces.
llvm-svn: 22520
2005-07-27 05:53:44 +00:00
Nate Begeman 8a0933608a First round of support for doing scalar FP using the SSE2 ISA extension and
XMM registers.  There are many known deficiencies and fixmes, which will be
addressed ASAP.  The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.

The x86 backend will still default to x87 style FP.  To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.

An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
                        Sum += P[i]; return Sum; }

The inner loop looks like the following:
x87:
.LBB_foo_1:     # no_exit
        fldl (%esp)
        faddl (%eax,%ecx,8)
        fstpl (%esp)
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

SSE2:
        addsd (%eax,%ecx,8), %xmm0
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

llvm-svn: 22340
2005-07-06 18:59:04 +00:00
Misha Brukman c88330ad13 * Remove trailing whitespace
* Convert tabs to spaces

llvm-svn: 21426
2005-04-21 23:38:14 +00:00
Chris Lattner 2947801735 Teach the code generator that shrd/shld is commutable if it has an immediate.
This allows us to generate this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shld %EDX, %EDX, 2
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

Note the magically transmogrifying immediate.

llvm-svn: 19686
2005-01-19 07:11:01 +00:00
Chris Lattner b7782d77c1 Implement the convertToThreeAddress method, add support for inverting JP/JNP
branches.

llvm-svn: 19247
2005-01-02 02:37:07 +00:00
Chris Lattner eb34c59930 Remove a bunch of ad-hoc target-specific flags that were only used by the
old asmprinter.

llvm-svn: 15660
2004-08-11 07:12:04 +00:00
Chris Lattner 27fcf976f2 Eliminate 3 of the X86 printImplicit* flags.
llvm-svn: 15398
2004-08-01 08:23:17 +00:00
Alkis Evlogimenos f57d78a87d Implement insertGoto and reverseBranchCondition for the X86.
llvm-svn: 15362
2004-07-31 09:38:47 +00:00
Chris Lattner 0876edf122 Introduce a new FP instruction type to separate the compare cases from the
twoarg cases.

llvm-svn: 14143
2004-06-11 04:41:24 +00:00
Chris Lattner 27b2e2cdc0 Add support for the printImplicitDefsBefore flag
llvm-svn: 12893
2004-04-13 17:18:39 +00:00
John Criswell 10db062d41 Added the llvm.readport and llvm.writeport intrinsics for x86. These do
I/O port instructions on x86.  The specific code sequence is tailored to
the parameters and return value of the intrinsic call.
Added the ability for implicit defintions to be printed in the Instruction
Printer.
Added the ability for RawFrm instruction to print implict uses and
defintions with correct comma output.  This required adjustment to some
methods so that a leading comma would or would not be printed.

llvm-svn: 12782
2004-04-08 20:31:47 +00:00
Chris Lattner 3c8561442c Wrap at 80 cols
llvm-svn: 12587
2004-04-01 04:03:27 +00:00
Chris Lattner 9fe1646804 Add FP conditional move instructions, which annoyingly have special properties
that require the asmwriter to be extended (printing implicit uses before the
explicit operands)

llvm-svn: 12574
2004-03-31 22:02:13 +00:00
Chris Lattner ca89812db7 These two virtual methods are never called.
llvm-svn: 11984
2004-02-29 05:59:33 +00:00
Alkis Evlogimenos 194939086d Each instruction now has both an ImmType and a MemType. This describes
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).

llvm-svn: 11967
2004-02-28 22:02:05 +00:00
Alkis Evlogimenos 58270fcf1f Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}.
llvm-svn: 11921
2004-02-27 18:55:12 +00:00
Chris Lattner 8dc99feeaf Add support for the rep movs[bwd] instructions, and emit them when code
generating the llvm.memcpy intrinsic.

llvm-svn: 11351
2004-02-12 17:53:22 +00:00
Chris Lattner 201c487ad2 Add a new flag, which is only used for symmetry.
llvm-svn: 11025
2004-01-30 22:24:18 +00:00
Alkis Evlogimenos 52564b2071 Add TargetInstrInfo::isMoveInstr() to support coalescing in register
allocation.

llvm-svn: 10633
2003-12-28 17:35:08 +00:00
Chris Lattner 833c3c2597 Rip JIT specific stuff out of TargetMachine, as per PR176
llvm-svn: 10542
2003-12-20 01:22:19 +00:00
Brian Gaeke 960707c335 Put all LLVM code into the llvm namespace, as per bug 109.
llvm-svn: 9903
2003-11-11 22:41:34 +00:00
John Criswell 29265fe981 Added LLVM copyright header.
llvm-svn: 9321
2003-10-21 15:17:13 +00:00
Chris Lattner fb2054c40b Completely eliminate the isVoid TSFlag, shifting over all other fields
llvm-svn: 7636
2003-08-06 15:32:20 +00:00
Chris Lattner df14300577 Lump the base opcode in with the X86 TargetSpecific flags
llvm-svn: 7540
2003-08-03 21:56:22 +00:00
Brian Gaeke c1e4ee0f50 Nice tasty llc fixes. These should fix LLC for x86 for everything in
SingleSource except oopack and Oscar.  (Sorry, Oscar.)

include/llvm/Target/TargetInstrInfo.h: Remove virtual print method. Add
 accessors for ImplicitUses/Defs.
lib/Target/TargetInstrInfo.cpp: Remove virtual print method. If you
 really wanted this, just use MI->print(O, TM); instead...
lib/Target/X86:
FloatingPoint.cpp: ...like this.
X86InstrInfo.h: Remove virtual print method. Define the PrintImplUses
 target-specific flag bit.
X86InstrInfo.def: Add the PrintImplUses flag to all the instructions
 which implicitly use CL, because the assembler needs to see the CL in
 order to generate the right instruction.
Printer.cpp: Ditch fnIndex at Chris's request. Now we use CurrentFnName
  to name constants in the constant pool for each function instead. This
  avoids keeping state between runOnMachineFunction() invocations, which
  is a no-no. Having MangledGlobals be global is a bogon I'd like to get
  rid of too, but making it a static member of Printer causes link errors
  (why???).
 Make NumberForBB into a member of Printer instead of a global, too.
 Make printOp and printMemReference into methods of Printer.
 X86InstrInfo::print is now Printer::printMachineInstruction, because
  TargetInstrInfo::print is history. (Because of this, we have to qualify
  the names of some TargetInstrInfo methods we call.)
 Print out the ImplicitUses field of any instruction we print that has
  the PrintImplUses bit set.

llvm-svn: 6924
2003-06-27 00:00:48 +00:00
Misha Brukman e2402c65d0 Reword to remove reference to how things worked in the past.
llvm-svn: 6323
2003-05-24 01:08:43 +00:00