c22f6518b2
Use REs to remove dependencies on the register allocation order.
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llvm-svn: 144209
2011-11-09 20:06:13 +00:00
635e4efca0
Speculatively revert commit 144124 (djg) in the hope that the 32 bit
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dragonegg self-host buildbot will recover (it is complaining about object
files differing between different build stages). Original commit message:
Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
llvm-svn: 144188
2011-11-09 14:20:48 +00:00
79135d844d
Add AVX2 support for vselect of v32i8
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llvm-svn: 144187
2011-11-09 13:21:28 +00:00
f87a2bef51
Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions.
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llvm-svn: 144179
2011-11-09 09:37:21 +00:00
c9eb09d3b8
Add instruction selection for AVX2 integer comparisons.
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llvm-svn: 144176
2011-11-09 08:06:13 +00:00
8c8a431057
Add AVX2 instruction lowering for add, sub, and mul.
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llvm-svn: 144174
2011-11-09 07:28:55 +00:00
0485d51a76
Don't forget to check FlagNW when determining whether an AddRecExpr will wrap
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or not. Patch by Brendon Cahoon!
llvm-svn: 144173
2011-11-09 07:11:37 +00:00
595d419427
Add support for encoding immediates in icmp and fcmp. Hopefully, this will
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remove a fair number of unnecessary materialized constants.
rdar://10412592
llvm-svn: 144163
2011-11-09 03:22:02 +00:00
3dc89c9768
Collapse DomainValues across loop back-edges.
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During the initial RPO traversal of the basic blocks, remember the ones
that are incomplete because of back-edges from predecessors that haven't
been visited yet.
After the initial RPO, revisit all those loop headers so the incoming
DomainValues on the back-edges can be properly collapsed.
This will properly fix execution domains on software pipelined code,
like the included test case.
llvm-svn: 144151
2011-11-09 01:06:56 +00:00
a4bc6171a5
Add a hack to the scheduler to disable pseudo-two-address dependencies in
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basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
llvm-svn: 144124
2011-11-08 21:29:06 +00:00
c3770ac687
Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with ldm or ldr pairs.
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llvm-svn: 144123
2011-11-08 21:21:09 +00:00
0bae8b2cfb
Fix code to match comment. Fixes PR11340, a regression from r143209.
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llvm-svn: 144121
2011-11-08 21:08:02 +00:00
9ee220915b
LICM pass now understands invariant load metadata. Nothing generates this yet so it will currently never get used in real tests
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llvm-svn: 144107
2011-11-08 19:30:00 +00:00
fbbbd04705
Adding test for machine-licm operating on invariant load instructions
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llvm-svn: 144104
2011-11-08 19:06:53 +00:00
b85fcd07df
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
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Add support for trimming constants to GetDemandedBits. This fixes some funky
constant generation that occurs when stores are expanded for targets that don't
support unaligned stores natively.
llvm-svn: 144102
2011-11-08 18:56:23 +00:00
d8d583f766
test/CodeGen/X86/vec_shuffle-39.ll: Add explicit -mtriple=x86_64-linux. Passing packed value is not compatible on Win32 x64.
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llvm-svn: 144068
2011-11-08 03:46:39 +00:00
ac9ef21f02
test/CodeGen/X86/vec_shuffle-38.ll: Relax expression for Win32 x64.
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llvm-svn: 144067
2011-11-08 03:46:32 +00:00
33dac06330
test/CodeGen/X86/vec_shuffle.ll: Add explicit -mtriple=i686-linux. We may see some suboptimal frame (%ebp) emission on certain hosts. Possible [PR11031]
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llvm-svn: 144066
2011-11-08 03:46:25 +00:00
6f84fed675
Make sure to mark vector extload's as expand on ARM. Fixes PR11319.
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llvm-svn: 144057
2011-11-08 01:43:53 +00:00
f2a9bd4b1e
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
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Re-commit of r144034, with an extra fix so that RemoveDeadNode doesn't blow up.
llvm-svn: 144055
2011-11-08 01:25:24 +00:00
91b56e0390
Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222
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llvm-svn: 144052
2011-11-08 00:31:58 +00:00
2a917595d2
Convert to the new EH model.
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llvm-svn: 144050
2011-11-08 00:23:01 +00:00
2197b015c8
Convert to the new EH model.
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llvm-svn: 144049
2011-11-08 00:17:28 +00:00
9b7942a543
Convert tests to the new EH model.
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llvm-svn: 144048
2011-11-08 00:09:27 +00:00
5de1bea5c9
Enable support for returning i1, i8, and i16. Nothing special todo as it's the
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callee's responsibility to sign or zero-extend the return value. The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).
llvm-svn: 144047
2011-11-08 00:03:32 +00:00
2dc40434aa
Added missing newline
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llvm-svn: 144046
2011-11-08 00:03:24 +00:00
a35a5295e0
Revert r144034 while I try to track down a crash.
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llvm-svn: 144044
2011-11-07 23:53:20 +00:00
9279f9efbc
Fix test for Windows as well.
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llvm-svn: 144038
2011-11-07 23:10:43 +00:00
a70e9417fb
Kill and collapse outstanding DomainValues.
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DomainValues that are only used by "don't care" instructions are now
collapsed to the first possible execution domain after all basic blocks
have been processed. This typically means the PS domain on x86.
For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are
completely collapsed to the PS domain instead of containing a mix of
execution domains created by isel.
llvm-svn: 144037
2011-11-07 23:08:21 +00:00
7a4be01ac8
InstCombine now optimizes vector udiv by power of 2 to shifts
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Fixes r8429
llvm-svn: 144036
2011-11-07 23:04:49 +00:00
55a86d32d3
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
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llvm-svn: 144034
2011-11-07 22:51:10 +00:00
69d57cf9c4
Simplify some uses of utohexstr.
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As a side effect hex is printed lowercase instead of uppercase now.
llvm-svn: 144013
2011-11-07 21:00:59 +00:00
7f076cb6cc
Fix test for Linux.
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llvm-svn: 144003
2011-11-07 20:47:23 +00:00
0241308954
Expand V_SET0 to xorps by default.
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The xorps instruction is smaller than pxor, so prefer that encoding.
The ExecutionDepsFix pass will switch the encoding to pxor and xorpd
when appropriate.
llvm-svn: 143996
2011-11-07 19:15:58 +00:00
a6d409d543
Add AVX2 variable shift instructions and intrinsics.
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llvm-svn: 143915
2011-11-07 08:26:24 +00:00
ff39be0afc
Add AVX2 VPMOVMASK instructions and intrinsics.
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llvm-svn: 143904
2011-11-07 03:20:35 +00:00
e122dcbf4a
Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects.
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llvm-svn: 143902
2011-11-07 02:00:04 +00:00
f01f1b5cb9
More AVX2 instructions and their intrinsics.
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llvm-svn: 143895
2011-11-06 23:04:08 +00:00
05d1cb98e7
Add more AVX2 instructions and intrinsics.
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llvm-svn: 143861
2011-11-06 06:12:20 +00:00
d0191a53c9
Add support for passing i1, i8, and i16 call parameters. Also, be sure to
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zero-extend the constant integer encoding. Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.
llvm-svn: 143821
2011-11-05 20:16:15 +00:00
807cf22b55
Update lit's list of tools.
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llvm-svn: 143815
2011-11-05 16:20:52 +00:00
c74798d5cf
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
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As a side effect we now print dwarf ulebs with .ascii directives.
llvm-svn: 143809
2011-11-05 11:52:44 +00:00
f2905afe62
Do simple cross-block DSE when we encounter a free statement. Fixes PR11240.
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llvm-svn: 143808
2011-11-05 10:48:42 +00:00
8f249600e7
Enhanced vzeroupper insertion pass that avoids inserting vzeroupper where it is unnecessary through local analysis. Patch from Bruno Cardoso Lopes, with some additional changes.
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I'm going to wait for any review comments and perform some additional testing before turning this on by default.
llvm-svn: 143750
2011-11-04 23:46:11 +00:00
21079cad11
build/cmake: Change to require Python be available.
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llvm-svn: 143742
2011-11-04 23:04:05 +00:00
c2a8401ad2
Add triple to test.
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llvm-svn: 143735
2011-11-04 20:20:34 +00:00
6cf4e830ce
Emit declarations before definitions if they are available. This causes DW_AT_specification to
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point back in the file in the included testcase. Fixes PR11300.
llvm-svn: 143726
2011-11-04 19:00:29 +00:00
ce3d6248b2
Add tests for existing InstSimplify features.
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llvm-svn: 143721
2011-11-04 18:39:16 +00:00
85977e6ab4
Teach instsimplify to simplify calls to undef.
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llvm-svn: 143719
2011-11-04 18:32:42 +00:00
b9a46e6b83
Add intrinsics for X86 vcvtps2ph and vcvtph2ps instructions
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llvm-svn: 143682
2011-11-04 06:59:21 +00:00
f3e73ad5da
Add fast-isel support for returning i1, i8, and i16.
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llvm-svn: 143669
2011-11-04 00:50:21 +00:00
e6d40de414
Speculatively revert "DeadStoreElimination can now trim the size of a store if
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the end of it is dead.", which appears to break bootstrapping LLVM.
llvm-svn: 143668
2011-11-04 00:48:26 +00:00
198b7ffc11
Reapply r143206, with fixes. Disallow physical register lifetimes
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across calls, and only check for nested dependences on the special
call-sequence-resource register.
llvm-svn: 143660
2011-11-03 21:49:52 +00:00
65ba66c660
Reverted r143600 - selector reference change
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llvm-svn: 143646
2011-11-03 20:47:50 +00:00
b68515c232
fixed global array handling for ptx to use the correct bit widths
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llvm-svn: 143640
2011-11-03 19:24:46 +00:00
8a95aedb5d
DeadStoreElimination can now trim the size of a store if the end of it is dead.
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Only currently done if the later store is writing to a power of 2 address or
has the same alignment as the earlier store as then its likely to not break up
large stores into smaller ones
Fixes <rdar://problem/10140300>
llvm-svn: 143630
2011-11-03 18:01:56 +00:00
0e7cbbabea
Add new X86 AVX2 VBROADCAST instructions.
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llvm-svn: 143612
2011-11-03 07:35:53 +00:00
bf5f4bec1a
Add support for sign-extending non-legal types in SelectSIToFP().
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llvm-svn: 143603
2011-11-03 02:04:59 +00:00
e6173d81ae
Treat objc selector reference globals as invariant so that MachineLICM can hoist them out of loops. Fixes <rdar://problem/6027699>
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llvm-svn: 143600
2011-11-03 00:56:36 +00:00
9929c423a1
Try to lower memset/memcpy/memmove to vector instructions on ARM where the alignment permits.
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llvm-svn: 143582
2011-11-02 22:52:45 +00:00
000307fef9
I added the first test to run llvm-dwarfdump.
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llvm-svn: 143571
2011-11-02 21:02:27 +00:00
d1ee7f8cf1
Don't emit a directory entry for the value in DW_AT_comp_dir, that is always
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implied by directory index zero.
llvm-svn: 143570
2011-11-02 20:55:33 +00:00
9cf803c4bf
Add support for comparing integer non-legal types.
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llvm-svn: 143559
2011-11-02 18:08:25 +00:00
fbb704f551
Fix the issue that r143552 was trying to address the _right_ way. One-register lists are legal on LDM/STM instructions, but we should not print the PUSH/POP aliases when they appear. This fixes round tripping on this instruction.
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llvm-svn: 143557
2011-11-02 18:03:14 +00:00
5aba1b4ea3
tests: Clean up tests/CMakeLists.txt to drop some variable configuration we no
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longer need substitutions for.
llvm-svn: 143555
2011-11-02 17:54:51 +00:00
c2c79c90f2
Rewrite LinearFunctionTestReplace to handle pointer-type IVs.
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We've been hitting asserts in this code due to the many supported
combintions of modes (iv-rewrite/no-iv-rewrite) and IV types. This
second rewrite of the code attempts to deal with these cases systematically.
llvm-svn: 143546
2011-11-02 17:19:57 +00:00
a47b05c7f3
More AVX2 instructions and intrinsics.
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llvm-svn: 143536
2011-11-02 06:54:17 +00:00
682b850602
Add a bunch more X86 AVX2 instructions and their corresponding intrinsics.
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llvm-svn: 143529
2011-11-02 04:42:13 +00:00
0dae890346
Broaden an assert to handle enable-iv-rewrite=true following r143183.
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Narrowest possible fix for PR11279.
llvm-svn: 143522
2011-11-02 00:02:45 +00:00
82ed3be1fb
Fixed a bug in the code to create a dwarf file and directory table entires when
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it is separating the directory part from the basename of the FileName. Noticed
that this:
.file 1 "dir/foo"
when assembled got the two parts switched. Using the Mac OS X dwarfdump tool
it can be seen easily:
% dwarfdump -a a.out
include_directories[ 1] = 'foo'
Dir Mod Time File Len File Name
---- ---------- ---------- ---------------------------
file_names[ 1] 1 0x00000000 0x00000000 dir
...
Which should be:
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include_directories[ 1] = 'dir'
Dir Mod Time File Len File Name
---- ---------- ---------- ---------------------------
file_names[ 1] 1 0x00000000 0x00000000 foo
llvm-svn: 143521
2011-11-01 23:39:05 +00:00
69e54a740c
Fix disassembly of some VST1 instructions.
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llvm-svn: 143507
2011-11-01 22:18:13 +00:00
3f5eccbe7a
Teach the x86 backend a couple tricks for dealing with v16i8 sra by a constant splat value. Fixes PR11289.
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llvm-svn: 143498
2011-11-01 21:18:39 +00:00
56ce0932db
Don't fold negative offsets into cp / dp accesses to avoid relocation errors.
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This can happen if the address + addend is less than the start of the cp / dp.
llvm-svn: 143459
2011-11-01 11:31:53 +00:00
37fe7d6641
Combine various XCore tests for floating point intrinsic support into a single test.
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llvm-svn: 143458
2011-11-01 10:51:48 +00:00
8591b6b0ab
Move various XCore tests to FileCheck
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llvm-svn: 143457
2011-11-01 10:41:28 +00:00
fec80c6ad2
Fix operand type for x86 pmadd_ub_sw intrinsic.
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llvm-svn: 143455
2011-11-01 07:25:22 +00:00
a49b828f8f
Make sure we use the right insertion point when instcombine replaces a PHI with another instruction. (Specifically, don't insert an arbitrary instruction before a PHI.) Fixes PR11275.
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llvm-svn: 143437
2011-11-01 04:49:29 +00:00
0eb88775ef
Move x86-specific tests into X86 folder.
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llvm-svn: 143424
2011-11-01 03:21:48 +00:00
6185a2aa7c
Move another test requiring x86 into X86 directory.
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llvm-svn: 143421
2011-11-01 03:12:47 +00:00
2cd281ea67
Move test requiring x86 backend into X86 directory.
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llvm-svn: 143420
2011-11-01 03:11:41 +00:00
1c1a2b8123
Change the actual tests to match the input directory rename (duh)
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llvm-svn: 143404
2011-10-31 23:56:52 +00:00
da5e57cba1
Rename "TestObjectFiles" to "Inputs" (like the pattern for Clang tests)
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llvm-svn: 143400
2011-10-31 23:46:38 +00:00
300dcb8e37
Move test to the X86 directory, note the PR number and only run MC once.
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llvm-svn: 143352
2011-10-31 17:23:09 +00:00
40703f4252
More not-crashing NEON disassembly updates for the vld refactoring.
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llvm-svn: 143351
2011-10-31 17:17:32 +00:00
9821e75e64
Fix operand type for int_x86_ssse3_phadd_sw_128 intrinsic
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llvm-svn: 143336
2011-10-31 07:16:37 +00:00
242d1f8c73
Test case for X86 FS/GS Base intrinsics
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llvm-svn: 143332
2011-10-31 02:15:47 +00:00
cfcfdf2aab
Begin adding AVX2 instructions. No selection support yet other than intrinsics.
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llvm-svn: 143331
2011-10-31 02:15:10 +00:00
aab6169ef6
Switch new .file directive emission off by default, change llc's flag for it to
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-enable-dwarf-directory.
llvm-svn: 143326
2011-10-31 01:06:02 +00:00
3d5692a475
Reapply commit 143214 with a fix: m_ICmp doesn't match conditions
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with the given predicate, it matches any condition and returns the
predicate - d'oh! Original commit message:
The expression icmp eq (select (icmp eq x, 0), 1, x), 0 folds to false.
Spotted by my super-optimizer in 186.crafty and 450.soplex. We really
need a proper infrastructure for handling generalizations of this kind
of thing (which occur a lot), however this case is so simple that I decided
to go ahead and implement it directly.
llvm-svn: 143318
2011-10-30 19:56:36 +00:00
7402ee6ec2
X86: Emit logical shift by constant splat of <16 x i8> as a <8 x i16> shift and zero out the bits where zeros should've been shifted in.
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llvm-svn: 143315
2011-10-30 17:31:21 +00:00
9cdb9ffa43
Fix return type for X86 mpsadbw instrinsic. The instruction takes in a vector of 8-bit integers, but produces a vector of 16-bit integers.
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llvm-svn: 143313
2011-10-30 17:22:45 +00:00
c602b2c4de
Fix pr11266.
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On x86: (shl V, 1) -> add V,V
Hardware support for vector-shift is sparse and in many cases we scalarize the
result. Additionally, on sandybridge padd is faster than shl.
llvm-svn: 143311
2011-10-30 13:24:22 +00:00
1dda6a8ce1
Stabilize the test by specifying an exact cpu target
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llvm-svn: 143307
2011-10-30 08:07:50 +00:00
bf6568b5d6
Add a new DAGCombine optimization for BUILD_VECTOR.
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If all of the inputs are zero/any_extended, create a new simple BV
which can be further optimized by other BV optimizations.
llvm-svn: 143297
2011-10-29 21:23:04 +00:00
932de2bc86
Force SSE for this test.
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llvm-svn: 143291
2011-10-29 19:43:44 +00:00
594ee77964
SimplifyLibCalls: Use IRBuilder.CreateGlobalString when creating a string for printf->puts, which correctly sets the unnamed_addr bit on the resulting GlobalVariable.
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Fixes PR11264.
llvm-svn: 143289
2011-10-29 19:43:31 +00:00
3af3c046a9
Revert r143214; it's breaking a bunch of stuff.
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llvm-svn: 143265
2011-10-29 00:56:07 +00:00
9b9c970148
Revert r143206, as there are still some failing tests.
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llvm-svn: 143262
2011-10-29 00:41:52 +00:00
6e315dd8ba
test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUIRES: asserts" for now.
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llvm-svn: 143247
2011-10-28 23:11:03 +00:00
b009a872d7
Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm".
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When '~imm' is encodable as a t2_so_imm but plain 'imm' is not. For example,
mov r2, #-3
becomes
mvn r2, #2
rdar://10349224
llvm-svn: 143235
2011-10-28 22:36:30 +00:00
Chad Rosier