Commit Graph

82039 Commits

Author SHA1 Message Date
Adam Nemet 155e8741f3 [LAA] Remove unused pointer partition argument from getNumberOfChecks, NFC
This is unused after filtering checks was moved to the clients.

As a result, we can just return the number of the checks in the
precomputed set.

llvm-svn: 244369
2015-08-07 22:44:21 +00:00
Adam Nemet 15840393f3 [LAA] Make the set of runtime checks part of the state of LAA, NFC
This is the full set of checks that clients can further filter. IOW,
it's client-agnostic.  This makes LAA complete in the sense that it now
provides the two main results of its analysis precomputed:

1. memory dependences via getDepChecker().getInsterestingDependences()
2. run-time checks via getRuntimePointerCheck().getChecks()

However, as a consequence we now compute this information pro-actively.
Thus if the client decides to skip the loop based on the dependences
we've computed the checks unnecessarily.  In order to see whether this
was a significant overhead I checked compile time on SPEC2k6 LTO bitcode
files.  The change was in the noise.

The checks are generated in canCheckPtrAtRT, at the same place where we
used to call groupChecks to merge checks.

llvm-svn: 244368
2015-08-07 22:44:15 +00:00
Quentin Colombet 7d8c74ff3f [AArch64][LoadStoreOptimizer] Turn a test into an assert. NFC.
At this point the given Opc must be valid, otherwise we should
not look for a matching pair to form paired load or store.

Thanks to Chad to point out this piece of code!

llvm-svn: 244366
2015-08-07 22:40:51 +00:00
Tom Stellard 8ebad11ee9 AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions
Summary:
With InstAlias, we don't need to print the _e32 portion of the mnemonic
when we print the $dst operand.  This change makes it possible to
include vcc in the asm string when we switch VOPC over to having
implicit vcc defs.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11813

llvm-svn: 244362
2015-08-07 22:00:56 +00:00
Alex Lorenz 61420f790d MIR Serialization: Serialize the base alignment for the machine memory operands.
llvm-svn: 244357
2015-08-07 20:48:30 +00:00
Alex Lorenz 83127739ff MIR Serialization: Serialize the offsets for the machine memory operands.
llvm-svn: 244356
2015-08-07 20:26:52 +00:00
Alex Lorenz dc24c1713e MIR Parser: Extract the parsing of the operand's offset into a new method. NFC.
This commit extract the code that parses the 64-bit offset from the method
'parseOperandsOffset' to a new method 'parseOffset' so that we can reuse it
when parsing the offset for the machine memory operands.

llvm-svn: 244355
2015-08-07 20:21:00 +00:00
Matt Arsenault 711b390a7c AMDGPU: Assume SMRD access for constant address space
Since r243294 these are selected to SMRD and
moved later if required.

llvm-svn: 244354
2015-08-07 20:18:34 +00:00
Craig Topper a3db7d26ab Add Intel family 6 model 90 as Silvermont. Fixes PR24392.
llvm-svn: 244352
2015-08-07 20:09:42 +00:00
Adam Nemet 3a91e94734 [LAA] Remove unused pointer partition argument from print(), NFC
This is now handled in the client.  No need for LAA to provide this
variant.

llvm-svn: 244349
2015-08-07 19:44:48 +00:00
Chen Li eafbc9dc47 [ConstantFoldTerminator] Preserve make.implicit metadata when converting SwitchInst to BranchInst
Summary: llvm::ConstantFoldTerminator function can convert SwitchInst with single case (and default) to a conditional BranchInst. This patch adds support to preserve make.implicit metadata on this conversion.

Reviewers: sanjoy, weimingz, chenli

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D11841

llvm-svn: 244348
2015-08-07 19:30:12 +00:00
Simon Pilgrim 3815c16bf8 [InstCombine] Fix SSE2/AVX2 vector logical shift by constant
This patch fixes the sse2/avx2 vector shift by constant instcombine call to correctly deal with the fact that the shift amount is formed from the entire lower 64-bit and not just the lowest element as it currently assumes.

e.g.

%1 = tail call <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32> %v, <4 x i32> <i32 15, i32 15, i32 15, i32 15>)

In this case, (V)PSRLD doesn't perform a lshr by 15 but in fact attempts to shift by 64424509455 ((15 << 32) | 15) - giving a zero result.

In addition, this review also recognizes shift-by-zero from a ConstantAggregateZero type (PR23821).

Differential Revision: http://reviews.llvm.org/D11760

llvm-svn: 244341
2015-08-07 18:22:50 +00:00
Nico Weber af3f242016 Add functions to save and restore the PrettyStackTrace state.
PrettyStackTraceHead is a LLVM_THREAD_LOCAL, which means it's just a global
in LLVM_ENABLE_THREADS=NO builds.  If a CrashRecoveryContext is used with
code that uses PrettyStackEntries, and a crash happens, PrettyStackTraceHead is
currently not reset to its pre-crash value.  These functions make it possible
to add a cleanup to such code that does this.

(Not reseting the value then causes the assert in ~PrettyStackTraceEntry() to
fire if the code outside of the CrashRecoveryContext also uses
PrettyStackEntries -- for example, clang when building a module.)

Part of PR11974.

llvm-svn: 244338
2015-08-07 17:47:03 +00:00
Nico Weber 2692811d00 Add a comment.
llvm-svn: 244337
2015-08-07 17:32:06 +00:00
Chad Rosier 9659de379d [ARM] Remove an unused reference to MachineRegisterInfo. NFC.
llvm-svn: 244334
2015-08-07 17:02:29 +00:00
Tom Stellard c8733e805e AMDGPU/SI: Use correct encoding of vopc for VI in the assembler
Summary: We were using the SI encoding for VI.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11812

llvm-svn: 244332
2015-08-07 16:45:33 +00:00
Tom Stellard 85656cabfb AMDGPU/SI: v_mac_legacy_f32 does not exist on VI
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11810

llvm-svn: 244322
2015-08-07 15:34:30 +00:00
Tom Stellard 11f19f78f0 AMDGPU/SI: Remove unused outs parameter from VOPC TableGen classes
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11809

llvm-svn: 244321
2015-08-07 15:34:27 +00:00
Rafael Espindola e01f43bcc1 Add dynamic_table iterators back to ELF.h.
In tree they are only used by llvm-readobj, but it is also used by
https://github.com/mono/CppSharp.

While at it, add some missing error checking.

llvm-svn: 244320
2015-08-07 15:25:20 +00:00
Frederic Riss a5ab8443c1 [MC/Dwarf] Allow to specify custom parameters for linetable emission.
NFC patch for current users, but llvm-dsymutil will use the new
functionality to adapt to the input linetable.

Based on a patch by Adrian Prantl.

llvm-svn: 244318
2015-08-07 15:14:08 +00:00
Silviu Baranga a07090f7fa Fix unused variable warning introduced in r244314
llvm-svn: 244315
2015-08-07 12:05:46 +00:00
Silviu Baranga 3e8e51c1a9 [ARM] Update ReconstructShuffle to handle mismatched types
Summary:
Port the ReconstructShuffle function from AArch64 to ARM
to handle mismatched incoming types in the BUILD_VECTOR
node.

This fixes an outstanding FIXME in the ReconstructShuffle
code.

Reviewers: t.p.northover, rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D11720

llvm-svn: 244314
2015-08-07 11:40:46 +00:00
John Brawn 64e5a66794 Revert "Make global aliases have symbol size equal to their type"
This reverts r242520, as it caused pr24379. Also removes part of the test added
by r243874 that checks the size of alias symbols.

llvm-svn: 244313
2015-08-07 10:56:21 +00:00
NAKAMURA Takumi 8dbe161502 ShrinkWrap.cpp: Tweak r244235 for a non-functional member, PredicateFtor. [-Wdocumentation]
llvm-svn: 244309
2015-08-07 07:40:23 +00:00
JF Bastien 315cc06840 WebAssembly: textual emission uses expected opcode names
Summary: WebAssembly's tablegen instructions have the names WebAssembly expects, but by LLVM convention they're uppercase and suffixed with their type after an underscore. Leave the C++ code that way, but print outt he names WebAssembly expects (lowercase, no type). We could teach tablegen to do this later, maybe by using `!cast<string>(node)` in the .td files.

Reviewers: sunfish

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D11776

llvm-svn: 244305
2015-08-07 01:57:03 +00:00
Duncan P. N. Exon Smith 8c9dcace0d ValueMapper: Resolve uniquing cycles more aggressively
As a follow-up to r244181, resolve uniquing cycles underneath distinct
nodes on the fly.  This prevents uniquing cycles in early operands from
affecting later operands.  It also removes an iteration through distinct
nodes' operands.

No real functional change here, just more prompt resolution of temporary
nodes.

llvm-svn: 244302
2015-08-07 00:44:55 +00:00
Duncan P. N. Exon Smith c9fdbdb78d ValueMapper: Pull out helper to resolve cycles, NFC
Pull out a helper for resolving uniquing cycles of `Metadata` to remove
the boiler-plate of downcasting to `MDNode`.

llvm-svn: 244301
2015-08-07 00:39:26 +00:00
Alex Lorenz cba8c5fe31 MIR Serialization: Fix serialization of unnamed IR block references.
The block address machine operands can reference IR blocks in other functions.
This commit fixes a bug where the references to unnamed IR blocks in other
functions weren't serialized correctly.

llvm-svn: 244299
2015-08-06 23:57:04 +00:00
Alex Lorenz 3fb77686c1 MIR Parser: Simplify the token's string value handling.
This commit removes the 'StringOffset' and 'HasStringValue' fields from the
MIToken struct and simplifies the 'stringValue' method which now returns
the new 'StringValue' field.

This commit also adopts a different way of initializing the lexed tokens -
instead of constructing a new MIToken instance, the lexer resets the old token
using the new 'reset' method and sets its attributes using the new
'setStringValue', 'setOwnedStringValue', and 'setIntegerValue' methods.

Reviewers: Sean Silva

Differential Revision: http://reviews.llvm.org/D11792

llvm-svn: 244295
2015-08-06 23:17:42 +00:00
Juergen Ributzka f09c7a3d0f [AArch64][FastISel] Always use AND before checking the branch flag.
When we are not emitting the condition for the branch, because the condition is
in another BB or SDAG did the selection for us, then we have to mask the flag in
the register with AND.

This is required when the condition comes from a truncate, because SDAG only
truncates down to a legal size of i32.

This fixes rdar://problem/22161062.

llvm-svn: 244291
2015-08-06 22:44:15 +00:00
Juergen Ributzka 9f54dbe7a1 Revert "[AArch64][FastISel] Add more truncation tests." and "[AArch64][FastISel] Always use an AND instruction when truncating to non-legal types."
This reverts commit r243198 and 243304.

Turns out this wasn't the correct fix for this problem. It works only within
FastISel, but fails when the truncate is selected by SDAG.

llvm-svn: 244287
2015-08-06 22:13:48 +00:00
David Majnemer 09e1fdb3f4 Revert accidentally committed WinEHPrepare changes
This reverts commit r244272, r244273, r244274, and r244275.

llvm-svn: 244278
2015-08-06 21:13:51 +00:00
David Majnemer 2a2b242f4b [IR] Remove TerminateInst's "NameStr" argument
TerminateInst can't have a name because it doesn't produce a result.  No
functionality change is intended, this is just a cleanup.

llvm-svn: 244276
2015-08-06 21:08:36 +00:00
David Majnemer a102e6a0e3 PHIs don't need to be postprocessed
llvm-svn: 244275
2015-08-06 21:08:34 +00:00
David Majnemer ac6b298850 Handle PHI nodes prefacing EH pads too
llvm-svn: 244274
2015-08-06 21:08:32 +00:00
David Majnemer fb7a737a72 handle phi nodes
llvm-svn: 244273
2015-08-06 21:08:30 +00:00
David Majnemer e4abcef986 [WinEHPrepare] Add rudimentary support for the new EH instructions
Summary:
This adds somewhat basic preparation functionality including:
- Formation of funclets via coloring basic blocks.
- Cloning of polychromatic blocks to ensure that funclets have unique
  program counters.
- Demotion of values used between different funclets.
- Some amount of cleanup once we have removed predecessors from basic
  blocks.
- Verification that we are left with a CFG that makes some amount of
  sense.

N.B. Arguments and numbering still need to be done.

Reviewers: rnk, JosephTremoulet

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11750

llvm-svn: 244272
2015-08-06 21:07:55 +00:00
Frederic Riss 6b9396c070 Thread premissions through sys::fs::create_director{y|ies}
llvm-svn: 244268
2015-08-06 21:04:55 +00:00
Sanjoy Das 366acc175e [IndVars] Fix PR24356.
Unsigned predicates increase or decrease agnostic of the signs of their
increments.

llvm-svn: 244265
2015-08-06 20:43:41 +00:00
Sanjoy Das c18115db9c [IndVars] Improved logging under DEBUG(); NFC.
Before this, we'd print the modified comparision in the "Simplified
comparison" case.  That looked misleading.

llvm-svn: 244264
2015-08-06 20:43:28 +00:00
Pete Cooper ebcd748927 Convert a bunch of loops to foreach. NFC.
After r244074, we now have a successors() method to iterate over
all the successors of a TerminatorInst.  This commit changes a bunch
of eligible loops to use it.

llvm-svn: 244260
2015-08-06 20:22:46 +00:00
Tom Stellard d488605ed3 AMDGPU/SI: Add Fiji support
Patch by: Alex Deucher

llvm-svn: 244255
2015-08-06 19:43:02 +00:00
Tom Stellard 217361c33f AMDGPU/SI: Add support for 32-bit immediate SMRD offsets on CI
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11604

llvm-svn: 244254
2015-08-06 19:28:38 +00:00
Tom Stellard dee26a2876 AMDGPU/SI: Use ComplexPatterns for SMRD addressing modes
Summary: This allows us to consolidate several of the TableGen patterns.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11602

llvm-svn: 244253
2015-08-06 19:28:30 +00:00
Nico Weber 28dc4171e9 Fix nested CrashRecoveryContexts with LLVM_ENABLE_THREADS=OFF, allow them.
libclang uses a CrashRecoveryContext, and building a module does too. If a
module gets built through libclang, nested CrashRecoveryContexts are used.  They
work fine with threads as things are stored in ThreadLocal variables, but in
LLVM_ENABLE_THREADS=OFF builds the two recovery contexts would write to the
same globals.

To fix, keep active CrashRecoveryContextImpls in a list and have the global
point to the innermost one, and do something similar for
tlIsRecoveringFromCrash.

Necessary (but not sufficient) for PR11974 and PR20325

http://reviews.llvm.org/D11770

llvm-svn: 244251
2015-08-06 19:21:25 +00:00
Kostya Serebryany 242ca930e8 [libFuzzer] move the mutators to public interface so that custom mutators may reuse these functions directly
llvm-svn: 244250
2015-08-06 19:19:55 +00:00
Nico Rieck 78199518c4 Rename inst_range() to instructions() for consistency. NFC
llvm-svn: 244248
2015-08-06 19:10:45 +00:00
Kit Barton a7bf96ab5c Fix possible infinite loop in shrink wrapping when searching for save/restore
points.

There is an infinite loop that can occur in Shrink Wrapping while searching 
for the Save/Restore points. 

Part of this search checks whether the save/restore points are located in
different loop nests and if so, uses the (post) dominator trees to find the
immediate (post) dominator blocks. However, if the current block does not have
any immediate (post) dominators then this search will result in an infinite
loop. This can occur in code containing an infinite loop.

The modification checks whether the immediate (post) dominator is different from
the current save/restore block. If it is not, then the search terminates and the
current location is not considered as a valid save/restore point for shrink wrapping.

Phabricator: http://reviews.llvm.org/D11607
llvm-svn: 244247
2015-08-06 19:01:57 +00:00
Peter Collingbourne 327ce8fc11 LibDriver: Replace references to lld-link2 with lld-link.
llvm-svn: 244246
2015-08-06 19:00:42 +00:00
Quentin Colombet 6443cce233 [Reassociation] Fix miscompile for va_arg arguments.
iisUnmovableInstruction() had a list of instructions hardcoded which are
considered unmovable. The list lacked (at least) an entry for the va_arg
and cmpxchg instructions.
Fix this by introducing a new Instruction::mayBeMemoryDependent()
instead of maintaining another instruction list.

Patch by Matthias Braun <matze@braunis.de>.

Differential Revision: http://reviews.llvm.org/D11577

rdar://problem/22118647

llvm-svn: 244244
2015-08-06 18:44:34 +00:00
Alex Lorenz e86d51533d MIR Parser: Report an error when parsing duplicate memory operand flags.
llvm-svn: 244240
2015-08-06 18:26:36 +00:00
Cong Hou ec10587205 Revert r244154 which causes some build failure. See https://llvm.org/bugs/show_bug.cgi?id=24377.
llvm-svn: 244239
2015-08-06 18:17:29 +00:00
Kit Barton 45c20b474e This patch changes the interface to enable the shrink wrapping optimization.
It adds a new constructor, which takes a std::function predicate function that
is run at the beginning of shrink wrapping to determine whether the optimization
should run on the given machine function. The std::function can be overridden by
each target, allowing target-specific decisions to be made on each machine
function.

This is necessary for PowerPC, as the decision to run shrink wrapping is
partially based on the ABI. Futhermore, this operates nicely with the GCC iFunc
capability, which allows option overrides on a per-function basis.

Phabricator: http://reviews.llvm.org/D11421
llvm-svn: 244235
2015-08-06 18:02:53 +00:00
Chad Rosier 22eb71056d [AArch64] Use a static function and other minor cleanup for readability. NFC.
llvm-svn: 244233
2015-08-06 17:37:18 +00:00
Alex Lorenz dc8de2a6b7 MIR Serialization: Serialize the 'invariant' machine memory operand flag.
llvm-svn: 244230
2015-08-06 16:55:53 +00:00
Richard Diamond bd753c9315 Fix an alignment error in `llvm::expandAtomicRMWToCmpXchg` without breaking the build where X86 isn't enabled.
Summary: Divide the primitive size in bits by eight so the initial load's alignment is in bytes as expected. Tested with the included unit test.

Reviewers: rengolin, jfb

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11804

llvm-svn: 244229
2015-08-06 16:55:03 +00:00
Alex Lorenz 10fd03857f MIR Serialization: Serialize the 'non-temporal' machine memory operand flag.
llvm-svn: 244228
2015-08-06 16:49:30 +00:00
Chad Rosier f77e909f0a [AArch64] Improve the readability of the ld/st optimization pass. NFC.
llvm-svn: 244222
2015-08-06 15:50:12 +00:00
Douglas Katzman 63d64da0ce [SPARC] Don't compare arch name as a string, use the enum instead.
Fixes PR22695

llvm-svn: 244221
2015-08-06 15:44:12 +00:00
Renato Golin a02ac60469 Revert "Divide the primitive size in bits by eight so the initial load's alignment is in bytes as expected. Tested with the included unit test."
This reverts commit r244155, as it was breaking the buildbots for too long.
Should be reapplied with proper fix.

llvm-svn: 244205
2015-08-06 10:37:59 +00:00
NAKAMURA Takumi 51fe119a30 llvm/lib/IR/AttributeImpl.h: Move comment block not to cover typedef, introduced in r244164. [-Wdocumentation]
llvm-svn: 244204
2015-08-06 09:49:17 +00:00
Michael Liao 66233b7d79 Removing tailing whitespaces
llvm-svn: 244203
2015-08-06 09:06:20 +00:00
Michael Kuperstein 868dc65444 [X86] Improve EmitLoweredSelect for contiguous CMOV pseudo instructions.
This change improves EmitLoweredSelect() so that multiple contiguous CMOV pseudo
instructions with the same (or exactly opposite) conditions get lowered using a single
new basic-block. This eliminates unnecessary extra basic-blocks (and CFG merge points)
when contiguous CMOVs are being lowered.

Patch by: kevin.b.smith@intel.com
Differential Revision: http://reviews.llvm.org/D11428

llvm-svn: 244202
2015-08-06 08:45:34 +00:00
Chandler Carruth c5d811253a [PM/AA] Clean up and homogenize comments throughout basic-aa.
llvm-svn: 244200
2015-08-06 08:17:06 +00:00
Chandler Carruth 903c5f9329 [PM/AA] Run clang-format over all of basic-aa before making more
substantive edits.

llvm-svn: 244198
2015-08-06 07:57:58 +00:00
Chandler Carruth 17e0bc37fd [PM/AA] Hoist the interface for BasicAA into a header file.
This is the first mechanical step in preparation for making this and all
the other alias analysis passes available to the new pass manager. I'm
factoring out all the totally boring changes I can so I'm moving code
around here with no other changes. I've even minimized the formatting
churn.

I'll reformat and freshen comments on the interface now that its located
in the right place so that the substantive changes don't triger this.

llvm-svn: 244197
2015-08-06 07:33:15 +00:00
Peter Collingbourne e834f42073 COFF: Assign the correct symbol type to internal functions.
The COFFSymbolRef::isFunctionDefinition() function tests for several conditions
that are not related to whether a symbol is a function, but rather whether
the symbol meets the requirements for a function definition auxiliary record,
which excludes certain symbols such as internal functions and undefined
references. The test we need to determine the symbol type is much simpler:
we only need to compare the complex type against IMAGE_SYM_DTYPE_FUNCTION.

llvm-svn: 244195
2015-08-06 05:26:35 +00:00
Chandler Carruth 50fee93926 [PM/AA] Simplify the AliasAnalysis interface by removing a wrapper
around a DataLayout interface in favor of directly querying DataLayout.

This wrapper specifically helped handle the case where this no
DataLayout, but LLVM now requires it simplifynig all of this. I've
updated callers to directly query DataLayout. This in turn exposed
a bunch of places where we should have DataLayout readily available but
don't which I've fixed. This then in turn exposed that we were passing
DataLayout around in a bunch of arguments rather than making it readily
available so I've also fixed that.

No functionality changed.

llvm-svn: 244189
2015-08-06 02:05:46 +00:00
Kostya Serebryany bf29ff2fa5 [libFuzzer] add one more mutation strategy: byte shuffling
llvm-svn: 244188
2015-08-06 01:29:13 +00:00
Alex Lorenz 49873a8382 MIR Serialization: Initial serialization of the machine operand target flags.
This commit implements the initial serialization of the machine operand target
flags. It extends the 'TargetInstrInfo' class to add two new methods that help
to provide text based serialization for the target flags.

This commit can serialize only the X86 target flags, and the target flags for
the other targets will be serialized in the follow-up commits.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 244185
2015-08-06 00:44:07 +00:00
Duncan P. N. Exon Smith 3115f75bf8 ValueMapper: Rotate distinct node remapping algorithm
Rotate the algorithm for remapping distinct nodes in order to simplify
how uniquing cycles get resolved.  This removes some of the recursion,
and, most importantly, exposes all uniquing cycles at the top-level.
Besides being a little more efficient -- temporary MDNodes won't live as
long -- the clearer logic should help protect against bugs like those
fixed in r243961 and r243976.

What are uniquing cycles?  Why do they present challenges when remapping
metadata?

    !0 = !{!1}
    !1 = !{!0}

!0 and !1 form a simple uniquing cycle.  When remapping from one
metadata graph to another, every uniquing cycle gets "duplicated"
through a dance:

    !0-temp = !{!1?}     ; map(!0): clone !0, VM[!0] = !0-temp
    !1-temp = !{!0?}     ; ..map(!1): clone !1, VM[!1] = !1-temp
    !1-temp = !{!0-temp} ; ..map(!1): remap !1's operands
    !2      = !{!0-temp} ; ..map(!1): uniquify: !1-temp => !2
    !0-temp = !{!2}      ; map(!0): remap !0's operands
    !3      = !{!2}      ; map(!0): uniquify: !0-temp => !3

    ; Result
    !2 = !{!3}
    !3 = !{!2}

(In the two "uniquify" steps above, the operands of !X-temp are compared
to the operands of !X.  If they're the same, then !X-temp gets RAUW'ed
to !X; if they're different, then !X-temp is promoted to a new unique
node.  The latter case always hits in for uniquing cycles, so we
duplicate all the nodes involved.)

Why is this a problem?  Uniquable Metadata nodes that have temporary
node as transitive operands keep RAUW support until the temporary nodes
get finalized.  With non-cycles, this happens automatically: when a
uniquable node's count of unresolved operands drops to zero, it
immediately sheds its own RAUW support (possibly triggering the same in
any node that references it).  However, uniquing cycles create a
reference cycle, and uniqued nodes that transitively reference a
uniquing cycle are "stuck" in an unresolved state until someone calls
`MDNode::resolveCycles()` on a node in the unresolved subgraph.

Distinct nodes should help here (and mostly do): since they aren't
uniqued anywhere, they are guaranteed not to be RAUW'ed.  They
effectively form a barrier between uniqued nodes, breaking some uniquing
cycles, and shielding uniqued nodes from uniquing cycles.

Unfortunately, with this barrier in place, the unresolved subgraph(s)
can be disjoint from the top-level node.  The mapping algorithm needs to
find at least one representative from each disjoint subgraph.  But which
nodes are *stuck*, and which will get resolved automatically?  And which
nodes are in the unresolved subgraph?  The old logic was conservative.

This commit rotates the logic for distinct nodes, so that we have access
to unresolved nodes at the top-level call to `llvm::MapMetadata()`.
Each time we return to the top-level, we know that all temporaries have
been RAUW'ed away.  Here, it's safe (and necessary) to call
`resolveCycles()` immediately on unresolved operands.

This should also perform better than the old algorithm.  The recursion
stack is shorter, temporary nodes don't live as long, and there are
fewer tracking references to unresolved nodes.  As the debug info graph
introduces more 'distinct' nodes, remapping should incrementally get
cheaper and cheaper.

Aside from possible performance improvements (and reduced cruft in the
`LLVMContext`), there should be no functionality change here.

llvm-svn: 244181
2015-08-05 23:52:42 +00:00
Kostya Serebryany d46369d8b3 [libFuzzer] avoid build warnings in non-assert build (useful warning in this case)
llvm-svn: 244177
2015-08-05 23:44:42 +00:00
Wei Mi d67daae4f1 Add a stat to show how often the limit to decompose GEPs in BasicAA is reached.
Differential Revision: http://reviews.llvm.org/D9689

llvm-svn: 244174
2015-08-05 23:40:30 +00:00
Duncan P. N. Exon Smith 2705097e47 ValueMapper: Simplify remap() helper function, NFC
Rename `remap()` to `remapOperands()`, and restrict its contract to
remapping operands.  Previously, it also called `mapToMetadata()`, but
this logic is hard to reason about externally.  In particular, this
refactors `mapUniquedNode()` to avoid redundant mapping calls, taking
advantage of the RAUWs that are already in place.

llvm-svn: 244168
2015-08-05 23:22:34 +00:00
JF Bastien 0f8a99b62f x86: NFC remove needless InstrCompiler cast
Summary: The casts from String to PatFrag weren't needed if we instead provided an SDNode. This fix was suggested by @pete in D11382.

Subscribers: pete, llvm-commits

Differential Revision: http://reviews.llvm.org/D11788

llvm-svn: 244167
2015-08-05 23:15:37 +00:00
Bjarke Hammersholt Roune 5cbc7d2999 [NVPTX] Use LDG for pointer induction variables.
More specifically, make NVPTXISelDAGToDAG able to emit cached loads (LDG) for pointer induction variables.

Also fix latent bug where LDG was not restricted to kernel functions. I believe that this could not be triggered so far since we do not currently infer that a pointer is global outside a kernel function, and only loads of global pointers are considered for cached loads.

llvm-svn: 244166
2015-08-05 23:11:57 +00:00
Kostya Serebryany 4cc10d432a [libFuzzer] in dfsan mode, set labels every time we start recording traces as opposed to doing it at process startup. This ensures that the labels are fresh.
llvm-svn: 244165
2015-08-05 23:02:57 +00:00
James Y Knight aa365b2fcd Add a TrailingObjects template class.
This is intended to help support the idiom of a class that has some
other objects (or multiple arrays of different types of objects)
appended on the end, which is used quite heavily in clang.

Differential Revision: http://reviews.llvm.org/D11272

llvm-svn: 244164
2015-08-05 22:57:34 +00:00
Reid Kleckner 12d2c12023 If the "CodeView" module flag is set, emit codeview instead of DWARF
Summary:
Emit both DWARF and CodeView if "CodeView" and "Dwarf Version" module
flags are set.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11756

llvm-svn: 244158
2015-08-05 22:26:20 +00:00
Alex Lorenz 5672a893e5 MIR Serialization: Serialize the machine operand's offset.
This commit serializes the offset for the following operands: target index,
global address, external symbol, constant pool index, and block address.

llvm-svn: 244157
2015-08-05 22:26:15 +00:00
Richard Diamond 559c1d72a9 Divide the primitive size in bits by eight so the initial load's alignment is in
bytes as expected. Tested with the included unit test.

llvm-svn: 244155
2015-08-05 22:10:57 +00:00
Cong Hou 36e7e52aa4 Record whether the weights on out-edges from a MBB are normalized.
1. Create a utility function normalizeEdgeWeights() in MachineBranchProbabilityInfo that normalizes a list of edge weights so that the sum of then can fit in uint32_t.
2. Provide an interface in MachineBasicBlock to normalize its successors' weights.
3. Add a flag in MachineBasicBlock that tracks whether its successors' weights are normalized.
4. Provide an overload of getSumForBlock that accepts a non-const pointer to a MBB so that it can force normalizing this MBB's successors' weights.
5. Update several uses of getSumForBlock() by eliminating the once needed weight scale.

Differential Revision: http://reviews.llvm.org/D11442

llvm-svn: 244154
2015-08-05 22:01:20 +00:00
Kostya Serebryany 70926aed6b [libFuzzer] add option -report_slow_units=Nsec to control when slow units are printed
llvm-svn: 244152
2015-08-05 21:43:48 +00:00
Kostya Serebryany 1ce0035bf0 [libFuzzer] add a missing test file
llvm-svn: 244151
2015-08-05 21:32:13 +00:00
David Blaikie 3affe6e264 -Wdeprecated: Remove some dead code that was relying on a questionable (rule-of-3-violating) copy ctor in MCInstPrinter
llvm-svn: 244133
2015-08-05 21:15:48 +00:00
Chen Li 50efd9220a [LoopUnswitch] Preserve make.implicit metadata for unswitched conditions
Summary: This patch adds support to preserve make.implicit metadata for unswitched conditions in loop pre-header.

Reviewers: sanjoy, weimingz

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D11769

llvm-svn: 244132
2015-08-05 21:13:26 +00:00
Krzysztof Parzyszek eca6f04074 [Hexagon] Edit a comment. NFC
llvm-svn: 244130
2015-08-05 21:08:26 +00:00
JF Bastien 8662083770 x86 atomic: optimize a.store(reg op a.load(acquire), release)
Summary: PR24191 finds that the expected memory-register operations aren't generated when relaxed { load ; modify ; store } is used. This is similar to PR17281 which was addressed in D4796, but only for memory-immediate operations (and for memory orderings up to acquire and release). This patch also handles some floating-point operations.

Reviewers: reames, kcc, dvyukov, nadav, morisset, chandlerc, t.p.northover, pete

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11382

llvm-svn: 244128
2015-08-05 21:04:59 +00:00
Chandler Carruth 8ef3cda398 [PM] Remove a failed attempt to port the CallGraph analysis to the new
pass manager.

This never worked, and won't ever work. It was actually why I ended up
building the LazyCallGraph set of code which is more more effectively
wired up to the new pass manager. This accidentally got committed when
I was trying to land a cleanup of the code organization in the other
parts of this file. =[ My bad, but fortunately Dave was keen eyed enough
to spot that this code couldn't possibly work. =]

llvm-svn: 244127
2015-08-05 21:04:31 +00:00
David Blaikie a5d7de9f08 -Wdeprecated cleanup: Make CallGraph movable by default by using unique_ptr members rather than raw pointers.
The only place that tries to return a CallGraph by value
(CallGraphAnalysis::run) doesn't seem to be used right now, but it's a
reasonable bit of cleanup anyway.

llvm-svn: 244122
2015-08-05 20:55:50 +00:00
JF Bastien 7c4218f49c Revert "Fix MO's analyzePhysReg, it was confusing sub- and super-registers. Problem pointed out by Michael Hordijk."
I mistakenly committed the patch for D6629, and was trying to commit another. Reverting until it gets proper signoff.

llvm-svn: 244121
2015-08-05 20:53:56 +00:00
JF Bastien ce5256f5c5 Fix MO's analyzePhysReg, it was confusing sub- and super-registers. Problem pointed out by Michael Hordijk.
llvm-svn: 244120
2015-08-05 20:49:46 +00:00
David Blaikie 5e1ffae7bc -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11
LoadedObjectInfo was depending on the implicit copy ctor in the presence
of a user-declared dtor. Default (and protect) it in the base class and
make the devired classes final to avoid any risk of a public API that
would enable slicing.

llvm-svn: 244112
2015-08-05 20:20:29 +00:00
Richard Diamond 7ef94569e1 Write access test.
llvm-svn: 244103
2015-08-05 19:40:39 +00:00
Alex Lorenz 3f2058da16 MIR Parser: Report an error when parsing large immediate operands.
llvm-svn: 244100
2015-08-05 19:03:42 +00:00
Alex Lorenz 05e3882e81 MIR Serialization: Serialize the typed immediate integer machine operands.
llvm-svn: 244098
2015-08-05 18:52:21 +00:00
Chandler Carruth b2fda0d95c [Unroll] Switch to using 'int' cost types in preparation for a somewhat
more involved change to the cost computation pattern.

llvm-svn: 244095
2015-08-05 18:46:21 +00:00
Alex Lorenz 7eaff4c7d6 MIR Parser: Extract the IR constant parsing code into a new method. NFC.
This commit extracts the code that parses the IR constant values into a new
method named 'parseIRConstant' in the 'MIParser' class. The new method will
be reused by the code that parses the typed integer immediate machine operands.

llvm-svn: 244093
2015-08-05 18:44:00 +00:00
Krzysztof Parzyszek 73e66f323a [Hexagon] Implement TargetTransformInfo for Hexagon
Author: Brendon Cahoon <bcahoon@codeaurora.org>
llvm-svn: 244089
2015-08-05 18:35:37 +00:00
Kostya Serebryany 7f4227d59a [libFuzzer] use data-flow feedback from strcmp
llvm-svn: 244084
2015-08-05 18:23:01 +00:00
Alex Lorenz 2b3cf19332 MIR Parser: Report an error when parsing duplicate register flags.
llvm-svn: 244081
2015-08-05 18:09:03 +00:00
Chandler Carruth 93205eb966 [TTI] Make the cost APIs in TargetTransformInfo consistently use 'int'
rather than 'unsigned' for their costs.

For something like costs in particular there is a natural "negative"
value, that of savings or saved cost. As a consequence, there is a lot
of code that subtracts or creates negative values based on cost, all of
which is prone to awkwardness or bugs when dealing with an unsigned
type. Similarly, we *never* want these values to wrap, as that would
cause Very Bad code generation (likely percieved as an infinite loop as
we try to emit over 2^32 instructions or some such insanity).

All around 'int' seems a much better fit for these basic metrics. I've
added asserts to ensure that at least the TTI interface never returns
negative numbers here. If we ever have a use case for negative numbers,
we can remove this, but this way a bug where someone used '-1' to
produce a 'very large' cost will be caught by the assert.

This passes all tests, and is also UBSan clean.

No functional change intended.

Differential Revision: http://reviews.llvm.org/D11741

llvm-svn: 244080
2015-08-05 18:08:10 +00:00
Chandler Carruth 405e4f9051 [GMR] Teach the conservative path of GMR to catch even more easy cases.
In PR24288 it was pointed out that the easy case of a non-escaping
global and something that *obviously* required an escape sometimes is
hidden behind PHIs (or selects in theory). Because we have this binary
test, we can easily just check that all possible input values satisfy
the requirement. This is done with a (very small) recursion through PHIs
and selects. With this, the specific example from the PR is correctly
folded by GVN.

Differential Revision: http://reviews.llvm.org/D11707

llvm-svn: 244078
2015-08-05 17:58:30 +00:00
Alex Lorenz 01c1a5ee58 MIR Serialization: Serialize the 'early-clobber' register operand flag.
llvm-svn: 244075
2015-08-05 17:49:03 +00:00
Pete Cooper 3ae0ee5453 Move BB succ_iterator to be inside TerminatorInst. NFC.
To get the successors of a BB we currently do successors(BB) which
ultimately walks the successors of the BB's terminator.

This moves the iterator to TerminatorInst as thats what we're actually
using to do the iteration, and adds a member function to TerminatorInst
to allow us to iterate directly over successors given an instruction.

For example, we can now do

  for (auto *Succ : BI->successors())

instead of

  for (unsigned i = 0, e = BI->getNumSuccessors(); i != e; ++i)

Reviewed by Tobias Grosser.

llvm-svn: 244074
2015-08-05 17:43:01 +00:00
Alex Lorenz 9075258b6a MIR Serialization: Serialize the 'debug-use' register operand flag.
llvm-svn: 244071
2015-08-05 17:41:17 +00:00
Alex Lorenz 970c12eade MIR Parser: Simplify the handling of quoted tokens. NFC.
The machine instructions lexer should not expose the difference between quoted
and unquoted tokens to the parser.

llvm-svn: 244068
2015-08-05 17:35:55 +00:00
Chad Rosier 69e3eb3c79 [AArch64] Register AArch64DeadRegisterDefinition pass with LLVM pass manager.
llvm-svn: 244067
2015-08-05 17:35:34 +00:00
James Y Knight bce20afe0f [Sparc] Fix disassembly of popc instruction.
And add tests.

Patch by David Wiberg!

llvm-svn: 244064
2015-08-05 17:00:30 +00:00
Matt Arsenault 95f0606e62 AMDGPU/SI: Remove EXECReg
For the same reasons as the other physical registers.

llvm-svn: 244062
2015-08-05 16:42:57 +00:00
Matt Arsenault 4c0487bff6 AMDGPU: Remove SCCReg.
These should be handled as a physical register rather
than a virtual register class with one member.

llvm-svn: 244061
2015-08-05 16:42:54 +00:00
Chad Rosier 1c81432eb6 [AArch64] Register (existing) AArch64BranchRelaxation pass with LLVM pass manager.
Summary: Among other things, this allows -print-after-all/-print-before-all to
dump IR around this pass.

llvm-svn: 244060
2015-08-05 16:12:10 +00:00
Steven Wu 9927206f8c Force the MachO generated for Darwin to have VERSION_MIN load command
On Darwin, it is required to stamp the object file with VERSION_MIN load
command. This commit will provide a VERSRION_MIN load command to the
MachO file that doesn't specify the version itself by inferring from
Target Triple.

llvm-svn: 244059
2015-08-05 15:36:38 +00:00
Chad Rosier 0c6c5fc303 [AArch64] Make the naming of the Address Type Promotion pass consistent.
llvm-svn: 244057
2015-08-05 15:32:23 +00:00
Chad Rosier 794b9b2fdd [AArch64] Register (existing) AArch64AdvSIMDScalar pass with LLVM pass manager.
Summary: Among other things, this allows -print-after-all/-print-before-all to
dump IR around this pass.

IIRC, this pass is off by default, but it's still helpful when debugging.

llvm-svn: 244056
2015-08-05 15:18:58 +00:00
Sanjay Patel b6a79f9916 revert r243687: enable fast-math-flag propagation to DAG nodes
We can't propagate FMF partially without breaking DAG-level CSE. We either need to
relax CSE to account for mismatched FMF as a temporary work-around or fully propagate
FMF throughout the DAG.

Surprisingly, there are no existing regression tests for this, but here's an example:

  define float @fmf(float %a, float %b) {
    %mul1 = fmul fast float %a, %b
    %nega = fsub fast float 0.0, %a
    %mul2 = fmul fast float %nega, %b
    %abx2 = fsub fast float %mul1, %mul2
    ret float %abx2
  }


$ llc -o - badflags.ll -march=x86-64 -mattr=fma -enable-unsafe-fp-math -enable-fmf-dag=0
...
    vmulss    %xmm1, %xmm0, %xmm0
    vaddss    %xmm0, %xmm0, %xmm0
    retq

$ llc -o - badflags.ll -march=x86-64 -mattr=fma -enable-unsafe-fp-math -enable-fmf-dag=1
...
    vmulss    %xmm1, %xmm0, %xmm2
    vfmadd213ss    %xmm2, %xmm1, %xmm0  <--- failed to recognize that (a * b) was already calculated
    retq

llvm-svn: 244053
2015-08-05 15:12:03 +00:00
Chad Rosier 084b78632e Make this less error prone by using a #define. NFC.
llvm-svn: 244048
2015-08-05 14:48:44 +00:00
Chad Rosier 9378c16ac8 [AArch64] Register (existing) AArch64ExpandPseudo pass with LLVM pass manager.
Summary: Among other things, this allows -print-after-all/-print-before-all to
dump IR around this pass.

llvm-svn: 244046
2015-08-05 14:22:53 +00:00
Benjamin Kramer 45f3954ce9 [AA] Use CallSite cast idiom. No functionality change.
llvm-svn: 244045
2015-08-05 14:16:44 +00:00
Benjamin Kramer 7a92377a2b [YAMLTraits] Use StringRef::copy. No functionality change.
llvm-svn: 244044
2015-08-05 14:16:38 +00:00
Benjamin Kramer 9aad599700 [IR] Simplify code with ArrayRef::copy. No functionality change.
llvm-svn: 244043
2015-08-05 14:16:28 +00:00
Chad Rosier 96530b3a43 [AArch64] Register (existing) AArch64LoadStoreOpt pass with LLVM pass manager.
Summary: Among other things, this allows -print-after-all/-print-before-all to
dump IR around this pass.

This is the AArch64 version of r243052.

llvm-svn: 244041
2015-08-05 13:44:51 +00:00
Chad Rosier 43f5c84cfc Update comment. NFC.
llvm-svn: 244038
2015-08-05 12:40:13 +00:00
Artyom Skrobov 6fbef2a780 ARMISelDAGToDAG.cpp had this self-contradictory code:
return StringSwitch<int>(Flags)
          .Case("g", 0x1)
          .Case("nzcvq", 0x2)
          .Case("nzcvqg", 0x3)
          .Default(-1);
...

  // The _g and _nzcvqg versions are only valid if the DSP extension is
  // available.
  if (!Subtarget->hasThumb2DSP() && (Mask & 0x2))
    return -1;

ARMARM confirms that the comment is right, and the code was wrong.

llvm-svn: 244029
2015-08-05 11:02:14 +00:00
Simon Pilgrim 18617d193f Fixed line endings.
llvm-svn: 244021
2015-08-05 08:18:00 +00:00
Hal Finkel 17caf326e5 [MachineCombiner] Don't use the opcode-only form of computeInstrLatency
In r242277, I updated the MachineCombiner to work with itineraries, but I
missed a call that is scheduling-model-only (the opcode-only form of
computeInstrLatency). Using the form that takes an MI* allows this to work with
itineraries (and should be NFC for subtargets with scheduling models).

llvm-svn: 244020
2015-08-05 07:45:28 +00:00
NAKAMURA Takumi 5a43055ea9 Windows/COM.inc: Fix emacs mode in the first line.
llvm-svn: 244016
2015-08-05 06:11:08 +00:00
Tanya Lattner 0d28f80bd1 Rename all references to old mailing lists to new lists.llvm.org address.
llvm-svn: 243999
2015-08-05 03:51:17 +00:00
Yaron Keren 13631242fe Avoid passing nullptr to std::equal.
As documented in the LLVM Coding Standards, indeed MSVC incorrectly asserts 
on this in Debug mode. This happens when building clang with Visual C++ and
-triple i686-pc-windows-gnu on these clang regression tests:

 clang/test/CodeGen/2011-03-08-ZeroFieldUnionInitializer.c
 clang/test/CodeGen/empty-union-init.c

llvm-svn: 243996
2015-08-04 15:57:04 +00:00
Sanjay Patel 924879ad2c wrap OptSize and MinSize attributes for easier and consistent access (NFCI)
Create wrapper methods in the Function class for the OptimizeForSize and MinSize
attributes. We want to hide the logic of "or'ing" them together when optimizing
just for size (-Os).

Currently, we are not consistent about this and rely on a front-end to always set
OptimizeForSize (-Os) if MinSize (-Oz) is on. Thus, there are 18 FIXME changes here
that should be added as follow-on patches with regression tests.

This patch is NFC-intended: it just replaces existing direct accesses of the attributes
by the equivalent wrapper call.

Differential Revision: http://reviews.llvm.org/D11734

llvm-svn: 243994
2015-08-04 15:49:57 +00:00
Hal Finkel 23cdeeea0f [RuntimeDyld] Adapt PPC64 relocations to PPC32
Begin adapting some of the implemented PPC64 relocations for PPC32 (with a
test case).

Patch by Pierre-Andre Saulais!

llvm-svn: 243991
2015-08-04 15:29:00 +00:00
Sanjay Patel 75ced2782b [x86] machine combiner reassociation: mark EFLAGS operand as 'dead'
In the commentary for D11660, I wasn't sure if it was alright to create new
integer machine instructions without also creating the implicit EFLAGS operand. 
From what I can see, the implicit operand is always created by the MachineInstrBuilder
based on the instruction type, so we don't have to do that explicitly. However, in
reviewing the debug output, I noticed that the operand was not marked as 'dead'. 
The machine combiner should do that to preserve future optimization opportunities 
that may be checking for that dead EFLAGS operand themselves.

Differential Revision: http://reviews.llvm.org/D11696

llvm-svn: 243990
2015-08-04 15:21:56 +00:00
Vasileios Kalintiris 2f12b2ede5 [mips][FastISel] Disable code generation for unsupported targets through FastISel.
Summary:
Previously, we would check whether the target is supported or not, only in
fastSelectInstruction(). This means that 64-bit targets could use FastISel too.
We fix this by checking every overridden method of the FastISel class and
by falling back to SelectionDAG if the target isn't supported. This change
should have been committed along with r243638, but somehow I missed it.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11755

llvm-svn: 243986
2015-08-04 14:35:50 +00:00
Vasileios Kalintiris 044e172228 Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions.
It introduced two regressions on 64-bit big-endian targets running under N32
(MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4, and
MultiSource/Applications/kimwitu++/kc) The issue is that on 64-bit targets
comparisons such as BEQ compare the whole GPR64 but incorrectly tell the
instruction selector that they operate on GPR32's. This leads to the
elimination of i32->i64 extensions that are actually required by
comparisons to work correctly.

There's currently a patch under review that fixes this problem.

llvm-svn: 243984
2015-08-04 14:26:35 +00:00
Duncan P. N. Exon Smith 1de9ccb472 Fix 80-column
llvm-svn: 243977
2015-08-04 13:24:26 +00:00
Duncan P. N. Exon Smith 5ed90c0278 Linker: Fix ASan failure from r243961
r243883 and r243961 made a use-after-free far more likely:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/6041/steps/check-llvm%20asan/logs/stdio

Unresolved nodes get inserted into the `Cycles` array.  If they later
get resolved through RAUW, we need to update the reference.  It's
interesting that this never hit before (maybe an asan-ified clang
bootstrap with `-flto -g` would have hit it, but I admit I haven't tried
anything quite that crazy).

llvm-svn: 243976
2015-08-04 13:23:30 +00:00
David Majnemer eb518bd5d8 Drive-by fixes for LandingPad -> EHPad
This change was done as an audit and is by inspection.  The new EH
system is still very much a work in progress.  NFC for the landingpad
case.

llvm-svn: 243965
2015-08-04 08:21:40 +00:00
Simon Pilgrim dcfd7a3fba [InstCombine] Moved SSE vector shift constant folding into its own helper function. NFCI.
This will make some upcoming bugfixes + improvements easier to manage.

llvm-svn: 243962
2015-08-04 07:49:58 +00:00
Duncan P. N. Exon Smith 706f37e8df Linker: Fix references to uniqued nodes after r243883
r243883 started moving 'distinct' nodes instead of duplicated them in
lib/Linker.  This had the side-effect of sometimes not cloning uniqued
nodes that reference them.  I missed a corner case:

    !named = !{!0}
    !0 = !{!1}
    !1 = distinct !{!0}

!0 is the entry point for "remapping", and a temporary clone (say,
!0-temp) is created and mapped in case we need to model a uniquing
cycle.

    Recursive descent into !1.  !1 is distinct, so we leave it alone,
    but update its operand to !0-temp.

Pop back out to !0.  Its only operand, !1, hasn't changed, so we don't
need to use !0-temp.  !0-temp goes out of scope, and we're finished
remapping, but we're left with:

    !named = !{!0}
    !0 = !{!1}
    !1 = distinct !{null} ; uh oh...

Previously, if !0 and !0-temp ended up with identical operands, then
!0-temp couldn't have been referenced at all.  Now that distinct nodes
don't get duplicated, that assumption is invalid.  We need to
!0-temp->replaceAllUsesWith(!0) before freeing !0-temp.

I found this while running an internal `-flto -g` bootstrap.  Strangely,
there was no case of this in the open source bootstrap I'd done before
commit...

llvm-svn: 243961
2015-08-04 06:42:31 +00:00
Justin Bogner c7e3f3ab6e Remove the configure and cmake checks for sys/wait.h
If we don't have sys/wait.h and we're on a unix system there's no way
that several of the llvm tools work at all. This includes clang.

Just remove the configure and cmake checks entirely - we'll get a
build error instead of building something broken now.

llvm-svn: 243957
2015-08-04 06:29:58 +00:00
Hal Finkel caf1149b8b [SDAG] Fix a result chain in ExpandUnalignedLoad
On the code path in ExpandUnalignedLoad which expands an unaligned vector/fp
value in terms of a legal integer load of the same size, the ChainResult needs
to be the chain result of the integer load.

No in-tree test case is currently available.

Patch by Jan Hranac!

llvm-svn: 243956
2015-08-04 06:29:12 +00:00
Adam Nemet 8701118792 [LAA] Remove unused pointer partition argument from addRuntimeCheck, NFC
This variant of addRuntimeCheck is only used now from the LoopVectorizer
which does not use this parameter.

llvm-svn: 243955
2015-08-04 05:16:20 +00:00
Chen Li 0003878466 Introduce enum value for previously defined metadata -- make.implicit
Summary: This patch adds enum value for an existing metadata type -- make.implicit. Using preassigned enum will be helpful to get compile time type checking and avoid string construction and comparison. The patch also changes uses of make.implicit from string metadata to enum metadata. There is no functionality change.

Reviewers: reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11698

llvm-svn: 243954
2015-08-04 04:41:34 +00:00
Saleem Abdulrasool 0a2672bb43 ARM: support windows division routines
This adds the software division routines for the Windows RTABI.  These are not
expected to be used often though as most modern Windows ARM capable targets
support hardware division.  In the case that the target CPU doesnt support
hardware division, this will be the fallback.

llvm-svn: 243952
2015-08-04 03:57:56 +00:00
Saleem Abdulrasool 67697a7ea9 ARM: make Darwin libcall registration table driven (NFC)
Make the libcall updating table driven similar to the approach that the Linux
and Windows codepath does below.  NFC.

llvm-svn: 243951
2015-08-04 03:57:52 +00:00
Chandler Carruth 7771197955 [UB] Don't allocate space for contained types and then try to copy the
contained types into the space when we have no contained types. This
fixes the UB stemming from a call to memcpy with a null pointer. This
also reduces the calls to allocate because this actually happens in
a notable client - Clang.

Found by UBSan.

llvm-svn: 243944
2015-08-04 03:48:26 +00:00
Sanjoy Das 215df9ed98 Revert "[LSR] Generate and use zero extends"
This reverts commit r243348 and r243357.  They caused PR24347.

llvm-svn: 243939
2015-08-04 01:52:05 +00:00
Ahmed Bougacha 81fda188f9 [AArch64] Rename FP formats to be more consistent. NFC.
Some are named "FP", others "SD", others still "FP*SD".
Rename all this to just use "FP", which, except for conversions
(which don't use this format naming scheme), implies "SD" anyway.

llvm-svn: 243936
2015-08-04 01:38:08 +00:00
Ahmed Bougacha e0e12db8c8 [AArch64] Add isel support for f16 indexed LD/ST.
llvm-svn: 243935
2015-08-04 01:29:38 +00:00
Chandler Carruth 1c156f737e [UB] Fix yet another use of memcpy with a null pointer argument. I think
this is the last of them in my build of LLVM. Haven't tried Clang yet.

Found via UBSan.

llvm-svn: 243934
2015-08-04 01:00:56 +00:00