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Author SHA1 Message Date
Kito Cheng 303217e8b4 [RISCV] Implement pseudo instructions for load/store from a symbol address. 
Summary:
Those pseudo-instructions are making load/store instructions able to
load/store from/to a symbol, and its always using PC-relative addressing
to generating a symbol address.

Reviewers: asb, apazos, rogfer01, jrtc27

Differential Revision: https://reviews.llvm.org/D50496

llvm-svn: 354430
 2019-02-20 03:31:32 +00:00
Alex Bradbury 22531c4a14 [RISCV] Add assembler support for LA pseudo-instruction 
This patch also introduces the emitAuipcInstPair helper, which is then used
for both emitLoadAddress and emitLoadLocalAddress.

Differential Revision: https://reviews.llvm.org/D55325
Patch by James Clarke.

llvm-svn: 354111
 2019-02-15 09:53:32 +00:00