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70884 Commits

Author SHA1 Message Date
Kevin Enderby d077a857cc Remove the files for r128308 as it is causing a buildbot failure. 
llvm-svn: 128309
 2011-03-26 00:23:05 +00:00
Kevin Enderby c8b4078654 Adding a C API to the disassembler for use by such tools as Darwin's otool(1). 
This is a work in progress as the interface for producing symbolic operands is
not done.  But a hacked prototype using information from the object file's
relocation entiries and replacing immediate operands with MCExpr's has been
shown to work with no changes to the instrucion printer.  These APIs will be
moved into a dynamic library at some point.

llvm-svn: 128308
 2011-03-26 00:06:33 +00:00
Johnny Chen 1572bf40b4 Add test for A8.6.246 UMULL to both arm-tests.txt amd thumb-tests.txt. 
llvm-svn: 128306
 2011-03-25 23:02:58 +00:00
Johnny Chen 6e31bf1f6f Add two test cases t2SMLABT and t2SMMULR for DisassembleThumb2Mul(). 
llvm-svn: 128305
 2011-03-25 22:43:28 +00:00
Johnny Chen 49316e40ba Fix DisassembleThumb2DPReg()'s handling of RegClass. Cannot hardcode GPRRegClassID. 
Also add some test cases.

rdar://problem/9189829

llvm-svn: 128304
 2011-03-25 22:19:07 +00:00
Johnny Chen aaf2c69400 DisassembleThumb2LdSt() did not handle t2LDRs correctly with respect to RegClass. Add two test cases. 
rdar://problem/9182892

llvm-svn: 128299
 2011-03-25 19:35:37 +00:00
Johnny Chen 4fd2194638 A8.6.226 TBB, TBH: 
Add two test cases.

llvm-svn: 128295
 2011-03-25 18:40:21 +00:00
Johnny Chen b35548f44d Modify DisassembleThumb2LdStEx() to be more robust/correct in light of recent change to 
t2LDREX/t2STREX instructions.  Add two test cases.

llvm-svn: 128293
 2011-03-25 18:29:49 +00:00
Daniel Dunbar 6f4c9425eb MC: Improve some diagnostics on uses of '.' pseudo-symbol. 
llvm-svn: 128289
 2011-03-25 17:47:17 +00:00
Daniel Dunbar 3f56104be1 Tidyness. 
llvm-svn: 128288
 2011-03-25 17:47:14 +00:00
Benjamin Kramer dc0082b087 Add a note. 
llvm-svn: 128286
 2011-03-25 17:32:40 +00:00
Johnny Chen aa84d41dfc Instruction formats of SWP/SWPB were changed from LdStExFrm to MiscFrm. Modify the disassembler to handle that. 
rdar://problem/9184053

llvm-svn: 128285
 2011-03-25 17:31:16 +00:00
Jakob Stoklund Olesen 1886a4c823 Emit less labels for debug info and stop emitting .loc directives for DBG_VALUEs. 
The .dot directives don't need labels, that is a leftover from when we created
line number info manually.

Instructions following a DBG_VALUE can share its label since the DBG_VALUE
doesn't produce any code.

llvm-svn: 128284
 2011-03-25 17:20:59 +00:00
Johnny Chen 757ca69770 Also need to handle invalid imod values for CPS2p. 
rdar://problem/9186136

llvm-svn: 128283
 2011-03-25 17:03:12 +00:00
Duncan Sands 5343a406f8 Useful script for finding regressions in the nightly testsuite. 
I think it was written by Pawel Worach.

llvm-svn: 128268
 2011-03-25 07:17:44 +00:00
Bill Wendling ce2fccffc2 Remove redundant compression option. 
llvm-svn: 128267
 2011-03-25 06:43:59 +00:00
Andrew Trick 3bd8b7a388 Fix for -pre-RA-sched=source. 
Yet another case of unchecked NULL node (for physreg copy).
May fix PR9509.

llvm-svn: 128266
 2011-03-25 06:40:55 +00:00
Nick Lewycky 0e25c8b364 No functionality change, just adjust some whitespace for coding style compliance. 
llvm-svn: 128257
 2011-03-25 06:05:50 +00:00
Nick Lewycky d73218e4a3 No functionality change. Fix up some whitespace and switch out "" for '' when 
printing a single character.

llvm-svn: 128256
 2011-03-25 06:04:26 +00:00
Jakob Stoklund Olesen a1e3156ebd Ignore special ARM allocation hints for unexpected register classes. 
Add an assertion to linear scan to prevent it from allocating registers outside
the register class.

<rdar://problem/9183021>

llvm-svn: 128254
 2011-03-25 01:48:18 +00:00
Johnny Chen a52143bff3 Modify the wrong logic in the assert of DisassembleThumb2LdStDual() (the register classes were changed), 
modify the comment to be up-to-date, and add a test case for A8.6.66 LDRD (immediate) Encoding T1.

llvm-svn: 128252
 2011-03-25 01:09:48 +00:00
Johnny Chen 72f4a95144 delegate the disassembly of t2ADR to the more generic t2ADDri12/t2SUBri12 instructions, and add a test case for that. 
llvm-svn: 128249
 2011-03-25 00:17:42 +00:00
Johnny Chen ceef55466a The opcode names ("tLDM", "tLDM_UPD") used for conflict resolution have been stale since 
the change to ("tLDMIA", "tLDMIA_UPD").  Update the conflict resolution code and add
test cases for that.

llvm-svn: 128247
 2011-03-24 23:42:31 +00:00
Johnny Chen 73193f2475 The ARM disassembler was confused with the 16-bit tSTMIA instruction. 
According to A8.6.189 STM/STMIA/STMEA (Encoding T1), there's only tSTMIA_UPD available.
Ignore tSTMIA for the decoder emitter and add a test case for that.

llvm-svn: 128246
 2011-03-24 23:21:14 +00:00
Devang Patel 71536de752 Move test in x86 specific area. 
llvm-svn: 128245
 2011-03-24 22:39:09 +00:00
Matt Beaumont-Gay 303e3161bb Suppress an unused variable warning in -asserts builds 
llvm-svn: 128244
 2011-03-24 22:05:48 +00:00
Johnny Chen 9302df0ad9 Handle the added VBICiv*i* NEON instructions, too. 
llvm-svn: 128243
 2011-03-24 22:04:39 +00:00
Eric Christopher 3a213a50fe Testcase for llvm-gcc commit r128230. 
llvm-svn: 128242
 2011-03-24 21:59:03 +00:00
Johnny Chen 02e59ad506 Plug a leak by ThumbDisassembler::getInstruction(), thanks to Benjamin Kramer! 
llvm-svn: 128241
 2011-03-24 21:42:55 +00:00
Johnny Chen 6469ca0c33 T2 Load/Store Multiple: 
These instructions were changed to not embed the addressing mode within the MC instructions
We also need to update the corresponding assert stmt.  Also add a test case.

llvm-svn: 128240
 2011-03-24 21:36:56 +00:00
Benjamin Kramer dd9eb21c3f Plug a leak in the arm disassembler and put the tests back. 
llvm-svn: 128238
 2011-03-24 21:14:28 +00:00
Bruno Cardoso Lopes f170f8bff6 Add asm parsing support w/ testcases for strex/ldrex family of instructions 
llvm-svn: 128236
 2011-03-24 21:04:58 +00:00
Johnny Chen 471f5aa233 Remove these two test files as they cause llvm-i686-linux-vg_leak build to fail 'test-llvm'. 
These two are test cases which should result in 'invalid instruction encoding' from running llvm-mc -disassemble.

llvm-svn: 128235
 2011-03-24 20:56:23 +00:00
Johnny Chen 8bbc12824a ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder was fooled. 
Set the encoding bits to {0,?,?,0}, not 0.  Plus delegate the disassembly of ADR to
the more generic ADDri/SUBri instructions, and add a test case for that.

llvm-svn: 128234
 2011-03-24 20:42:48 +00:00
Devang Patel e01b75cb89 Keep track of directory namd and fIx regression caused by Rafael's patch r119613. 
A better approach would be to move source id handling inside MC.

llvm-svn: 128233
 2011-03-24 20:30:50 +00:00
Jim Grosbach a3df87fb01 Clean up assembly statement separator support. 
The MC asm lexer wasn't honoring a non-default (anything but ';') statement
separator. Fix that, and generalize a bit to support multi-character
statement separators.

llvm-svn: 128227
 2011-03-24 18:46:34 +00:00
Johnny Chen c5207f7167 The r118201 added support for VORR (immediate). Update ARMDisassemblerCore.cpp to disassemble the 
VORRiv*i* instructions properly within the DisassembleN1RegModImmFrm() function.  Add a test case.

llvm-svn: 128226
 2011-03-24 18:40:38 +00:00
Johnny Chen 1dd041083d Add comments to the handling of opcode CPS3p to reject invalid instruction encoding, 
a test case of invalid CPS3p encoding and one for invalid VLDMSDB due to regs out of range.

llvm-svn: 128220
 2011-03-24 17:04:22 +00:00
Andrew Trick a4ec5b2c19 revert r128199 until it can be made to work with Frontend/dependency-gen.c. 
llvm-svn: 128218
 2011-03-24 16:43:37 +00:00
Cameron Zwarich 74157ab3e5 Debug intrinsics must be skipped at the beginning and ends of blocks, lest they 
affect the generated code.

llvm-svn: 128217
 2011-03-24 16:34:59 +00:00
Jay Foad b03bd5983d Fix typo in comment. 
llvm-svn: 128216
 2011-03-24 16:18:19 +00:00
Chris Lattner 669ce55a42 fix description, PR9542 
llvm-svn: 128214
 2011-03-24 16:13:31 +00:00
Cameron Zwarich 2edfe778ec It is enough for the CallInst to have no uses to be made a tail call with a ret 
void; it doesn't need to have a void type.

llvm-svn: 128212
 2011-03-24 15:54:11 +00:00
Devang Patel 8f606d7b9b s/UpdateDT/ModifiedDT/g 
llvm-svn: 128211
 2011-03-24 15:35:25 +00:00
NAKAMURA Takumi 521eb7c11e Target/X86: [PR8777][PR8778] Tweak alloca/chkstk for Windows targets. 
FIXME: Some cleanups would be needed.
llvm-svn: 128206
 2011-03-24 07:07:00 +00:00
NAKAMURA Takumi 3854bad4a1 llvm-stub.cpp: mingw-w64 tweak. 
llvm-svn: 128205
 2011-03-24 07:06:45 +00:00
Evan Cheng e8954f1ee1 Add comment to clarify what MachineConstantPoolEntry::isMachineConstantPoolEntry() means. 
llvm-svn: 128204
 2011-03-24 06:28:45 +00:00
Evan Cheng f098bf1199 Nasty bug in ARMBaseInstrInfo::produceSameValue(). The MachineConstantPoolEntry 
entries being compared may not be ARMConstantPoolValue. Without checking
whether they are ARMConstantPoolValue first, and if the stars and moons
are aligned properly, the equality test may return true (when the first few
words of two Constants' values happen to be identical) and very bad things can
happen.

rdar://9125354

llvm-svn: 128203
 2011-03-24 06:20:03 +00:00
Michael J. Spencer e42162ad59 Remove all uses of PATH_MAX and MAXPATHLEN from PathV2. 
llvm-svn: 128199
 2011-03-24 05:23:40 +00:00
Cameron Zwarich 4649f17db1 Do early taildup of ret in CodeGenPrepare for potential tail calls that have a 
void return type. This fixes PR9487.

llvm-svn: 128197
 2011-03-24 04:52:10 +00:00