Commit Graph

298585 Commits

Author SHA1 Message Date
Rui Ueyama 10454c4fd5 Style fix.
llvm-svn: 341937
2018-09-11 13:41:58 +00:00
Sanjay Patel e368f46788 [AArch64] test codegen for unsigned saturated add; NFC
This is identical to the tests added for x86 at rL341845.
A semi-generic DAGCombine should improve things universally.

llvm-svn: 341935
2018-09-11 13:21:28 +00:00
Petar Jovanovic 5abf4bb552 [MIPS] ORC JIT support
This patch adds support for ORC JIT for mips/mips64 architecture.
In common code $static is changed to __ORCstatic because on MIPS
architecture "$" is a reserved character.

Patch by Luka Ercegovcevic

Differential Revision: https://reviews.llvm.org/D49665

llvm-svn: 341934
2018-09-11 13:10:04 +00:00
Jonas Toth b88eebebbe [NFC][clangd] fix warning for extra semicolon
llvm-svn: 341933
2018-09-11 13:01:49 +00:00
Sam Parker 945604d511 [ARM] Enable ARMCodeGenPrepare by default
We've had the pass enabled downstream for a couple of weeks and it
seems to be okay, so enable it by default.

Differential Revision: https://reviews.llvm.org/D51920

llvm-svn: 341932
2018-09-11 12:45:43 +00:00
Raphael Isemann b658f1df35 [NFC] Fix compiler warning in TestArmv7Disassembly.cpp
The warning is
    comparison of integers of different signs: 'const int' and 'const unsigned long'
and triggered by
    EXPECT_EQ (num_of_instructions, inst_list.GetSize());
as num_of_instructions is an int in this comparison (and the RHS is size_t).

llvm-svn: 341931
2018-09-11 12:45:22 +00:00
Jonathan Coe 5f5d3fa098 [python bindings] Expose getNumTemplateArguments
Expose the C bindings for clang_Type_getNumTemplateArguments() and
clang_Type_getTemplateArgumentAsType() in the python API.

Patch by kjteske (Kyle Teske).

Reviewed By: jbcoe

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51299

llvm-svn: 341930
2018-09-11 12:44:52 +00:00
Benjamin Kramer 8f776db7ff [clang-tidy] Insert absl::StrAppend when replacing StrCat.
There might be no using decl for StrAppend around, inserting the
qualified name is less likely to break things.

llvm-svn: 341929
2018-09-11 12:19:45 +00:00
Alexander Timofeev db7ee7660a [AMDGPU] Preliminary patch for divergence driven instruction selection. Immediate selection predicate changed
Differential revision: https://reviews.llvm.org/D51734
Reviewers: rampitec

llvm-svn: 341928
2018-09-11 11:56:50 +00:00
Johannes Doerfert ae3cfeb3ad [FuncAttrs] Remove "access range attributes" for read-none functions
The presence of readnone and an access range attribute (argmemonly,
inaccessiblememonly, inaccessiblemem_or_argmemonly) is considered an
error by the verifier. This seems strict but also not wrong. This
patch makes sure function attribute detection will remove all access
range attributes for readnone functions.

llvm-svn: 341927
2018-09-11 11:51:29 +00:00
Johannes Doerfert a58e9214ac [LoopInfo] Fix Loop::getLoopID() for loops with multiple latches
The previous implementation traversed all loop blocks and bailed if one
was not a latch block. Since we are only interested in latch blocks, we
should only traverse those.

llvm-svn: 341926
2018-09-11 11:44:17 +00:00
Benjamin Kramer 4f3c0e27b6 [clang-tidy] Add a missing comma after "flags"
llvm-svn: 341925
2018-09-11 10:37:08 +00:00
David Carlier 395aa78986 [Msan] Fix unit test linkage issue on FreeBSD
Fix typical relocation linkage issue.

Reviwewers: dim, emaste

Reviewed By: krytarowski

Differential Revision: https://reviews.llvm.org/D51681

llvm-svn: 341924
2018-09-11 10:35:32 +00:00
Kirill Bobyrev 0dee397e06 [clangd] NFC: Use uint32_t for FuzzyFindRequest limits
Reviewed By: ioeric

Differential Revision: https://reviews.llvm.org/D51860

llvm-svn: 341921
2018-09-11 10:31:38 +00:00
Simon Atanasyan 32d8d1bf04 [mips] Add a pattern for 64-bit GPR variant of the `rdhwr` instruction
MIPS ISAs start to support third operand for the `rdhwr` instruction
starting from Revision 6. But LLVM generates assembler code with
three-operands version of this instruction on any MIPS64 ISA. The third
operand is always zero, so in case of direct code generation we get
correct code.

This patch fixes the bug by adding an instruction alias. The same alias
already exists for 32-bit ISA.

Ideally, we also need to reject three-operands version of the `rdhwr`
instruction in an assembler code if ISA revision is less than 6. That is
a task for a separate patch.

This fixes PR38861 (https://bugs.llvm.org/show_bug.cgi?id=38861)

Differential revision: https://reviews.llvm.org/D51773

llvm-svn: 341919
2018-09-11 09:57:25 +00:00
Max Kazantsev bf00f03f56 [NFC] Sanitizing asserts for OrderedBasicBlock
llvm-svn: 341917
2018-09-11 08:46:19 +00:00
Craig Topper 844f035e1e [X86] In combineMOVMSK, look through int->fp bitcasts before callling SimplifyDemandedBits.
MOVMSKPS and MOVMSKPD both take FP types, but likely the operations before it are on integer types with just a int->fp bitcast between them. If the bitcast isn't used by anything else and doesn't change the element width we can look through it to simplify the integer ops.

llvm-svn: 341915
2018-09-11 08:20:02 +00:00
Dean Michael Berris 174d2cf771 [XRay] Ensure lambda outlives llvm::function_ref
Follow-up to D51912.

llvm-svn: 341912
2018-09-11 08:03:30 +00:00
Ilya Biryukov 008eda0807 [Tooling] Restore working dir in ClangTool.
Summary:
And add an option to disable this behavior. The option is only used in
AllTUsExecutor to avoid races when running concurrently on multiple
threads.

This fixes PR38869 introduced by r340937.

Reviewers: ioeric, steveire

Reviewed By: ioeric

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51864

llvm-svn: 341910
2018-09-11 07:29:09 +00:00
Dean Michael Berris ec605d3846 [XRay] Write the TSC along with CPUID
Fixes builds in non-little-endian systems.

This is a follow-up to D51911.

llvm-svn: 341909
2018-09-11 07:27:59 +00:00
Craig Topper 85210311ba [X86] Add test cases inspired by PR38840.
These are test cases inspired by sequences like below for extracting the same bit from every vector element and checking for all zeros/ones.

define i1 @and256_x8(<8 x i32>) {
    %a = trunc <8 x i32> %0 to <8 x i1>
    %b = bitcast <8 x i1> %a to i8
    %d = icmp eq i8 %b, -1
    ret i1 %d
}

This is what the above looks like after InstCombine.

define i1 @and256_x8_opt(<8 x i32>) {
  %2 = and <8 x i32> %0, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
  %a = icmp ne <8 x i32> %2, zeroinitializer
  %b = bitcast <8 x i1> %a to i8
  %d = icmp eq i8 %b, -1
  ret i1 %d
}

llvm-svn: 341908
2018-09-11 07:23:29 +00:00
Douglas Yung 28ea6775c7 Make test more robust in case the expected output appears in clang version string.
llvm-svn: 341907
2018-09-11 06:48:45 +00:00
Dean Michael Berris 985c2b9226 [XRay] Use FDR Records+Visitors for Trace Loading
Summary:
In this change, we overhaul the implementation for loading
`llvm::xray::Trace` objects from files by using the combination of
specific FDR Record types and visitors breaking up the logic to
reconstitute an execution trace from flight-data recorder mode traces.

This change allows us to handle out-of-temporal order blocks as written
in files, and more consistently recreate an execution trace spanning
multiple blocks and threads. To do this, we use the `WallclockRecord`
associated with each block to maintain temporal order of blocks, before
attempting to recreate an execution trace.

The new addition in this change is the `TraceExpander` type which can be
thought of as a decompression/decoding routine. This allows us to
maintain the state of an execution environment (thread+process) and
create `XRayRecord` instances that fit nicely into the `Trace`
container. We don't have a specific unit test for the TraceExpander
type, since the end-to-end tests for the `llvm-xray convert` tools
already cover precisely this codepath.

This change completes the refactoring started with D50441.

Depends on D51911.

Reviewers: mboerger, eizan

Subscribers: mgorny, hiraditya, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D51912

llvm-svn: 341906
2018-09-11 06:45:59 +00:00
Dean Michael Berris d2c50408d4 [XRay] Add TSC to NewCPUId Records
Summary:
This more correctly reflects the data written by the FDR mode runtime.

This is a continuation of the work in D50441.

Reviewers: mboerger, eizan

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D51911

llvm-svn: 341905
2018-09-11 06:36:51 +00:00
Max Kazantsev 9aacaffd98 [NFC] Specify test's option to reduce reliance on defaults
llvm-svn: 341904
2018-09-11 06:34:43 +00:00
Martin Storsjo b2b0f859d4 [ASan] [Windows] Remove const from _msize function declaration parameter
This function isn't declared with a const parameter anywhere; neither
in MSVC (neither in ucrt or in older msvcrt versions) nor in mingw-w64.

Differential Revision: https://reviews.llvm.org/D51876

llvm-svn: 341903
2018-09-11 06:07:32 +00:00
Bruno Cardoso Lopes 6fc8a564cf [Modules] Add imported modules to the output of -module-file-info
Fix a bug in the deserialization of IMPORTS section and allow for
imported modules to also be printed with -module-file-info.

rdar://problem/43867753

llvm-svn: 341902
2018-09-11 05:17:13 +00:00
Max Kazantsev 90edc98c58 [NFC] Rename variable
llvm-svn: 341901
2018-09-11 05:10:01 +00:00
JF Bastien c0d77e80ac NCF: use bit_cast in IntervalMap
This use is sketchy because it basically reinterprets a pointer to another pointer, but right now it's hiding in a union. After this change it'll be easy to grep for bit_cast of a pointer and un-sketch things if we want. This patch therefore obeys the law of conservation of sketch, with minor improvement.

llvm-svn: 341900
2018-09-11 04:52:21 +00:00
Heejin Ahn a9076e35d4 [XRay] Add missing LLVMTestingSupport target_link_libraries
Without this builds with `-DLLVM_LINK_LLVM_DYLIB=ON` fail.

llvm-svn: 341899
2018-09-11 04:48:08 +00:00
Matt Arsenault d0cf1b26d4 AMDGPU: Fix r600 test
llvm-svn: 341898
2018-09-11 04:39:16 +00:00
JF Bastien 49ddd5aca1 NFC: use bit_cast more in AArch64AddressingModes
The was previously committed as r341749 then reverted as r341750 because
bit_cast needed to do its own thing to check is_trivially_copyable on GCC 4.x.
This is now done and std;:array should now get accepted.

llvm-svn: 341897
2018-09-11 04:08:05 +00:00
Serguei Katkov 5f4a9e9ea0 [LICM] Avoid duplicate work during building AliasSetTracker
Currently we re-use cached info from sub loops or traverse them
to populate AliasSetTracker. But after that we traverse all basic blocks
from the current loop. This is redundant work.

All what we need is traversing the all basic blocks from the loop except
those which are used to get the data from the cache.

This should improve compile time only.

Reviewers: mkazantsev, reames, kariddi, anna
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51715

llvm-svn: 341896
2018-09-11 04:07:36 +00:00
Matt Arsenault 796b0e7a90 AMDGPU: Remove leftovers from configurable address spaces
llvm-svn: 341895
2018-09-11 04:00:49 +00:00
Matt Arsenault 99c780159d AMDGPU: Don't error on out of bounds address spaces
We should never abort on valid IR. The most reasonable
interpretation of an arbitrary address space pointer is
probably some kind of special subset of global memory.

llvm-svn: 341894
2018-09-11 04:00:41 +00:00
Max Kazantsev e6413919ce [IndVars][NFC] Refactor to make modifications of Changed transparent
IndVarSimplify's design is somewhat odd in the way how it reports that
some transform has made a change. It has a `Changed` field which can
be set from within any function, which makes it hard to track whether or
not it was set properly after a transform was made. It leads to oversights
in setting this flag where needed, see example in PR38855.

This patch removes the `Changed` field, turns it into a local and unifies
the signatures of all relevant transform functions to return boolean value
which designates whether or not this transform has made a change.

Differential Revision: https://reviews.llvm.org/D51850
Reviewed By: skatkov

llvm-svn: 341893
2018-09-11 03:57:22 +00:00
Philip Reames 1f52e38e8e [LICM] (re-)simplify code using MemoryLocation API [NFC]
I'd made exactly this same change before, but it appears to have been accidentally reverted in another change.  (I'm assuming accidental since it was without comment or test case, and in an unrelated change.)

llvm-svn: 341892
2018-09-11 03:28:28 +00:00
Shuai Wang 5066ab369d Revert "Revert "[clang-tidy] Handle unresolved expressions in ExprMutationAnalyzer""
This is the same as D50619 plus fixes for buildbot failures on windows.
The test failures on windows are caused by -fdelayed-template-parsing
and is fixed by forcing -fno-delayed-template-parsing on test cases that
requires AST for uninstantiated templates.

llvm-svn: 341891
2018-09-11 02:23:35 +00:00
David Blaikie 4ec5a9159b llvm-symbolizer: Fix bug related to TUs interfering with symbolizing
With the merge of TUs and CUs into a single container, some code that
relied on the CU range having an ordered range of contiguous addresses
(for locating a CU at a given offset) broke. But the units from
debug_info (currently only CUs, but CUs and TUs in DWARFv5) are in a
contiguous sub-range of that container - searching only through that
subrange is still valid & so do that.

llvm-svn: 341889
2018-09-11 02:04:45 +00:00
Peter Collingbourne c7d281905b Prevent Constant Folding From Optimizing inrange GEP
This patch does the following things:

1. update SymbolicallyEvaluateGEP so that it bails out if it cannot preserve inrange arribute;
2. update llvm/test/Analysis/ConstantFolding/gep.ll to remove UB in it;
3. remove inaccurate comment above ConstantFoldInstOperandsImpl in llvm/lib/Analysis/ConstantFolding.cpp;
4. add a new regression test that makes sure that no optimizations change an inrange GEP in an unexpected way.

Patch by Zhaomo Yang!

Differential Revision: https://reviews.llvm.org/D51698

llvm-svn: 341888
2018-09-11 01:53:36 +00:00
Dean Michael Berris dd01efc56d [XRay] Add the `llvm-xray fdr-dump` implementation
Summary:
In this change, we implement a `BlockPrinter` which orders records in a
Block that's been indexed by the `BlockIndexer`. This is used in the
`llvm-xray fdr-dump` tool which ties together the various types and
utilities we've been working on, to allow for inspection of XRay FDR
mode traces both with and without verification.

This change is the final step of the refactoring of D50441.

Reviewers: mboerger, eizan

Subscribers: mgorny, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D51846

llvm-svn: 341887
2018-09-11 00:22:53 +00:00
Shuai Wang cec7d3a055 Revert "[clang-tidy] Handle unresolved expressions in ExprMutationAnalyzer"
Summary:
Tests somehow break on windows (and only on windows)
http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/13003
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/13747

I have yet figure out why so reverting to unbreak first.

Reviewers: george.karpenkov

Subscribers: xazax.hun, a.sidorin, Szelethus, cfe-commits

Differential Revision: https://reviews.llvm.org/D51898

llvm-svn: 341886
2018-09-10 23:58:04 +00:00
Jessica Paquette a80d6faa10 Add REQUIRES line to machine-size-remarks
Just was made aware that this is necessary for tests outside of
the X86 subdirectory. Add a REQUIRES line to make sure bots that
don't enable x86 are happy.

llvm-svn: 341885
2018-09-10 23:53:08 +00:00
Craig Topper 3de8d592d1 [InstCombine] Add testcases for (mul (sext x), cst) --> (sext (mul x, cst')) and (mul (zext x), cst) --> (zext (mul x, cst')) for vectors constants.
If the multiply won't overflow in the original type we can use a smaller mul and sign extend afterwards. We don't currently support this for vector constants.

llvm-svn: 341884
2018-09-10 23:48:21 +00:00
Alina Sbirlea 116caa2920 [InstCombine] Partially revert rL341674 due to PR38897.
Summary:
Revert min/max changes in rL341674 dues to high compile times causing timeouts (PR38897).
Checking in to unblock failing builds. Patch available for post-commit review and re-revert once resolved.
Working on a smaller reproducer for PR38897.

Reviewers: craig.topper, spatel

Subscribers: sanjoy, jlebar, llvm-commits

Differential Revision: https://reviews.llvm.org/D51897

llvm-svn: 341883
2018-09-10 23:47:21 +00:00
Jessica Paquette cd7bd8262a Explicitly state triple in machine-size-remarks.ll
A bot was unhappy with the x86 triple there before. Set it explicitly to
x86_64-apple-darwin just to get something consistent.

Example failure:
http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/16846

llvm-svn: 341882
2018-09-10 23:30:53 +00:00
Shafik Yaghmour f4babefdf1 Undoing first commit which added a space to a comment
llvm-svn: 341881
2018-09-10 23:18:32 +00:00
Philip Reames 9f09161290 [AST] Add test coverage of memsets
Immediately after posting https://reviews.llvm.org/D51895, I noticed a small bug.  These tests would have caught that.

llvm-svn: 341880
2018-09-10 23:14:30 +00:00
Shafik Yaghmour 3875643928 First test commit into svn, adding space to comment
llvm-svn: 341879
2018-09-10 23:12:29 +00:00
Davide Italiano ae3f793e9e Rollback "Fix raw address breakpoints not resolving".
It broke a bunch of bots. Ted confirmed, but can't revert for
now so I'm reverting on his behalf.

llvm-svn: 341878
2018-09-10 23:09:09 +00:00