22738d00a3
Add support for the OpenBSD for Bitrig.
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Patch by David Hill.
llvm-svn: 161344
2012-08-06 20:52:18 +00:00
f7755df776
Update GATHER instructions to support 2 read-write operands. Patch from myself and Manman Ren.
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llvm-svn: 160110
2012-07-12 06:52:41 +00:00
a09820414a
X86: add GATHER intrinsics (AVX2) in LLVM
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Support the following intrinsics:
llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd
llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256
llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps
llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256
Modified Disassembler to handle VSIB addressing mode.
llvm-svn: 159221
2012-06-26 19:47:59 +00:00
5c0997f066
Remove 'static' from inline functions defined in header files.
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There is a pretty staggering amount of this in LLVM's header files, this
is not all of the instances I'm afraid. These include all of the
functions that (in my build) are used by a non-static inline (or
external) function. Specifically, these issues were caught by the new
'-Winternal-linkage-in-inline' warning.
I'll try to just clean up the remainder of the clearly redundant "static
inline" cases on functions (not methods!) defined within headers if
I can do so in a reliable way.
There were even several cases of a missing 'inline' altogether, or my
personal favorite "static bool inline". Go figure. ;]
llvm-svn: 158800
2012-06-20 08:39:33 +00:00
09610f3e09
Better comments for TLS-related X86 MachineOperand flags.
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llvm-svn: 157920
2012-06-04 09:55:36 +00:00
789acfb63d
Implement the local-dynamic TLS model for x86 (PR3985)
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This implements codegen support for accesses to thread-local variables
using the local-dynamic model, and adds a clean-up pass so that the base
address for the TLS block can be re-used between local-dynamic access on
an execution path.
llvm-svn: 157818
2012-06-01 16:27:21 +00:00
602f3a26d6
Added FMA3 Intel instructions.
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I disabled FMA3 autodetection, since the result may differ from expected for some benchmarks.
I added tests for GodeGen and intrinsics.
I did not change llvm.fma.f32/64 - it may be done later.
llvm-svn: 157737
2012-05-31 09:20:20 +00:00
ef479ea854
Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.
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This required light surgery on the assembler and disassembler
because the instructions use an uncommon encoding. They are
the only two instructions in x86 that use register operands
and two immediates.
llvm-svn: 157634
2012-05-29 19:05:25 +00:00
1964b6d39d
Tidy up some spacing and inconsistent use of pre/post increment. No functional change intended.
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llvm-svn: 157122
2012-05-19 19:14:18 +00:00
c3b0427921
Allow MCCodeEmitter access to the target MCRegisterInfo.
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Add the MCRegisterInfo to the factories and constructors.
Patch by Tom Stellard <Tom.Stellard@amd.com>.
llvm-svn: 156828
2012-05-15 17:35:52 +00:00
f9d0e44b82
Implement initial-exec TLS model for 32-bit PIC x86
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This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong
code here (see the update to test/CodeGen/X86/tls-pie.ll).
llvm-svn: 156611
2012-05-11 10:11:01 +00:00
7ce129268e
Nuke a few dead remnants of the CBE.
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llvm-svn: 156241
2012-05-05 17:45:12 +00:00
f76b5fe5ab
Copied all the VEX prefix encoding code from X86MCCodeEmitter to the x86 JIT emitter. Needs some major refactoring as these two code emitters are almost identical
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llvm-svn: 155810
2012-04-30 03:56:44 +00:00
b95f64134e
Target/X86/MCTargetDesc/X86MCAsmInfo.cpp: Enable DwarfCFI (aka DW2) on Cygming.
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Cygwin-1.7 supports dw2. Some recent mingw distros support one, too.
I have confirmed test-suite/SingleSource/Benchmarks/Shootout-C++/except.cpp can pass on Cygwin.
llvm-svn: 154247
2012-04-07 02:24:20 +00:00
54bfde79db
Make MCInstrInfo available to the MCInstPrinter. This will be used to remove getInstructionName and the static data it contains since the same tables are already in MCInstrInfo.
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llvm-svn: 153860
2012-04-02 06:09:36 +00:00
1fcf5bcae1
Prune some includes
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llvm-svn: 153502
2012-03-27 07:54:11 +00:00
a29b5bd2a8
Put Is64BitMemOperand into !defined(NDEBUG) for now.
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llvm-svn: 153185
2012-03-21 14:09:26 +00:00
5463e66768
Fix generation of the address size override prefix. Add assertions for
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the invalid cases. At least 16bit operand in 64bit mode is currently not
rejected in the parser.
llvm-svn: 153166
2012-03-21 05:48:07 +00:00
b25fda95f6
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
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llvm-svn: 152997
2012-03-17 18:46:09 +00:00
fd93a59557
Make MCRegisterInfo available to the the MCInstPrinter.
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Used to allow context sensitive printing of super-register or sub-register
references.
llvm-svn: 152043
2012-03-05 19:33:20 +00:00
35145f830a
Minimal changes for LLVM to compile under VS11.
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llvm-svn: 151849
2012-03-01 22:42:52 +00:00
66a3597a4a
Add vmfunc instruction to X86 assembler and disassembler.
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llvm-svn: 150899
2012-02-19 01:39:49 +00:00
b22310fda6
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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llvm-svn: 150878
2012-02-18 12:03:15 +00:00
ed7aa46366
Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication.
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llvm-svn: 150873
2012-02-18 08:19:49 +00:00
c6b4017ce2
Add support for implicit TLS model used with MS VC runtime.
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Patch by Kai Nacke!
llvm-svn: 150307
2012-02-11 17:26:53 +00:00
c4965bce14
Convert assert(0) to llvm_unreachable
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llvm-svn: 149814
2012-02-05 07:21:30 +00:00
4ed7278ff4
Convert assert(0) to llvm_unreachable in X86 Target directory.
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llvm-svn: 149809
2012-02-05 05:38:58 +00:00
4e7992eeba
PR11834: Use macros which are defined on Windows. Patch by Marina Yatsina.
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llvm-svn: 149294
2012-01-30 23:10:32 +00:00
8f28dbdde5
Keep source location information for X86 MCFixup's.
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llvm-svn: 149106
2012-01-27 00:51:27 +00:00
46a9f016c5
More dead code removal (using -Wunreachable-code)
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llvm-svn: 148578
2012-01-20 21:51:11 +00:00
aba3de99c0
Tidy up. MCAsmBackend naming conventions.
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llvm-svn: 148400
2012-01-18 18:52:16 +00:00
cd93de93fa
Separate the concept of having memory access in operand 4 from the concept of having the W bit set for XOP instructons. Removes ORing W-bits in the encoder and will similarly simplify the disassembler implementation.
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llvm-svn: 147366
2011-12-30 04:48:54 +00:00
a56ab0ede7
Section relative fixups are a coff concept, not a x86 one. Replace the
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x86 specific reloc_coff_secrel32 with a generic FK_SecRel_4.
llvm-svn: 147252
2011-12-24 14:47:52 +00:00
908d2ed14e
Move x86 specific bits of the COFF writer to lib/Target/X86.
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llvm-svn: 147231
2011-12-24 02:14:02 +00:00
b264d33854
Move the X86 specific bits of the ELF writer to the Target/X86 directory.
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Other targets will follow shortly.
llvm-svn: 147060
2011-12-21 17:30:17 +00:00
1ad4095d6b
Reduce the exposure of Triple::OSType in the ELF object writer. This will
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avoid including ADT/Triple.h in many places when the target specific bits are
moved.
llvm-svn: 147059
2011-12-21 17:00:36 +00:00
a379b18173
Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
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llvm-svn: 146960
2011-12-20 02:50:00 +00:00
d3df3d3527
Add back the MC bits of 126425. Original patch by Nathan Jeffords. I added the
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asm parsing and testcase.
llvm-svn: 146801
2011-12-17 01:14:52 +00:00
27a7489a03
LLVMBuild: Remove trailing newline, which irked me.
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llvm-svn: 146409
2011-12-12 19:48:00 +00:00
6dd2488383
XOP encoding bits and logic.
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llvm-svn: 146397
2011-12-12 19:12:26 +00:00
c7f355b8e1
Handle expressions of the form _GLOBAL_OFFSET_TABLE_-symbol the same way gas
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does. The _GLOBAL_OFFSET_TABLE_ is still magical in that we get a R_386_GOTPC,
but it doesn't change the immediate in the same way as when the expression
has no right hand side symbol.
llvm-svn: 146311
2011-12-10 02:28:43 +00:00
d19760a40c
Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this and fix the encoding.
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llvm-svn: 146151
2011-12-08 14:43:19 +00:00
25b63fa117
Move target-specific logic out of generic MCAssembler.
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Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.
llvm-svn: 145881
2011-12-06 00:47:03 +00:00
539d0a8a09
build/CMake: Finish removal of add_llvm_library_dependencies.
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llvm-svn: 145420
2011-11-29 19:25:30 +00:00
de3a2118db
MC/X86/COFF: Allow quotes in names when targeting MS/Windows,
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as MC is the only assembler we support.
This splits MS/Windows and GNU/Windows ASM infos into two seperate classes.
While there is currently only one difference, full MS C++ ABI support will
require many more.
llvm-svn: 145409
2011-11-29 18:00:06 +00:00
0f9a1f5e6c
This patch contains support for encoding FMA4 instructions and
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tablegen patterns for scalar FMA4 operations and intrinsic. Also
add tests for vfmaddsd.
Patch by Jan Sjodin
llvm-svn: 145133
2011-11-25 19:33:42 +00:00
ecb2908bf9
Sink codegen optimization level into MCCodeGenInfo along side relocation model
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and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.
llvm-svn: 144788
2011-11-16 08:38:26 +00:00
52823cc91c
build: Attempt to rectify inconsistencies between CMake and LLVMBuild versions of explicit dependencies.
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- The hope is that we have a tool/test to verify these are accurate (and tight) soon.
llvm-svn: 144444
2011-11-12 02:10:57 +00:00
bf9bba47a1
build: Add initial cut at LLVMBuild.txt files.
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llvm-svn: 143634
2011-11-03 18:53:17 +00:00
980d59832a
Add X86 RORX instruction
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llvm-svn: 142741
2011-10-23 07:34:00 +00:00
Eric Christopher