Commit Graph

57 Commits

Author SHA1 Message Date
Anton Korobeynikov fb80151c42 Removed tabs everywhere except autogenerated & external files. Add make
target for tabs checking.

llvm-svn: 36146
2007-04-16 18:10:23 +00:00
Anton Korobeynikov ed4b303c10 Refactoring of formal parameter flags. Enable properly use of
zext/sext/aext stuff.

llvm-svn: 35008
2007-03-07 16:25:09 +00:00
Jim Laskey e0008e23cf Simplify lowering and selection of exception ops.
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
Jim Laskey 3796abea0f Support to provide exception and selector registers.
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
Nate Begeman eda5997cc8 Finish off bug 680, allowing targets to custom lower frame and return
address nodes.

llvm-svn: 33636
2007-01-29 22:58:52 +00:00
Jim Laskey f9e5445ed4 Make LABEL a builtin opcode.
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
Reid Spencer e63b6518fa For PR950:
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
   type of an function parameter was used to determine whether it should
   be sign extended or zero extended before the call. This information is
   now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
   the parameter attribute information. Although it would have been
   convenient to pass in the FunctionType itself, there isn't always one
   present in the caller. Consequently, a signedness indication for the
   result type and for each parameter was provided for in the interface
   to this method. All implementations were changed to make the adjustment
   necessary.

llvm-svn: 32788
2006-12-31 05:55:36 +00:00
Evan Cheng 20350c4025 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.

llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Chris Lattner 799b96be08 silence warning
llvm-svn: 31395
2006-11-03 01:19:31 +00:00
Evan Cheng 0d41d19427 All targets expand BR_JT for now.
llvm-svn: 31294
2006-10-30 08:02:39 +00:00
Evan Cheng ab51cf2e78 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
Evan Cheng e71fe34d75 Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
Evan Cheng df9ac47e5e Make use of getStore().
llvm-svn: 30759
2006-10-05 23:01:46 +00:00
Evan Cheng 5d9fd977d3 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.

llvm-svn: 30714
2006-10-04 00:56:09 +00:00
Evan Cheng 9a083a4121 Reflects MachineConstantPoolEntry changes.
llvm-svn: 30279
2006-09-12 21:04:05 +00:00
Duraid Madina cf6749e4c0 add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example

llvm-svn: 30095
2006-09-04 06:21:35 +00:00
Evan Cheng f2a7d5768a RET_FLAG has an optional input flag, but it does not produce a flag result.
llvm-svn: 29725
2006-08-16 07:28:58 +00:00
Chris Lattner ed728e8dc9 Eliminate use of getNode that takes a vector.
llvm-svn: 29614
2006-08-11 17:38:39 +00:00
Chris Lattner 56565b5cb9 eliminate use of getNode that takes vector of operands.
llvm-svn: 29611
2006-08-11 17:21:12 +00:00
Evan Cheng a3add0fea8 Change RET node to include signness information of the return values. i.e.
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
2006-05-26 23:10:12 +00:00
Nate Begeman 4ca2ea5b43 JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.

llvm-svn: 27947
2006-04-22 18:53:45 +00:00
Nate Begeman bb01d4f272 Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.

llvm-svn: 26814
2006-03-17 01:40:33 +00:00
Chris Lattner 9c7f50376a Copysign needs to be expanded everywhere. Note that Alpha and IA64 should
implement copysign as a native op if they have it.

llvm-svn: 26541
2006-03-05 05:08:37 +00:00
Chris Lattner 62c3484e43 Switch targets over to using SelectionDAG::getCALLSEQ_START to create
CALLSEQ_START nodes.

llvm-svn: 26143
2006-02-13 09:00:43 +00:00
Nate Begeman 7e7f439f85 Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
2006-02-01 07:19:44 +00:00
Chris Lattner 61c9a8e942 Targets all now request ConstantFP to be legalized into TargetConstantFP.
'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771
2006-01-29 06:26:08 +00:00
Nate Begeman 595ec734fc Implement Promote for VAARG, and allow it to be custom promoted for people
who don't want the default behavior (Alpha).

llvm-svn: 25726
2006-01-28 03:14:31 +00:00
Chris Lattner b292de6703 Remove some dead code
llvm-svn: 25719
2006-01-28 00:02:51 +00:00
Nate Begeman 8c47c3a3b1 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
2006-01-27 21:09:22 +00:00
Evan Cheng 030e002fb9 Set SchedulingForLatency to be the default scheduling preference for all.
llvm-svn: 25607
2006-01-25 18:52:42 +00:00
Nate Begeman e74795cd70 First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Evan Cheng 1092a02619 Default scheduling preference is SchedulingForLatency.
llvm-svn: 25603
2006-01-25 09:15:54 +00:00
Duraid Madina f54c9395e7 remove RET hack, add proper support for rets (watching out for ret voids)
llvm-svn: 25486
2006-01-20 20:24:31 +00:00
Duraid Madina 4026e12e85 fix sext breakage: now we correctly deal with functions that return
int vs uint

llvm-svn: 25478
2006-01-20 16:10:05 +00:00
Duraid Madina 29b9d7cdff fix calls that return f32
llvm-svn: 25455
2006-01-19 08:31:51 +00:00
Duraid Madina c8817d2857 explain that r12 is the stack pointer reg
llvm-svn: 25336
2006-01-15 09:45:23 +00:00
Chris Lattner c17b41c3ba Cleanup IA64ISD, tell the graph drawer what the symbolic names for the enums are.
llvm-svn: 25324
2006-01-14 22:27:21 +00:00
Nate Begeman 2fba8a3aaa bswap implementation
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Chris Lattner fdc6d1ea69 new nodes
llvm-svn: 25271
2006-01-13 02:40:58 +00:00
Duraid Madina 84be729a56 sabre's (correct) fix means these guys need to be flagged as well (else
the scheduler will complain)

llvm-svn: 25241
2006-01-12 03:28:40 +00:00
Chris Lattner 9d5e4e8f3c Fix an itanium call lowering bug for duraid
llvm-svn: 25235
2006-01-12 01:33:08 +00:00
Nate Begeman 1b8121b227 Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Chris Lattner 0fb2ae7d17 silence a bogus warning
llvm-svn: 25185
2006-01-10 19:45:18 +00:00
Duraid Madina 014e8ee806 heh, 'sif it'd be a legalizer bug.
llvm-svn: 25172
2006-01-10 05:26:01 +00:00
Duraid Madina e977a93bd5 support functions that return bool (this "should" work but doesn't,
*maybe* due to a legalizer bug.)

llvm-svn: 25171
2006-01-10 05:08:25 +00:00
Chris Lattner efbb8da3f5 silence a bogus gcc warning
llvm-svn: 25129
2006-01-06 17:56:38 +00:00
Jim Laskey deeafa0f00 Had expand logic backward.
llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey 762e9ec06c Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.

llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Duraid Madina 69ac08c683 nasty paste-o, calls passing more than 8 arguments along were having
args >8 put into the wrong place

llvm-svn: 25027
2005-12-27 10:17:03 +00:00
Duraid Madina 644e7db818 this is a hack, which may or may not hang around. In short:
whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.

BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952
2005-12-22 13:29:14 +00:00